425 void dispc_vid_write(struct dispc_device *dispc, u32 hw_plane, u16 reg, u32 val)  in dispc_vid_write()  function
515 	dispc_vid_write(dispc, hw_plane, idx,  in VID_REG_FLD_MOD()
629 	dispc_vid_write(dispc, hw_plane, DISPC_VID_K2G_IRQSTATUS, stat);  in dispc_k2g_vid_write_irqstatus()
661 	dispc_vid_write(dispc, hw_plane, DISPC_VID_K2G_IRQENABLE, stat);  in dispc_k2g_vid_set_irqenable()
1353 	dispc_vid_write(dispc, hw_plane, DISPC_VID_K2G_POSITION,  in dispc_k2g_ovr_set_plane()
1513 		dispc_vid_write(dispc, hw_plane, dispc_vid_csc_coef_reg[i],  in dispc_k2g_vid_write_csc()
1532 		dispc_vid_write(dispc, hw_plane, dispc_vid_csc_coef_reg[i],  in dispc_k3_vid_write_csc()
1684 		dispc_vid_write(dispc, hw_plane, reg, c0);  in dispc_vid_write_fir_coefs()
1696 		dispc_vid_write(dispc, hw_plane, reg, c12);  in dispc_vid_write_fir_coefs()
1908 			dispc_vid_write(dispc, hw_plane, DISPC_VID_FIRH2,  in dispc_vid_set_scaling()
1915 			dispc_vid_write(dispc, hw_plane, DISPC_VID_FIRV2,  in dispc_vid_set_scaling()
1924 		dispc_vid_write(dispc, hw_plane, DISPC_VID_FIRH, sp->fir_xinc);  in dispc_vid_set_scaling()
1931 		dispc_vid_write(dispc, hw_plane, DISPC_VID_FIRV, sp->fir_yinc);  in dispc_vid_set_scaling()
2110 	dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_0, dma_addr & 0xffffffff);  in dispc_plane_setup()
2111 	dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_EXT_0, (u64)dma_addr >> 32);  in dispc_plane_setup()
2112 	dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_1, dma_addr & 0xffffffff);  in dispc_plane_setup()
2113 	dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_EXT_1, (u64)dma_addr >> 32);  in dispc_plane_setup()
2115 	dispc_vid_write(dispc, hw_plane, DISPC_VID_PICTURE_SIZE,  in dispc_plane_setup()
2120 		dispc_vid_write(dispc, hw_plane, DISPC_VID_PIXEL_INC,  in dispc_plane_setup()
2123 		dispc_vid_write(dispc, hw_plane, DISPC_VID_PIXEL_INC,  in dispc_plane_setup()
2126 	dispc_vid_write(dispc, hw_plane, DISPC_VID_ROW_INC,  in dispc_plane_setup()
2136 		dispc_vid_write(dispc, hw_plane,  in dispc_plane_setup()
2138 		dispc_vid_write(dispc, hw_plane,  in dispc_plane_setup()
2140 		dispc_vid_write(dispc, hw_plane,  in dispc_plane_setup()
2142 		dispc_vid_write(dispc, hw_plane,  in dispc_plane_setup()
2145 		dispc_vid_write(dispc, hw_plane, DISPC_VID_ROW_INC_UV,  in dispc_plane_setup()
2152 		dispc_vid_write(dispc, hw_plane, DISPC_VID_SIZE,  in dispc_plane_setup()
2167 	dispc_vid_write(dispc, hw_plane, DISPC_VID_GLOBAL_ALPHA,  in dispc_plane_setup()
2191 	dispc_vid_write(dispc, hw_plane, DISPC_VID_MFLAG_THRESHOLD,  in dispc_vid_set_mflag_threshold()
2198 	dispc_vid_write(dispc, hw_plane, DISPC_VID_BUF_THRESHOLD,  in dispc_vid_set_buf_threshold()
2240 		dispc_vid_write(dispc, hw_plane, DISPC_VID_PRELOAD, preload);  in dispc_k2g_plane_init()
2295 		dispc_vid_write(dispc, hw_plane, DISPC_VID_PRELOAD, preload);  in dispc_k3_plane_init()