Lines Matching refs:sparepll
51 u8 sparepll; member
71 .sparepll = 0x0,
86 .sparepll = 0x0,
101 .sparepll = 0x0,
116 .sparepll = 0x0,
131 .sparepll = 0x0,
150 .sparepll = 0x0,
165 .sparepll = 0x0,
180 .sparepll = 0x0,
195 .sparepll = 0x0,
215 .sparepll = 0x54,
230 .sparepll = 0x44,
245 .sparepll = 0x00, /* 0x34 */
260 .sparepll = 0x34,
275 .sparepll = 0x34,
294 .sparepll = 0x54,
309 .sparepll = 0x44,
324 .sparepll = 0x00, /* 0x34 */
339 .sparepll = 0x34,
354 .sparepll = 0x34,
2542 value |= SOR_DP_PADCTL_SPAREPLL(settings->sparepll); in tegra_sor_hdmi_enable()