371 	unsigned int dp_padctl0;  member
655 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_power_up_lanes()
674 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_power_up_lanes()
703 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_power_down_lanes()
706 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_power_down_lanes()
734 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_precharge()
753 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_precharge()
757 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_precharge()
760 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_precharge()
768 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_term_calibrate()
770 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_term_calibrate()
799 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_term_calibrate()
801 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_term_calibrate()
864 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_link_apply_training()
868 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_link_apply_training()
2313 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2316 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2481 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2483 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2534 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2538 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2546 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2548 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
3288 	.dp_padctl0 = 0x5c,
3460 	.dp_padctl0 = 0x5c,
3521 	.dp_padctl0 = 0x168,
3604 	.dp_padctl0 = 0x16e,