369 	unsigned int pll2;  member
1453 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_power_down()
1455 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_power_down()
1463 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_power_down()
1466 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_power_down()
2285 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2287 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2300 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2302 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2306 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2309 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2768 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2770 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2782 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2785 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2789 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2792 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
3286 	.pll2 = 0x19,
3458 	.pll2 = 0x19,
3519 	.pll2 = 0x165,
3602 	.pll2 = 0x16b,