1 // SPDX-License-Identifier: GPL-2.0-only
3  * Copyright (c) 2012-2013, NVIDIA Corporation.
52 	struct drm_device *dev = dev_get_drvdata(client->host);  in gr2d_init()
57 	gr2d->channel = host1x_channel_request(client);  in gr2d_init()
58 	if (!gr2d->channel)  in gr2d_init()
59 		return -ENOMEM;  in gr2d_init()
61 	client->syncpts[0] = host1x_syncpt_request(client, flags);  in gr2d_init()
62 	if (!client->syncpts[0]) {  in gr2d_init()
63 		err = -ENOMEM;  in gr2d_init()
64 		dev_err(client->dev, "failed to request syncpoint: %d\n", err);  in gr2d_init()
70 		dev_err(client->dev, "failed to attach to domain: %d\n", err);  in gr2d_init()
74 	err = tegra_drm_register_client(dev->dev_private, drm);  in gr2d_init()
76 		dev_err(client->dev, "failed to register client: %d\n", err);  in gr2d_init()
85 	host1x_syncpt_put(client->syncpts[0]);  in gr2d_init()
87 	host1x_channel_put(gr2d->channel);  in gr2d_init()
94 	struct drm_device *dev = dev_get_drvdata(client->host);  in gr2d_exit()
95 	struct tegra_drm *tegra = dev->dev_private;  in gr2d_exit()
103 	pm_runtime_dont_use_autosuspend(client->dev);  in gr2d_exit()
104 	pm_runtime_force_suspend(client->dev);  in gr2d_exit()
107 	host1x_syncpt_put(client->syncpts[0]);  in gr2d_exit()
108 	host1x_channel_put(gr2d->channel);  in gr2d_exit()
110 	gr2d->channel = NULL;  in gr2d_exit()
125 	context->channel = host1x_channel_get(gr2d->channel);  in gr2d_open_channel()
126 	if (!context->channel)  in gr2d_open_channel()
127 		return -ENOMEM;  in gr2d_open_channel()
134 	host1x_channel_put(context->channel);  in gr2d_close_channel()
137 static int gr2d_is_addr_reg(struct device *dev, u32 class, u32 offset)  in gr2d_is_addr_reg()  argument
141 	switch (class) {  in gr2d_is_addr_reg()
153 		if (test_bit(offset, gr2d->addr_regs))  in gr2d_is_addr_reg()
162 static int gr2d_is_valid_class(u32 class)  in gr2d_is_valid_class()  argument
164 	return (class == HOST1X_CLASS_GR2D ||  in gr2d_is_valid_class()
165 		class == HOST1X_CLASS_GR2D_SB);  in gr2d_is_valid_class()
189 	{ .compatible = "nvidia,tegra114-gr2d", .data = &tegra114_gr2d_soc },
190 	{ .compatible = "nvidia,tegra30-gr2d", .data = &tegra30_gr2d_soc },
191 	{ .compatible = "nvidia,tegra20-gr2d", .data = &tegra20_gr2d_soc },
217 	gr2d->resets[RST_MC].id = "mc";  in gr2d_get_resets()
218 	gr2d->resets[RST_GR2D].id = "2d";  in gr2d_get_resets()
219 	gr2d->nresets = RST_GR2D_MAX;  in gr2d_get_resets()
222 				dev, gr2d->nresets, gr2d->resets);  in gr2d_get_resets()
228 	if (WARN_ON(!gr2d->resets[RST_GR2D].rstc))  in gr2d_get_resets()
229 		return -ENOENT;  in gr2d_get_resets()
236 	struct device *dev = &pdev->dev;  in gr2d_probe()
244 		return -ENOMEM;  in gr2d_probe()
248 	gr2d->soc = of_device_get_match_data(dev);  in gr2d_probe()
252 		return -ENOMEM;  in gr2d_probe()
254 	gr2d->clk = devm_clk_get(dev, NULL);  in gr2d_probe()
255 	if (IS_ERR(gr2d->clk)) {  in gr2d_probe()
257 		return PTR_ERR(gr2d->clk);  in gr2d_probe()
264 	INIT_LIST_HEAD(&gr2d->client.base.list);  in gr2d_probe()
265 	gr2d->client.base.ops = &gr2d_client_ops;  in gr2d_probe()
266 	gr2d->client.base.dev = dev;  in gr2d_probe()
267 	gr2d->client.base.class = HOST1X_CLASS_GR2D;  in gr2d_probe()
268 	gr2d->client.base.syncpts = syncpts;  in gr2d_probe()
269 	gr2d->client.base.num_syncpts = 1;  in gr2d_probe()
271 	INIT_LIST_HEAD(&gr2d->client.list);  in gr2d_probe()
272 	gr2d->client.version = gr2d->soc->version;  in gr2d_probe()
273 	gr2d->client.ops = &gr2d_ops;  in gr2d_probe()
279 	err = host1x_client_register(&gr2d->client.base);  in gr2d_probe()
281 		dev_err(dev, "failed to register host1x client: %d\n", err);  in gr2d_probe()
287 		set_bit(gr2d_addr_regs[i], gr2d->addr_regs);  in gr2d_probe()
296 	pm_runtime_disable(&pdev->dev);  in gr2d_remove()
297 	host1x_client_unregister(&gr2d->client.base);  in gr2d_remove()
305 	host1x_channel_stop(gr2d->channel);  in gr2d_runtime_suspend()
306 	reset_control_bulk_release(gr2d->nresets, gr2d->resets);  in gr2d_runtime_suspend()
310 	 * host1x's cmdproc will stuck on trying to access any G2 register  in gr2d_runtime_suspend()
311 	 * after reset. GR2D module could be either hot-reset or reset after  in gr2d_runtime_suspend()
312 	 * power-gating of the HEG partition. Hence we will put in reset only  in gr2d_runtime_suspend()
314 	 * of resetting GR2D module across power-gating.  in gr2d_runtime_suspend()
320 	err = reset_control_acquire(gr2d->resets[RST_MC].rstc);  in gr2d_runtime_suspend()
326 	err = reset_control_assert(gr2d->resets[RST_MC].rstc);  in gr2d_runtime_suspend()
327 	reset_control_release(gr2d->resets[RST_MC].rstc);  in gr2d_runtime_suspend()
333 	clk_disable_unprepare(gr2d->clk);  in gr2d_runtime_suspend()
338 	reset_control_bulk_acquire(gr2d->nresets, gr2d->resets);  in gr2d_runtime_suspend()
339 	reset_control_bulk_deassert(gr2d->nresets, gr2d->resets);  in gr2d_runtime_suspend()
349 	err = reset_control_bulk_acquire(gr2d->nresets, gr2d->resets);  in gr2d_runtime_resume()
355 	err = clk_prepare_enable(gr2d->clk);  in gr2d_runtime_resume()
364 	err = reset_control_bulk_deassert(gr2d->nresets, gr2d->resets);  in gr2d_runtime_resume()
377 	clk_disable_unprepare(gr2d->clk);  in gr2d_runtime_resume()
379 	reset_control_bulk_release(gr2d->nresets, gr2d->resets);  in gr2d_runtime_resume()
392 		.name = "tegra-gr2d",