Lines Matching +full:tegra124 +full:- +full:hdmi

1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
27 #include <asm/dma-iommu.h>
76 struct drm_device *drm = old_state->dev; in tegra_atomic_commit_tail()
77 struct tegra_drm *tegra = drm->dev_private; in tegra_atomic_commit_tail()
79 if (tegra->hub) { in tegra_atomic_commit_tail()
108 return -ENOMEM; in tegra_drm_open()
110 idr_init_base(&fpriv->legacy_contexts, 1); in tegra_drm_open()
111 xa_init_flags(&fpriv->contexts, XA_FLAGS_ALLOC1); in tegra_drm_open()
112 xa_init(&fpriv->syncpoints); in tegra_drm_open()
113 mutex_init(&fpriv->lock); in tegra_drm_open()
114 filp->driver_priv = fpriv; in tegra_drm_open()
121 context->client->ops->close_channel(context); in tegra_drm_context_free()
122 pm_runtime_put(context->client->base.dev); in tegra_drm_context_free()
134 err = get_user(cmdbuf, &src->cmdbuf.handle); in host1x_reloc_copy_from_user()
138 err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset); in host1x_reloc_copy_from_user()
142 err = get_user(target, &src->target.handle); in host1x_reloc_copy_from_user()
146 err = get_user(dest->target.offset, &src->target.offset); in host1x_reloc_copy_from_user()
150 err = get_user(dest->shift, &src->shift); in host1x_reloc_copy_from_user()
154 dest->flags = HOST1X_RELOC_READ | HOST1X_RELOC_WRITE; in host1x_reloc_copy_from_user()
156 dest->cmdbuf.bo = tegra_gem_lookup(file, cmdbuf); in host1x_reloc_copy_from_user()
157 if (!dest->cmdbuf.bo) in host1x_reloc_copy_from_user()
158 return -ENOENT; in host1x_reloc_copy_from_user()
160 dest->target.bo = tegra_gem_lookup(file, target); in host1x_reloc_copy_from_user()
161 if (!dest->target.bo) in host1x_reloc_copy_from_user()
162 return -ENOENT; in host1x_reloc_copy_from_user()
171 struct host1x_client *client = &context->client->base; in tegra_drm_submit()
172 unsigned int num_cmdbufs = args->num_cmdbufs; in tegra_drm_submit()
173 unsigned int num_relocs = args->num_relocs; in tegra_drm_submit()
178 struct host1x *host1x = dev_get_drvdata(drm->dev->parent); in tegra_drm_submit()
185 user_cmdbufs = u64_to_user_ptr(args->cmdbufs); in tegra_drm_submit()
186 user_relocs = u64_to_user_ptr(args->relocs); in tegra_drm_submit()
187 user_syncpt = u64_to_user_ptr(args->syncpts); in tegra_drm_submit()
190 if (args->num_syncpts != 1) in tegra_drm_submit()
191 return -EINVAL; in tegra_drm_submit()
194 if (args->num_waitchks != 0) in tegra_drm_submit()
195 return -EINVAL; in tegra_drm_submit()
197 job = host1x_job_alloc(context->channel, args->num_cmdbufs, in tegra_drm_submit()
198 args->num_relocs, false); in tegra_drm_submit()
200 return -ENOMEM; in tegra_drm_submit()
202 job->num_relocs = args->num_relocs; in tegra_drm_submit()
203 job->client = client; in tegra_drm_submit()
204 job->class = client->class; in tegra_drm_submit()
205 job->serialize = true; in tegra_drm_submit()
206 job->syncpt_recovery = true; in tegra_drm_submit()
216 err = -ENOMEM; in tegra_drm_submit()
230 err = -EFAULT; in tegra_drm_submit()
239 err = -EINVAL; in tegra_drm_submit()
245 err = -ENOENT; in tegra_drm_submit()
251 refs[num_refs++] = &obj->gem; in tegra_drm_submit()
254 * Gather buffer base address must be 4-bytes aligned, in tegra_drm_submit()
258 if (offset & 3 || offset > obj->gem.size) { in tegra_drm_submit()
259 err = -EINVAL; in tegra_drm_submit()
264 num_cmdbufs--; in tegra_drm_submit()
269 while (num_relocs--) { in tegra_drm_submit()
273 err = host1x_reloc_copy_from_user(&job->relocs[num_relocs], in tegra_drm_submit()
279 reloc = &job->relocs[num_relocs]; in tegra_drm_submit()
280 obj = host1x_to_tegra_bo(reloc->cmdbuf.bo); in tegra_drm_submit()
281 refs[num_refs++] = &obj->gem; in tegra_drm_submit()
288 if (reloc->cmdbuf.offset & 3 || in tegra_drm_submit()
289 reloc->cmdbuf.offset >= obj->gem.size) { in tegra_drm_submit()
290 err = -EINVAL; in tegra_drm_submit()
294 obj = host1x_to_tegra_bo(reloc->target.bo); in tegra_drm_submit()
295 refs[num_refs++] = &obj->gem; in tegra_drm_submit()
297 if (reloc->target.offset >= obj->gem.size) { in tegra_drm_submit()
298 err = -EINVAL; in tegra_drm_submit()
304 err = -EFAULT; in tegra_drm_submit()
311 err = -ENOENT; in tegra_drm_submit()
315 job->is_addr_reg = context->client->ops->is_addr_reg; in tegra_drm_submit()
316 job->is_valid_class = context->client->ops->is_valid_class; in tegra_drm_submit()
317 job->syncpt_incrs = syncpt.incrs; in tegra_drm_submit()
318 job->syncpt = sp; in tegra_drm_submit()
319 job->timeout = 10000; in tegra_drm_submit()
321 if (args->timeout && args->timeout < 10000) in tegra_drm_submit()
322 job->timeout = args->timeout; in tegra_drm_submit()
324 err = host1x_job_pin(job, context->client->base.dev); in tegra_drm_submit()
334 args->fence = job->syncpt_end; in tegra_drm_submit()
337 while (num_refs--) in tegra_drm_submit()
355 bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags, in tegra_gem_create()
356 &args->handle); in tegra_gem_create()
370 gem = drm_gem_object_lookup(file, args->handle); in tegra_gem_mmap()
372 return -EINVAL; in tegra_gem_mmap()
376 args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node); in tegra_gem_mmap()
386 struct host1x *host = dev_get_drvdata(drm->dev->parent); in tegra_syncpt_read()
390 sp = host1x_syncpt_get_by_id_noref(host, args->id); in tegra_syncpt_read()
392 return -EINVAL; in tegra_syncpt_read()
394 args->value = host1x_syncpt_read_min(sp); in tegra_syncpt_read()
401 struct host1x *host1x = dev_get_drvdata(drm->dev->parent); in tegra_syncpt_incr()
405 sp = host1x_syncpt_get_by_id_noref(host1x, args->id); in tegra_syncpt_incr()
407 return -EINVAL; in tegra_syncpt_incr()
415 struct host1x *host1x = dev_get_drvdata(drm->dev->parent); in tegra_syncpt_wait()
419 sp = host1x_syncpt_get_by_id_noref(host1x, args->id); in tegra_syncpt_wait()
421 return -EINVAL; in tegra_syncpt_wait()
423 return host1x_syncpt_wait(sp, args->thresh, in tegra_syncpt_wait()
424 msecs_to_jiffies(args->timeout), in tegra_syncpt_wait()
425 &args->value); in tegra_syncpt_wait()
434 err = pm_runtime_resume_and_get(client->base.dev); in tegra_client_open()
438 err = client->ops->open_channel(client, context); in tegra_client_open()
440 pm_runtime_put(client->base.dev); in tegra_client_open()
444 err = idr_alloc(&fpriv->legacy_contexts, context, 1, 0, GFP_KERNEL); in tegra_client_open()
446 client->ops->close_channel(context); in tegra_client_open()
447 pm_runtime_put(client->base.dev); in tegra_client_open()
451 context->client = client; in tegra_client_open()
452 context->id = err; in tegra_client_open()
460 struct tegra_drm_file *fpriv = file->driver_priv; in tegra_open_channel()
461 struct tegra_drm *tegra = drm->dev_private; in tegra_open_channel()
465 int err = -ENODEV; in tegra_open_channel()
469 return -ENOMEM; in tegra_open_channel()
471 mutex_lock(&fpriv->lock); in tegra_open_channel()
473 list_for_each_entry(client, &tegra->clients, list) in tegra_open_channel()
474 if (client->base.class == args->client) { in tegra_open_channel()
479 args->context = context->id; in tegra_open_channel()
486 mutex_unlock(&fpriv->lock); in tegra_open_channel()
493 struct tegra_drm_file *fpriv = file->driver_priv; in tegra_close_channel()
498 mutex_lock(&fpriv->lock); in tegra_close_channel()
500 context = idr_find(&fpriv->legacy_contexts, args->context); in tegra_close_channel()
502 err = -EINVAL; in tegra_close_channel()
506 idr_remove(&fpriv->legacy_contexts, context->id); in tegra_close_channel()
510 mutex_unlock(&fpriv->lock); in tegra_close_channel()
517 struct tegra_drm_file *fpriv = file->driver_priv; in tegra_get_syncpt()
523 mutex_lock(&fpriv->lock); in tegra_get_syncpt()
525 context = idr_find(&fpriv->legacy_contexts, args->context); in tegra_get_syncpt()
527 err = -ENODEV; in tegra_get_syncpt()
531 if (args->index >= context->client->base.num_syncpts) { in tegra_get_syncpt()
532 err = -EINVAL; in tegra_get_syncpt()
536 syncpt = context->client->base.syncpts[args->index]; in tegra_get_syncpt()
537 args->id = host1x_syncpt_id(syncpt); in tegra_get_syncpt()
540 mutex_unlock(&fpriv->lock); in tegra_get_syncpt()
547 struct tegra_drm_file *fpriv = file->driver_priv; in tegra_submit()
552 mutex_lock(&fpriv->lock); in tegra_submit()
554 context = idr_find(&fpriv->legacy_contexts, args->context); in tegra_submit()
556 err = -ENODEV; in tegra_submit()
560 err = context->client->ops->submit(context, args, drm, file); in tegra_submit()
563 mutex_unlock(&fpriv->lock); in tegra_submit()
570 struct tegra_drm_file *fpriv = file->driver_priv; in tegra_get_syncpt_base()
577 mutex_lock(&fpriv->lock); in tegra_get_syncpt_base()
579 context = idr_find(&fpriv->legacy_contexts, args->context); in tegra_get_syncpt_base()
581 err = -ENODEV; in tegra_get_syncpt_base()
585 if (args->syncpt >= context->client->base.num_syncpts) { in tegra_get_syncpt_base()
586 err = -EINVAL; in tegra_get_syncpt_base()
590 syncpt = context->client->base.syncpts[args->syncpt]; in tegra_get_syncpt_base()
594 err = -ENXIO; in tegra_get_syncpt_base()
598 args->id = host1x_syncpt_base_id(base); in tegra_get_syncpt_base()
601 mutex_unlock(&fpriv->lock); in tegra_get_syncpt_base()
614 switch (args->mode) { in tegra_gem_set_tiling()
618 if (args->value != 0) in tegra_gem_set_tiling()
619 return -EINVAL; in tegra_gem_set_tiling()
626 if (args->value != 0) in tegra_gem_set_tiling()
627 return -EINVAL; in tegra_gem_set_tiling()
634 if (args->value > 5) in tegra_gem_set_tiling()
635 return -EINVAL; in tegra_gem_set_tiling()
637 value = args->value; in tegra_gem_set_tiling()
641 return -EINVAL; in tegra_gem_set_tiling()
644 gem = drm_gem_object_lookup(file, args->handle); in tegra_gem_set_tiling()
646 return -ENOENT; in tegra_gem_set_tiling()
650 bo->tiling.mode = mode; in tegra_gem_set_tiling()
651 bo->tiling.value = value; in tegra_gem_set_tiling()
666 gem = drm_gem_object_lookup(file, args->handle); in tegra_gem_get_tiling()
668 return -ENOENT; in tegra_gem_get_tiling()
672 switch (bo->tiling.mode) { in tegra_gem_get_tiling()
674 args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH; in tegra_gem_get_tiling()
675 args->value = 0; in tegra_gem_get_tiling()
679 args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED; in tegra_gem_get_tiling()
680 args->value = 0; in tegra_gem_get_tiling()
684 args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK; in tegra_gem_get_tiling()
685 args->value = bo->tiling.value; in tegra_gem_get_tiling()
689 err = -EINVAL; in tegra_gem_get_tiling()
705 if (args->flags & ~DRM_TEGRA_GEM_FLAGS) in tegra_gem_set_flags()
706 return -EINVAL; in tegra_gem_set_flags()
708 gem = drm_gem_object_lookup(file, args->handle); in tegra_gem_set_flags()
710 return -ENOENT; in tegra_gem_set_flags()
713 bo->flags = 0; in tegra_gem_set_flags()
715 if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP) in tegra_gem_set_flags()
716 bo->flags |= TEGRA_BO_BOTTOM_UP; in tegra_gem_set_flags()
730 gem = drm_gem_object_lookup(file, args->handle); in tegra_gem_get_flags()
732 return -ENOENT; in tegra_gem_get_flags()
735 args->flags = 0; in tegra_gem_get_flags()
737 if (bo->flags & TEGRA_BO_BOTTOM_UP) in tegra_gem_get_flags()
738 args->flags |= DRM_TEGRA_GEM_BOTTOM_UP; in tegra_gem_get_flags()
818 struct tegra_drm_file *fpriv = file->driver_priv; in tegra_drm_postclose()
820 mutex_lock(&fpriv->lock); in tegra_drm_postclose()
821 idr_for_each(&fpriv->legacy_contexts, tegra_drm_context_cleanup, NULL); in tegra_drm_postclose()
823 mutex_unlock(&fpriv->lock); in tegra_drm_postclose()
825 idr_destroy(&fpriv->legacy_contexts); in tegra_drm_postclose()
826 mutex_destroy(&fpriv->lock); in tegra_drm_postclose()
833 struct drm_info_node *node = (struct drm_info_node *)s->private; in tegra_debugfs_framebuffers()
834 struct drm_device *drm = node->minor->dev; in tegra_debugfs_framebuffers()
837 mutex_lock(&drm->mode_config.fb_lock); in tegra_debugfs_framebuffers()
839 list_for_each_entry(fb, &drm->mode_config.fb_list, head) { in tegra_debugfs_framebuffers()
841 fb->base.id, fb->width, fb->height, in tegra_debugfs_framebuffers()
842 fb->format->depth, in tegra_debugfs_framebuffers()
843 fb->format->cpp[0] * 8, in tegra_debugfs_framebuffers()
847 mutex_unlock(&drm->mode_config.fb_lock); in tegra_debugfs_framebuffers()
854 struct drm_info_node *node = (struct drm_info_node *)s->private; in tegra_debugfs_iova()
855 struct drm_device *drm = node->minor->dev; in tegra_debugfs_iova()
856 struct tegra_drm *tegra = drm->dev_private; in tegra_debugfs_iova()
859 if (tegra->domain) { in tegra_debugfs_iova()
860 mutex_lock(&tegra->mm_lock); in tegra_debugfs_iova()
861 drm_mm_print(&tegra->mm, &p); in tegra_debugfs_iova()
862 mutex_unlock(&tegra->mm_lock); in tegra_debugfs_iova()
877 minor->debugfs_root, minor); in tegra_debugfs_init()
914 client->shared_channel = host1x_channel_request(&client->base); in tegra_drm_register_client()
915 if (!client->shared_channel) in tegra_drm_register_client()
916 return -EBUSY; in tegra_drm_register_client()
918 mutex_lock(&tegra->clients_lock); in tegra_drm_register_client()
919 list_add_tail(&client->list, &tegra->clients); in tegra_drm_register_client()
920 client->drm = tegra; in tegra_drm_register_client()
921 mutex_unlock(&tegra->clients_lock); in tegra_drm_register_client()
929 mutex_lock(&tegra->clients_lock); in tegra_drm_unregister_client()
930 list_del_init(&client->list); in tegra_drm_unregister_client()
931 client->drm = NULL; in tegra_drm_unregister_client()
932 mutex_unlock(&tegra->clients_lock); in tegra_drm_unregister_client()
934 if (client->shared_channel) in tegra_drm_unregister_client()
935 host1x_channel_put(client->shared_channel); in tegra_drm_unregister_client()
942 struct iommu_domain *domain = iommu_get_domain_for_dev(client->dev); in host1x_client_iommu_attach()
943 struct drm_device *drm = dev_get_drvdata(client->host); in host1x_client_iommu_attach()
944 struct tegra_drm *tegra = drm->dev_private; in host1x_client_iommu_attach()
949 if (client->dev->archdata.mapping) { in host1x_client_iommu_attach()
951 to_dma_iommu_mapping(client->dev); in host1x_client_iommu_attach()
952 arm_iommu_detach_device(client->dev); in host1x_client_iommu_attach()
955 domain = iommu_get_domain_for_dev(client->dev); in host1x_client_iommu_attach()
962 * domain. This allows using the IOMMU-backed DMA API. in host1x_client_iommu_attach()
964 if (domain && domain->type != IOMMU_DOMAIN_IDENTITY && in host1x_client_iommu_attach()
965 domain != tegra->domain) in host1x_client_iommu_attach()
968 if (tegra->domain) { in host1x_client_iommu_attach()
969 group = iommu_group_get(client->dev); in host1x_client_iommu_attach()
971 return -ENODEV; in host1x_client_iommu_attach()
973 if (domain != tegra->domain) { in host1x_client_iommu_attach()
974 err = iommu_attach_group(tegra->domain, group); in host1x_client_iommu_attach()
981 tegra->use_explicit_iommu = true; in host1x_client_iommu_attach()
984 client->group = group; in host1x_client_iommu_attach()
991 struct drm_device *drm = dev_get_drvdata(client->host); in host1x_client_iommu_detach()
992 struct tegra_drm *tegra = drm->dev_private; in host1x_client_iommu_detach()
995 if (client->group) { in host1x_client_iommu_detach()
1001 domain = iommu_get_domain_for_dev(client->dev); in host1x_client_iommu_detach()
1003 iommu_detach_group(tegra->domain, client->group); in host1x_client_iommu_detach()
1005 iommu_group_put(client->group); in host1x_client_iommu_detach()
1006 client->group = NULL; in host1x_client_iommu_detach()
1017 if (tegra->domain) in tegra_drm_alloc()
1018 size = iova_align(&tegra->carveout.domain, size); in tegra_drm_alloc()
1023 if (!tegra->domain) { in tegra_drm_alloc()
1025 * Many units only support 32-bit addresses, even on 64-bit in tegra_drm_alloc()
1026 * SoCs. If there is no IOMMU to translate into a 32-bit IO in tegra_drm_alloc()
1028 * lower 32-bit range. in tegra_drm_alloc()
1035 return ERR_PTR(-ENOMEM); in tegra_drm_alloc()
1037 if (!tegra->domain) { in tegra_drm_alloc()
1046 alloc = alloc_iova(&tegra->carveout.domain, in tegra_drm_alloc()
1047 size >> tegra->carveout.shift, in tegra_drm_alloc()
1048 tegra->carveout.limit, true); in tegra_drm_alloc()
1050 err = -EBUSY; in tegra_drm_alloc()
1054 *dma = iova_dma_addr(&tegra->carveout.domain, alloc); in tegra_drm_alloc()
1055 err = iommu_map(tegra->domain, *dma, virt_to_phys(virt), in tegra_drm_alloc()
1063 __free_iova(&tegra->carveout.domain, alloc); in tegra_drm_alloc()
1073 if (tegra->domain) in tegra_drm_free()
1074 size = iova_align(&tegra->carveout.domain, size); in tegra_drm_free()
1078 if (tegra->domain) { in tegra_drm_free()
1079 iommu_unmap(tegra->domain, dma, size); in tegra_drm_free()
1080 free_iova(&tegra->carveout.domain, in tegra_drm_free()
1081 iova_pfn(&tegra->carveout.domain, dma)); in tegra_drm_free()
1089 struct host1x *host1x = dev_get_drvdata(dev->dev.parent); in host1x_drm_wants_iommu()
1098 * likely to be allocated beyond the 32-bit boundary if sufficient in host1x_drm_wants_iommu()
1103 * 32-bit boundary. in host1x_drm_wants_iommu()
1123 domain = iommu_get_domain_for_dev(dev->dev.parent); in host1x_drm_wants_iommu()
1127 * 32-bit boundary, so the regular GATHER opcodes will always be in host1x_drm_wants_iommu()
1139 struct device *dma_dev = dev->dev.parent; in host1x_drm_probe()
1144 drm = drm_dev_alloc(&tegra_drm_driver, &dev->dev); in host1x_drm_probe()
1150 err = -ENOMEM; in host1x_drm_probe()
1155 tegra->domain = iommu_paging_domain_alloc(dma_dev); in host1x_drm_probe()
1156 if (IS_ERR(tegra->domain)) { in host1x_drm_probe()
1157 err = PTR_ERR(tegra->domain); in host1x_drm_probe()
1166 mutex_init(&tegra->clients_lock); in host1x_drm_probe()
1167 INIT_LIST_HEAD(&tegra->clients); in host1x_drm_probe()
1169 dev_set_drvdata(&dev->dev, drm); in host1x_drm_probe()
1170 drm->dev_private = tegra; in host1x_drm_probe()
1171 tegra->drm = drm; in host1x_drm_probe()
1175 drm->mode_config.min_width = 0; in host1x_drm_probe()
1176 drm->mode_config.min_height = 0; in host1x_drm_probe()
1177 drm->mode_config.max_width = 0; in host1x_drm_probe()
1178 drm->mode_config.max_height = 0; in host1x_drm_probe()
1180 drm->mode_config.normalize_zpos = true; in host1x_drm_probe()
1182 drm->mode_config.funcs = &tegra_drm_mode_config_funcs; in host1x_drm_probe()
1183 drm->mode_config.helper_private = &tegra_drm_mode_config_helpers; in host1x_drm_probe()
1196 tegra->hmask = drm->mode_config.max_width - 1; in host1x_drm_probe()
1197 tegra->vmask = drm->mode_config.max_height - 1; in host1x_drm_probe()
1199 if (tegra->use_explicit_iommu) { in host1x_drm_probe()
1201 u64 dma_mask = dma_get_mask(&dev->dev); in host1x_drm_probe()
1205 start = tegra->domain->geometry.aperture_start & dma_mask; in host1x_drm_probe()
1206 end = tegra->domain->geometry.aperture_end & dma_mask; in host1x_drm_probe()
1209 gem_end = end - CARVEOUT_SZ; in host1x_drm_probe()
1213 order = __ffs(tegra->domain->pgsize_bitmap); in host1x_drm_probe()
1214 init_iova_domain(&tegra->carveout.domain, 1UL << order, in host1x_drm_probe()
1217 tegra->carveout.shift = iova_shift(&tegra->carveout.domain); in host1x_drm_probe()
1218 tegra->carveout.limit = carveout_end >> tegra->carveout.shift; in host1x_drm_probe()
1220 drm_mm_init(&tegra->mm, gem_start, gem_end - gem_start + 1); in host1x_drm_probe()
1221 mutex_init(&tegra->mm_lock); in host1x_drm_probe()
1224 DRM_DEBUG_DRIVER(" GEM: %#llx-%#llx\n", gem_start, gem_end); in host1x_drm_probe()
1225 DRM_DEBUG_DRIVER(" Carveout: %#llx-%#llx\n", carveout_start, in host1x_drm_probe()
1227 } else if (tegra->domain) { in host1x_drm_probe()
1228 iommu_domain_free(tegra->domain); in host1x_drm_probe()
1229 tegra->domain = NULL; in host1x_drm_probe()
1233 if (tegra->hub) { in host1x_drm_probe()
1234 err = tegra_display_hub_prepare(tegra->hub); in host1x_drm_probe()
1239 /* syncpoints are used for full 32-bit hardware VBLANK counters */ in host1x_drm_probe()
1240 drm->max_vblank_count = 0xffffffff; in host1x_drm_probe()
1242 err = drm_vblank_init(drm, drm->mode_config.num_crtc); in host1x_drm_probe()
1257 if (drm->mode_config.num_crtc > 0) { in host1x_drm_probe()
1266 drm->driver_features &= ~(DRIVER_MODESET | DRIVER_ATOMIC); in host1x_drm_probe()
1278 if (tegra->hub) in host1x_drm_probe()
1279 tegra_display_hub_cleanup(tegra->hub); in host1x_drm_probe()
1281 if (tegra->domain) { in host1x_drm_probe()
1282 mutex_destroy(&tegra->mm_lock); in host1x_drm_probe()
1283 drm_mm_takedown(&tegra->mm); in host1x_drm_probe()
1284 put_iova_domain(&tegra->carveout.domain); in host1x_drm_probe()
1293 if (tegra->domain) in host1x_drm_probe()
1294 iommu_domain_free(tegra->domain); in host1x_drm_probe()
1304 struct drm_device *drm = dev_get_drvdata(&dev->dev); in host1x_drm_remove()
1305 struct tegra_drm *tegra = drm->dev_private; in host1x_drm_remove()
1314 if (tegra->hub) in host1x_drm_remove()
1315 tegra_display_hub_cleanup(tegra->hub); in host1x_drm_remove()
1319 dev_err(&dev->dev, "host1x device cleanup failed: %d\n", err); in host1x_drm_remove()
1321 if (tegra->domain) { in host1x_drm_remove()
1322 mutex_destroy(&tegra->mm_lock); in host1x_drm_remove()
1323 drm_mm_takedown(&tegra->mm); in host1x_drm_remove()
1324 put_iova_domain(&tegra->carveout.domain); in host1x_drm_remove()
1326 iommu_domain_free(tegra->domain); in host1x_drm_remove()
1337 drm_atomic_helper_shutdown(dev_get_drvdata(&dev->dev)); in host1x_drm_shutdown()
1360 { .compatible = "nvidia,tegra20-dc", },
1361 { .compatible = "nvidia,tegra20-hdmi", },
1362 { .compatible = "nvidia,tegra20-gr2d", },
1363 { .compatible = "nvidia,tegra20-gr3d", },
1364 { .compatible = "nvidia,tegra30-dc", },
1365 { .compatible = "nvidia,tegra30-hdmi", },
1366 { .compatible = "nvidia,tegra30-gr2d", },
1367 { .compatible = "nvidia,tegra30-gr3d", },
1368 { .compatible = "nvidia,tegra114-dc", },
1369 { .compatible = "nvidia,tegra114-dsi", },
1370 { .compatible = "nvidia,tegra114-hdmi", },
1371 { .compatible = "nvidia,tegra114-gr2d", },
1372 { .compatible = "nvidia,tegra114-gr3d", },
1373 { .compatible = "nvidia,tegra124-dc", },
1374 { .compatible = "nvidia,tegra124-sor", },
1375 { .compatible = "nvidia,tegra124-hdmi", },
1376 { .compatible = "nvidia,tegra124-dsi", },
1377 { .compatible = "nvidia,tegra124-vic", },
1378 { .compatible = "nvidia,tegra132-dsi", },
1379 { .compatible = "nvidia,tegra210-dc", },
1380 { .compatible = "nvidia,tegra210-dsi", },
1381 { .compatible = "nvidia,tegra210-sor", },
1382 { .compatible = "nvidia,tegra210-sor1", },
1383 { .compatible = "nvidia,tegra210-vic", },
1384 { .compatible = "nvidia,tegra210-nvdec", },
1385 { .compatible = "nvidia,tegra186-display", },
1386 { .compatible = "nvidia,tegra186-dc", },
1387 { .compatible = "nvidia,tegra186-sor", },
1388 { .compatible = "nvidia,tegra186-sor1", },
1389 { .compatible = "nvidia,tegra186-vic", },
1390 { .compatible = "nvidia,tegra186-nvdec", },
1391 { .compatible = "nvidia,tegra194-display", },
1392 { .compatible = "nvidia,tegra194-dc", },
1393 { .compatible = "nvidia,tegra194-sor", },
1394 { .compatible = "nvidia,tegra194-vic", },
1395 { .compatible = "nvidia,tegra194-nvdec", },
1396 { .compatible = "nvidia,tegra234-vic", },
1397 { .compatible = "nvidia,tegra234-nvdec", },
1430 return -ENODEV; in host1x_drm_init()
1455 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");