Lines Matching refs:tegra_plane_writel
90 static inline void tegra_plane_writel(struct tegra_plane *plane, u32 value, in tegra_plane_writel() function
182 tegra_plane_writel(plane, blendnokey, DC_WIN_BLEND_NOKEY); in tegra_plane_setup_blending_legacy()
183 tegra_plane_writel(plane, foreground, DC_WIN_BLEND_1WIN); in tegra_plane_setup_blending_legacy()
262 tegra_plane_writel(plane, background[0], DC_WIN_BLEND_2WIN_X); in tegra_plane_setup_blending_legacy()
263 tegra_plane_writel(plane, background[1], DC_WIN_BLEND_2WIN_Y); in tegra_plane_setup_blending_legacy()
264 tegra_plane_writel(plane, background[2], DC_WIN_BLEND_3WIN_XY); in tegra_plane_setup_blending_legacy()
281 tegra_plane_writel(plane, blending[0], DC_WIN_BLEND_2WIN_X); in tegra_plane_setup_blending_legacy()
282 tegra_plane_writel(plane, blending[1], DC_WIN_BLEND_2WIN_Y); in tegra_plane_setup_blending_legacy()
283 tegra_plane_writel(plane, background[2], DC_WIN_BLEND_3WIN_XY); in tegra_plane_setup_blending_legacy()
287 tegra_plane_writel(plane, foreground, DC_WIN_BLEND_2WIN_X); in tegra_plane_setup_blending_legacy()
288 tegra_plane_writel(plane, foreground, DC_WIN_BLEND_2WIN_Y); in tegra_plane_setup_blending_legacy()
289 tegra_plane_writel(plane, foreground, DC_WIN_BLEND_3WIN_XY); in tegra_plane_setup_blending_legacy()
302 tegra_plane_writel(plane, value, DC_WIN_BLEND_MATCH_SELECT); in tegra_plane_setup_blending()
307 tegra_plane_writel(plane, value, DC_WIN_BLEND_NOMATCH_SELECT); in tegra_plane_setup_blending()
310 tegra_plane_writel(plane, value, DC_WIN_BLEND_LAYER_CONTROL); in tegra_plane_setup_blending()
365 tegra_plane_writel(plane, window->format, DC_WIN_COLOR_DEPTH); in tegra_dc_setup_window()
366 tegra_plane_writel(plane, window->swap, DC_WIN_BYTE_SWAP); in tegra_dc_setup_window()
369 tegra_plane_writel(plane, value, DC_WIN_POSITION); in tegra_dc_setup_window()
372 tegra_plane_writel(plane, value, DC_WIN_SIZE); in tegra_dc_setup_window()
386 tegra_plane_writel(plane, value, DC_WIN_PRESCALED_SIZE); in tegra_dc_setup_window()
399 tegra_plane_writel(plane, value, DC_WIN_DDA_INC); in tegra_dc_setup_window()
404 tegra_plane_writel(plane, h_dda, DC_WIN_H_INITIAL_DDA); in tegra_dc_setup_window()
405 tegra_plane_writel(plane, v_dda, DC_WIN_V_INITIAL_DDA); in tegra_dc_setup_window()
407 tegra_plane_writel(plane, 0, DC_WIN_UV_BUF_STRIDE); in tegra_dc_setup_window()
408 tegra_plane_writel(plane, 0, DC_WIN_BUF_STRIDE); in tegra_dc_setup_window()
410 tegra_plane_writel(plane, window->base[0], DC_WINBUF_START_ADDR); in tegra_dc_setup_window()
413 tegra_plane_writel(plane, window->base[1], DC_WINBUF_START_ADDR_U); in tegra_dc_setup_window()
416 tegra_plane_writel(plane, window->base[2], DC_WINBUF_START_ADDR_V); in tegra_dc_setup_window()
419 tegra_plane_writel(plane, value, DC_WIN_LINE_STRIDE); in tegra_dc_setup_window()
421 tegra_plane_writel(plane, window->stride[0], DC_WIN_LINE_STRIDE); in tegra_dc_setup_window()
424 tegra_plane_writel(plane, h_offset, DC_WINBUF_ADDR_H_OFFSET); in tegra_dc_setup_window()
425 tegra_plane_writel(plane, v_offset, DC_WINBUF_ADDR_V_OFFSET); in tegra_dc_setup_window()
445 tegra_plane_writel(plane, value, DC_WINBUF_SURFACE_KIND); in tegra_dc_setup_window()
466 tegra_plane_writel(plane, value, DC_WIN_BUFFER_ADDR_MODE); in tegra_dc_setup_window()
473 tegra_plane_writel(plane, 0x00f0, DC_WIN_CSC_YOF); in tegra_dc_setup_window()
474 tegra_plane_writel(plane, 0x012a, DC_WIN_CSC_KYRGB); in tegra_dc_setup_window()
475 tegra_plane_writel(plane, 0x0000, DC_WIN_CSC_KUR); in tegra_dc_setup_window()
476 tegra_plane_writel(plane, 0x0198, DC_WIN_CSC_KVR); in tegra_dc_setup_window()
477 tegra_plane_writel(plane, 0x039b, DC_WIN_CSC_KUG); in tegra_dc_setup_window()
478 tegra_plane_writel(plane, 0x032f, DC_WIN_CSC_KVG); in tegra_dc_setup_window()
479 tegra_plane_writel(plane, 0x0204, DC_WIN_CSC_KUB); in tegra_dc_setup_window()
480 tegra_plane_writel(plane, 0x0000, DC_WIN_CSC_KVB); in tegra_dc_setup_window()
498 tegra_plane_writel(plane, 0x00008000, DC_WIN_H_FILTER_P(0)); in tegra_dc_setup_window()
499 tegra_plane_writel(plane, 0x3e087ce1, DC_WIN_H_FILTER_P(1)); in tegra_dc_setup_window()
500 tegra_plane_writel(plane, 0x3b117ac1, DC_WIN_H_FILTER_P(2)); in tegra_dc_setup_window()
501 tegra_plane_writel(plane, 0x591b73aa, DC_WIN_H_FILTER_P(3)); in tegra_dc_setup_window()
502 tegra_plane_writel(plane, 0x57256d9a, DC_WIN_H_FILTER_P(4)); in tegra_dc_setup_window()
503 tegra_plane_writel(plane, 0x552f668b, DC_WIN_H_FILTER_P(5)); in tegra_dc_setup_window()
504 tegra_plane_writel(plane, 0x73385e8b, DC_WIN_H_FILTER_P(6)); in tegra_dc_setup_window()
505 tegra_plane_writel(plane, 0x72435583, DC_WIN_H_FILTER_P(7)); in tegra_dc_setup_window()
506 tegra_plane_writel(plane, 0x714c4c8b, DC_WIN_H_FILTER_P(8)); in tegra_dc_setup_window()
507 tegra_plane_writel(plane, 0x70554393, DC_WIN_H_FILTER_P(9)); in tegra_dc_setup_window()
508 tegra_plane_writel(plane, 0x715e389b, DC_WIN_H_FILTER_P(10)); in tegra_dc_setup_window()
509 tegra_plane_writel(plane, 0x71662faa, DC_WIN_H_FILTER_P(11)); in tegra_dc_setup_window()
510 tegra_plane_writel(plane, 0x536d25ba, DC_WIN_H_FILTER_P(12)); in tegra_dc_setup_window()
511 tegra_plane_writel(plane, 0x55731bca, DC_WIN_H_FILTER_P(13)); in tegra_dc_setup_window()
512 tegra_plane_writel(plane, 0x387a11d9, DC_WIN_H_FILTER_P(14)); in tegra_dc_setup_window()
513 tegra_plane_writel(plane, 0x3c7c08f1, DC_WIN_H_FILTER_P(15)); in tegra_dc_setup_window()
526 tegra_plane_writel(plane, k, DC_WIN_V_FILTER_P(i)); in tegra_dc_setup_window()
531 tegra_plane_writel(plane, value, DC_WIN_WIN_OPTIONS); in tegra_dc_setup_window()
723 tegra_plane_writel(p, value, DC_WIN_WIN_OPTIONS); in tegra_plane_atomic_disable()