Lines Matching +full:m +full:- +full:phy
1 // SPDX-License-Identifier: GPL-2.0+
6 #include <linux/clk-provider.h>
12 struct sun8i_hdmi_phy *phy; member
23 unsigned long rate = req->rate; in sun8i_phy_clk_determine_rate()
49 abs(rate - rounded / i) < in sun8i_phy_clk_determine_rate()
50 abs(rate - best_rate / best_div)) { in sun8i_phy_clk_determine_rate()
61 req->rate = best_rate / best_div; in sun8i_phy_clk_determine_rate()
62 req->best_parent_rate = best_rate; in sun8i_phy_clk_determine_rate()
63 req->best_parent_hw = best_parent; in sun8i_phy_clk_determine_rate()
74 regmap_read(priv->phy->regs, SUN8I_HDMI_PHY_PLL_CFG2_REG, ®); in sun8i_phy_clk_recalc_rate()
86 u8 best_m = 0, m; in sun8i_phy_clk_set_rate() local
88 for (m = 1; m <= 16; m++) { in sun8i_phy_clk_set_rate()
89 unsigned long tmp_rate = parent_rate / m; in sun8i_phy_clk_set_rate()
95 (rate - tmp_rate) < (rate - best_rate)) { in sun8i_phy_clk_set_rate()
97 best_m = m; in sun8i_phy_clk_set_rate()
101 regmap_update_bits(priv->phy->regs, SUN8I_HDMI_PHY_PLL_CFG2_REG, in sun8i_phy_clk_set_rate()
113 regmap_read(priv->phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG, ®); in sun8i_phy_clk_get_parent()
125 return -EINVAL; in sun8i_phy_clk_set_parent()
127 regmap_update_bits(priv->phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG, in sun8i_phy_clk_set_parent()
143 int sun8i_phy_clk_create(struct sun8i_hdmi_phy *phy, struct device *dev, in sun8i_phy_clk_create() argument
150 parents[0] = __clk_get_name(phy->clk_pll0); in sun8i_phy_clk_create()
152 return -ENODEV; in sun8i_phy_clk_create()
155 parents[1] = __clk_get_name(phy->clk_pll1); in sun8i_phy_clk_create()
157 return -ENODEV; in sun8i_phy_clk_create()
162 return -ENOMEM; in sun8i_phy_clk_create()
164 init.name = "hdmi-phy-clk"; in sun8i_phy_clk_create()
170 priv->phy = phy; in sun8i_phy_clk_create()
171 priv->hw.init = &init; in sun8i_phy_clk_create()
173 phy->clk_phy = devm_clk_register(dev, &priv->hw); in sun8i_phy_clk_create()
174 if (IS_ERR(phy->clk_phy)) in sun8i_phy_clk_create()
175 return PTR_ERR(phy->clk_phy); in sun8i_phy_clk_create()