drm/sun4i/sun4i_hdmi.h

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5  * Maxime Ripard <maxime.ripard@free-electrons.com>
15 #include <media/cec-pin.h>
37 #define SUN4I_HDMI_VID_TIMING_X(x)		((((x) - 1) & GENMASK(11, 0)))
38 #define SUN4I_HDMI_VID_TIMING_Y(y)		((((y) - 1) & GENMASK(11, 0)) << 16)
135 #define SUN4I_HDMI_DDC_FIFO_CTRL_RX_THRES_MAX	(BIT(4) - 1)
138 #define SUN4I_HDMI_DDC_FIFO_CTRL_TX_THRES_MAX	(BIT(4) - 1)
143 #define SUN4I_HDMI_DDC_BYTE_COUNT_MAX		(BIT(10) - 1)
187 /* DDC CLK bit fields are the same, but the formula is not */
226 	/* DDC FIFO register offset */
230 	 * DDC FIFO threshold boundary conditions
235 	 * On sun5i the threshold is exclusive, i.e. does not include,
237 	 * On sun6i the threshold is inclusive, i.e. includes, the