Lines Matching refs:ldev
61 #define LAY_OFS (ldev->caps.layer_ofs)
87 #define LTDC_L1C0R (ldev->caps.layer_regs[0]) /* L1 configuration 0 */
88 #define LTDC_L1C1R (ldev->caps.layer_regs[1]) /* L1 configuration 1 */
89 #define LTDC_L1RCR (ldev->caps.layer_regs[2]) /* L1 reload control */
90 #define LTDC_L1CR (ldev->caps.layer_regs[3]) /* L1 control register */
91 #define LTDC_L1WHPCR (ldev->caps.layer_regs[4]) /* L1 window horizontal position configuration */
92 #define LTDC_L1WVPCR (ldev->caps.layer_regs[5]) /* L1 window vertical position configuration */
93 #define LTDC_L1CKCR (ldev->caps.layer_regs[6]) /* L1 color keying configuration */
94 #define LTDC_L1PFCR (ldev->caps.layer_regs[7]) /* L1 pixel format configuration */
95 #define LTDC_L1CACR (ldev->caps.layer_regs[8]) /* L1 constant alpha configuration */
96 #define LTDC_L1DCCR (ldev->caps.layer_regs[9]) /* L1 default color configuration */
97 #define LTDC_L1BFCR (ldev->caps.layer_regs[10]) /* L1 blending factors configuration */
98 #define LTDC_L1BLCR (ldev->caps.layer_regs[11]) /* L1 burst length configuration */
99 #define LTDC_L1PCR (ldev->caps.layer_regs[12]) /* L1 planar configuration */
100 #define LTDC_L1CFBAR (ldev->caps.layer_regs[13]) /* L1 color frame buffer address */
101 #define LTDC_L1CFBLR (ldev->caps.layer_regs[14]) /* L1 color frame buffer length */
102 #define LTDC_L1CFBLNR (ldev->caps.layer_regs[15]) /* L1 color frame buffer line number */
103 #define LTDC_L1AFBA0R (ldev->caps.layer_regs[16]) /* L1 auxiliary frame buffer address 0 */
104 #define LTDC_L1AFBA1R (ldev->caps.layer_regs[17]) /* L1 auxiliary frame buffer address 1 */
105 #define LTDC_L1AFBLR (ldev->caps.layer_regs[18]) /* L1 auxiliary frame buffer length */
106 #define LTDC_L1AFBLNR (ldev->caps.layer_regs[19]) /* L1 auxiliary frame buffer line number */
107 #define LTDC_L1CLUTWR (ldev->caps.layer_regs[20]) /* L1 CLUT write */
108 #define LTDC_L1CYR0R (ldev->caps.layer_regs[21]) /* L1 Conversion YCbCr RGB 0 */
109 #define LTDC_L1CYR1R (ldev->caps.layer_regs[22]) /* L1 Conversion YCbCr RGB 1 */
110 #define LTDC_L1FPF0R (ldev->caps.layer_regs[23]) /* L1 Flexible Pixel Format 0 */
111 #define LTDC_L1FPF1R (ldev->caps.layer_regs[24]) /* L1 Flexible Pixel Format 1 */
552 struct ltdc_device *ldev = plane_to_ltdc(plane); in ltdc_set_flexible_pixel_format() local
593 regmap_write(ldev->regmap, LTDC_L1FPF0R + lofs, in ltdc_set_flexible_pixel_format()
596 regmap_write(ldev->regmap, LTDC_L1FPF1R + lofs, in ltdc_set_flexible_pixel_format()
614 struct ltdc_device *ldev = plane_to_ltdc(plane); in ltdc_set_ycbcr_config() local
655 regmap_write(ldev->regmap, LTDC_L1PCR + lofs, val); in ltdc_set_ycbcr_config()
660 struct ltdc_device *ldev = plane_to_ltdc(plane); in ltdc_set_ycbcr_coeffs() local
679 regmap_write(ldev->regmap, LTDC_L1CYR0R + lofs, in ltdc_set_ycbcr_coeffs()
681 regmap_write(ldev->regmap, LTDC_L1CYR1R + lofs, in ltdc_set_ycbcr_coeffs()
685 static inline void ltdc_irq_crc_handle(struct ltdc_device *ldev, in ltdc_irq_crc_handle() argument
691 if (ldev->crc_skip_count < CRC_SKIP_FRAMES) { in ltdc_irq_crc_handle()
692 ldev->crc_skip_count++; in ltdc_irq_crc_handle()
697 ret = regmap_read(ldev->regmap, LTDC_CCRCR, &crc); in ltdc_irq_crc_handle()
708 struct ltdc_device *ldev = ddev->dev_private; in ltdc_irq_thread() local
712 if (ldev->irq_status & ISR_LIF) { in ltdc_irq_thread()
716 if (ldev->crc_active) in ltdc_irq_thread()
717 ltdc_irq_crc_handle(ldev, crtc); in ltdc_irq_thread()
720 mutex_lock(&ldev->err_lock); in ltdc_irq_thread()
721 if (ldev->irq_status & ISR_TERRIF) in ltdc_irq_thread()
722 ldev->transfer_err++; in ltdc_irq_thread()
723 if (ldev->irq_status & ISR_FUEIF) in ltdc_irq_thread()
724 ldev->fifo_err++; in ltdc_irq_thread()
725 if (ldev->irq_status & ISR_FUWIF) in ltdc_irq_thread()
726 ldev->fifo_warn++; in ltdc_irq_thread()
727 mutex_unlock(&ldev->err_lock); in ltdc_irq_thread()
735 struct ltdc_device *ldev = ddev->dev_private; in ltdc_irq() local
742 ldev->irq_status = readl_relaxed(ldev->regs + LTDC_ISR); in ltdc_irq()
743 writel_relaxed(ldev->irq_status, ldev->regs + LTDC_ICR); in ltdc_irq()
754 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_update_clut() local
767 regmap_write(ldev->regmap, LTDC_L1CLUTWR, val); in ltdc_crtc_update_clut()
774 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_atomic_enable() local
782 regmap_write(ldev->regmap, LTDC_BCCR, BCCR_BCBLACK); in ltdc_crtc_atomic_enable()
785 regmap_set_bits(ldev->regmap, LTDC_IER, IER_FUWIE | IER_FUEIE | IER_TERRIE); in ltdc_crtc_atomic_enable()
788 if (!ldev->caps.plane_reg_shadow) in ltdc_crtc_atomic_enable()
789 regmap_set_bits(ldev->regmap, LTDC_SRCR, SRCR_VBR); in ltdc_crtc_atomic_enable()
797 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_atomic_disable() local
806 for (layer_index = 0; layer_index < ldev->caps.nb_layers; layer_index++) in ltdc_crtc_atomic_disable()
807 regmap_write_bits(ldev->regmap, LTDC_L1CR + layer_index * LAY_OFS, LXCR_MASK, 0); in ltdc_crtc_atomic_disable()
810 regmap_clear_bits(ldev->regmap, LTDC_IER, IER_FUWIE | IER_FUEIE | IER_TERRIE); in ltdc_crtc_atomic_disable()
813 if (!ldev->caps.plane_reg_shadow) in ltdc_crtc_atomic_disable()
814 regmap_set_bits(ldev->regmap, LTDC_SRCR, SRCR_IMR); in ltdc_crtc_atomic_disable()
819 mutex_lock(&ldev->err_lock); in ltdc_crtc_atomic_disable()
820 ldev->transfer_err = 0; in ltdc_crtc_atomic_disable()
821 ldev->fifo_err = 0; in ltdc_crtc_atomic_disable()
822 ldev->fifo_warn = 0; in ltdc_crtc_atomic_disable()
823 mutex_unlock(&ldev->err_lock); in ltdc_crtc_atomic_disable()
832 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_mode_valid() local
838 result = clk_round_rate(ldev->pixel_clk, target); in ltdc_crtc_mode_valid()
843 if (result > ldev->caps.pad_max_freq_hz) in ltdc_crtc_mode_valid()
871 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_mode_fixup() local
874 if (clk_set_rate(ldev->pixel_clk, rate) < 0) { in ltdc_crtc_mode_fixup()
879 adjusted_mode->clock = clk_get_rate(ldev->pixel_clk) / 1000; in ltdc_crtc_mode_fixup()
889 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_mode_set_nofb() local
977 regmap_update_bits(ldev->regmap, LTDC_GCR, in ltdc_crtc_mode_set_nofb()
982 regmap_update_bits(ldev->regmap, LTDC_SSCR, SSCR_VSH | SSCR_HSW, val); in ltdc_crtc_mode_set_nofb()
986 regmap_update_bits(ldev->regmap, LTDC_BPCR, BPCR_AVBP | BPCR_AHBP, val); in ltdc_crtc_mode_set_nofb()
990 regmap_update_bits(ldev->regmap, LTDC_AWCR, AWCR_AAW | AWCR_AAH, val); in ltdc_crtc_mode_set_nofb()
994 regmap_update_bits(ldev->regmap, LTDC_TWCR, TWCR_TOTALH | TWCR_TOTALW, val); in ltdc_crtc_mode_set_nofb()
996 regmap_write(ldev->regmap, LTDC_LIPCR, (accum_act_h + 1)); in ltdc_crtc_mode_set_nofb()
999 if (ldev->caps.ycbcr_output) { in ltdc_crtc_mode_set_nofb()
1015 regmap_write(ldev->regmap, LTDC_EDCR, EDCR_OCYEN | val); in ltdc_crtc_mode_set_nofb()
1019 regmap_write(ldev->regmap, LTDC_EDCR, EDCR_OCYEN | EDCR_OCYCO | val); in ltdc_crtc_mode_set_nofb()
1023 regmap_write(ldev->regmap, LTDC_EDCR, 0); in ltdc_crtc_mode_set_nofb()
1032 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_atomic_flush() local
1041 if (!ldev->caps.plane_reg_shadow) in ltdc_crtc_atomic_flush()
1042 regmap_set_bits(ldev->regmap, LTDC_SRCR, SRCR_VBR); in ltdc_crtc_atomic_flush()
1063 struct ltdc_device *ldev = ddev->dev_private; in ltdc_crtc_get_scanout_position() local
1084 regmap_read(ldev->regmap, LTDC_CPSR, &line); in ltdc_crtc_get_scanout_position()
1086 regmap_read(ldev->regmap, LTDC_BPCR, &vactive_start); in ltdc_crtc_get_scanout_position()
1088 regmap_read(ldev->regmap, LTDC_AWCR, &vactive_end); in ltdc_crtc_get_scanout_position()
1090 regmap_read(ldev->regmap, LTDC_TWCR, &vtotal); in ltdc_crtc_get_scanout_position()
1121 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_enable_vblank() local
1127 regmap_set_bits(ldev->regmap, LTDC_IER, IER_LIE); in ltdc_crtc_enable_vblank()
1136 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_disable_vblank() local
1139 regmap_clear_bits(ldev->regmap, LTDC_IER, IER_LIE); in ltdc_crtc_disable_vblank()
1144 struct ltdc_device *ldev; in ltdc_crtc_set_crc_source() local
1152 ldev = crtc_to_ltdc(crtc); in ltdc_crtc_set_crc_source()
1155 ldev->crc_active = true; in ltdc_crtc_set_crc_source()
1156 ret = regmap_set_bits(ldev->regmap, LTDC_GCR, GCR_CRCEN); in ltdc_crtc_set_crc_source()
1158 ldev->crc_active = false; in ltdc_crtc_set_crc_source()
1159 ret = regmap_clear_bits(ldev->regmap, LTDC_GCR, GCR_CRCEN); in ltdc_crtc_set_crc_source()
1164 ldev->crc_skip_count = 0; in ltdc_crtc_set_crc_source()
1190 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_atomic_print_state() local
1192 drm_printf(p, "\ttransfer_error=%d\n", ldev->transfer_err); in ltdc_crtc_atomic_print_state()
1193 drm_printf(p, "\tfifo_underrun_error=%d\n", ldev->fifo_err); in ltdc_crtc_atomic_print_state()
1194 drm_printf(p, "\tfifo_underrun_warning=%d\n", ldev->fifo_warn); in ltdc_crtc_atomic_print_state()
1195 drm_printf(p, "\tfifo_underrun_threshold=%d\n", ldev->fifo_threshold); in ltdc_crtc_atomic_print_state()
1258 struct ltdc_device *ldev = plane_to_ltdc(plane); in ltdc_plane_atomic_update() local
1289 regmap_read(ldev->regmap, LTDC_BPCR, &bpcr); in ltdc_plane_atomic_update()
1296 regmap_write_bits(ldev->regmap, LTDC_L1WHPCR + lofs, in ltdc_plane_atomic_update()
1301 regmap_write_bits(ldev->regmap, LTDC_L1WVPCR + lofs, in ltdc_plane_atomic_update()
1307 if (ldev->caps.pix_fmt_hw[val] == pf) in ltdc_plane_atomic_update()
1311 if (ldev->caps.pix_fmt_flex && val == NB_PF) in ltdc_plane_atomic_update()
1319 regmap_write_bits(ldev->regmap, LTDC_L1PFCR + lofs, LXPFCR_PF, val); in ltdc_plane_atomic_update()
1323 regmap_write_bits(ldev->regmap, LTDC_L1CACR + lofs, LXCACR_CONSTA, val); in ltdc_plane_atomic_update()
1331 if (ldev->caps.non_alpha_only_l1 && in ltdc_plane_atomic_update()
1335 if (ldev->caps.dynamic_zorder) { in ltdc_plane_atomic_update()
1337 regmap_write_bits(ldev->regmap, LTDC_L1BFCR + lofs, in ltdc_plane_atomic_update()
1340 regmap_write_bits(ldev->regmap, LTDC_L1BFCR + lofs, in ltdc_plane_atomic_update()
1354 regmap_write(ldev->regmap, LTDC_L1CFBAR + lofs, paddr); in ltdc_plane_atomic_update()
1358 (x1 - x0 + 1) + (ldev->caps.bus_width >> 3) - 1; in ltdc_plane_atomic_update()
1367 regmap_write_bits(ldev->regmap, LTDC_L1CFBLR + lofs, LXCFBLR_CFBLL | LXCFBLR_CFBP, val); in ltdc_plane_atomic_update()
1371 regmap_write_bits(ldev->regmap, LTDC_L1CFBLNR + lofs, LXCFBLNR_CFBLN, line_number); in ltdc_plane_atomic_update()
1373 if (ldev->caps.ycbcr_input) { in ltdc_plane_atomic_update()
1387 regmap_write(ldev->regmap, LTDC_L1AFBA0R + lofs, paddr1); in ltdc_plane_atomic_update()
1404 regmap_write(ldev->regmap, LTDC_L1AFBA0R + lofs, paddr1); in ltdc_plane_atomic_update()
1405 regmap_write(ldev->regmap, LTDC_L1AFBA1R + lofs, paddr2); in ltdc_plane_atomic_update()
1422 regmap_write(ldev->regmap, LTDC_L1AFBA0R + lofs, paddr1); in ltdc_plane_atomic_update()
1423 regmap_write(ldev->regmap, LTDC_L1AFBA1R + lofs, paddr2); in ltdc_plane_atomic_update()
1442 (ldev->caps.bus_width >> 3) - 1; in ltdc_plane_atomic_update()
1446 regmap_write(ldev->regmap, LTDC_L1AFBLR + lofs, val); in ltdc_plane_atomic_update()
1450 regmap_write(ldev->regmap, LTDC_L1AFBLNR + lofs, val); in ltdc_plane_atomic_update()
1460 regmap_write(ldev->regmap, LTDC_L1PCR + lofs, 0); in ltdc_plane_atomic_update()
1472 regmap_write_bits(ldev->regmap, LTDC_L1CR + lofs, LXCR_MASK, val); in ltdc_plane_atomic_update()
1475 if (ldev->caps.plane_reg_shadow) in ltdc_plane_atomic_update()
1476 regmap_write_bits(ldev->regmap, LTDC_L1RCR + lofs, in ltdc_plane_atomic_update()
1479 ldev->plane_fpsi[plane->index].counter++; in ltdc_plane_atomic_update()
1481 mutex_lock(&ldev->err_lock); in ltdc_plane_atomic_update()
1482 if (ldev->transfer_err) { in ltdc_plane_atomic_update()
1483 DRM_WARN("ltdc transfer error: %d\n", ldev->transfer_err); in ltdc_plane_atomic_update()
1484 ldev->transfer_err = 0; in ltdc_plane_atomic_update()
1487 if (ldev->caps.fifo_threshold) { in ltdc_plane_atomic_update()
1488 if (ldev->fifo_err) { in ltdc_plane_atomic_update()
1490 ldev->fifo_err = 0; in ltdc_plane_atomic_update()
1493 if (ldev->fifo_warn >= ldev->fifo_threshold) { in ltdc_plane_atomic_update()
1495 ldev->fifo_warn = 0; in ltdc_plane_atomic_update()
1498 mutex_unlock(&ldev->err_lock); in ltdc_plane_atomic_update()
1506 struct ltdc_device *ldev = plane_to_ltdc(plane); in ltdc_plane_atomic_disable() local
1510 regmap_write_bits(ldev->regmap, LTDC_L1CR + lofs, LXCR_MASK, 0); in ltdc_plane_atomic_disable()
1513 regmap_write_bits(ldev->regmap, LTDC_L1CACR + lofs, LXCACR_CONSTA, 0x00); in ltdc_plane_atomic_disable()
1516 if (ldev->caps.plane_reg_shadow) in ltdc_plane_atomic_disable()
1517 regmap_write_bits(ldev->regmap, LTDC_L1RCR + lofs, in ltdc_plane_atomic_disable()
1528 struct ltdc_device *ldev = plane_to_ltdc(plane); in ltdc_plane_atomic_print_state() local
1529 struct fps_info *fpsi = &ldev->plane_fpsi[plane->index]; in ltdc_plane_atomic_print_state()
1563 struct ltdc_device *ldev = ddev->dev_private; in ltdc_plane_create() local
1574 formats = devm_kzalloc(dev, (ldev->caps.pix_fmt_nb + in ltdc_plane_create()
1582 for (i = 0; i < ldev->caps.pix_fmt_nb; i++) { in ltdc_plane_create()
1583 drm_fmt = ldev->caps.pix_fmt_drm[i]; in ltdc_plane_create()
1586 if (ldev->caps.non_alpha_only_l1) in ltdc_plane_create()
1595 if (ldev->caps.ycbcr_input) { in ltdc_plane_create()
1596 regmap_read(ldev->regmap, LTDC_L1C1R + lofs, &val); in ltdc_plane_create()
1620 if (ldev->caps.ycbcr_input) { in ltdc_plane_create()
1642 struct ltdc_device *ldev = ddev->dev_private; in ltdc_crtc_init() local
1654 if (ldev->caps.dynamic_zorder) in ltdc_crtc_init()
1655 drm_plane_create_zpos_property(primary, 0, 0, ldev->caps.nb_layers - 1); in ltdc_crtc_init()
1659 if (ldev->caps.plane_rotation) in ltdc_crtc_init()
1664 if (ldev->caps.crc) in ltdc_crtc_init()
1683 for (i = 1; i < ldev->caps.nb_layers; i++) { in ltdc_crtc_init()
1689 if (ldev->caps.dynamic_zorder) in ltdc_crtc_init()
1690 drm_plane_create_zpos_property(overlay, i, 0, ldev->caps.nb_layers - 1); in ltdc_crtc_init()
1694 if (ldev->caps.plane_rotation) in ltdc_crtc_init()
1705 struct ltdc_device *ldev = ddev->dev_private; in ltdc_encoder_disable() local
1710 regmap_clear_bits(ldev->regmap, LTDC_GCR, GCR_LTDCEN); in ltdc_encoder_disable()
1719 struct ltdc_device *ldev = ddev->dev_private; in ltdc_encoder_enable() local
1724 if (ldev->caps.fifo_threshold) in ltdc_encoder_enable()
1725 regmap_write(ldev->regmap, LTDC_FUT, ldev->fifo_threshold); in ltdc_encoder_enable()
1728 regmap_set_bits(ldev->regmap, LTDC_GCR, GCR_LTDCEN); in ltdc_encoder_enable()
1780 struct ltdc_device *ldev = ddev->dev_private; in ltdc_get_caps() local
1787 regmap_read(ldev->regmap, LTDC_LCR, &lcr); in ltdc_get_caps()
1789 ldev->caps.nb_layers = clamp((int)lcr, 1, LTDC_MAX_LAYER); in ltdc_get_caps()
1792 regmap_read(ldev->regmap, LTDC_GC2R, &gc2r); in ltdc_get_caps()
1794 ldev->caps.bus_width = 8 << bus_width_log2; in ltdc_get_caps()
1795 regmap_read(ldev->regmap, LTDC_IDR, &ldev->caps.hw_version); in ltdc_get_caps()
1797 switch (ldev->caps.hw_version) { in ltdc_get_caps()
1800 ldev->caps.layer_ofs = LAY_OFS_0; in ltdc_get_caps()
1801 ldev->caps.layer_regs = ltdc_layer_regs_a0; in ltdc_get_caps()
1802 ldev->caps.pix_fmt_hw = ltdc_pix_fmt_a0; in ltdc_get_caps()
1803 ldev->caps.pix_fmt_drm = ltdc_drm_fmt_a0; in ltdc_get_caps()
1804 ldev->caps.pix_fmt_nb = ARRAY_SIZE(ltdc_drm_fmt_a0); in ltdc_get_caps()
1805 ldev->caps.pix_fmt_flex = false; in ltdc_get_caps()
1813 ldev->caps.non_alpha_only_l1 = true; in ltdc_get_caps()
1814 ldev->caps.pad_max_freq_hz = 90000000; in ltdc_get_caps()
1815 if (ldev->caps.hw_version == HWVER_10200) in ltdc_get_caps()
1816 ldev->caps.pad_max_freq_hz = 65000000; in ltdc_get_caps()
1817 ldev->caps.nb_irq = 2; in ltdc_get_caps()
1818 ldev->caps.ycbcr_input = false; in ltdc_get_caps()
1819 ldev->caps.ycbcr_output = false; in ltdc_get_caps()
1820 ldev->caps.plane_reg_shadow = false; in ltdc_get_caps()
1821 ldev->caps.crc = false; in ltdc_get_caps()
1822 ldev->caps.dynamic_zorder = false; in ltdc_get_caps()
1823 ldev->caps.plane_rotation = false; in ltdc_get_caps()
1824 ldev->caps.fifo_threshold = false; in ltdc_get_caps()
1827 ldev->caps.layer_ofs = LAY_OFS_0; in ltdc_get_caps()
1828 ldev->caps.layer_regs = ltdc_layer_regs_a1; in ltdc_get_caps()
1829 ldev->caps.pix_fmt_hw = ltdc_pix_fmt_a1; in ltdc_get_caps()
1830 ldev->caps.pix_fmt_drm = ltdc_drm_fmt_a1; in ltdc_get_caps()
1831 ldev->caps.pix_fmt_nb = ARRAY_SIZE(ltdc_drm_fmt_a1); in ltdc_get_caps()
1832 ldev->caps.pix_fmt_flex = false; in ltdc_get_caps()
1833 ldev->caps.non_alpha_only_l1 = false; in ltdc_get_caps()
1834 ldev->caps.pad_max_freq_hz = 150000000; in ltdc_get_caps()
1835 ldev->caps.nb_irq = 4; in ltdc_get_caps()
1836 ldev->caps.ycbcr_input = false; in ltdc_get_caps()
1837 ldev->caps.ycbcr_output = false; in ltdc_get_caps()
1838 ldev->caps.plane_reg_shadow = false; in ltdc_get_caps()
1839 ldev->caps.crc = false; in ltdc_get_caps()
1840 ldev->caps.dynamic_zorder = false; in ltdc_get_caps()
1841 ldev->caps.plane_rotation = false; in ltdc_get_caps()
1842 ldev->caps.fifo_threshold = false; in ltdc_get_caps()
1845 ldev->caps.layer_ofs = LAY_OFS_1; in ltdc_get_caps()
1846 ldev->caps.layer_regs = ltdc_layer_regs_a2; in ltdc_get_caps()
1847 ldev->caps.pix_fmt_hw = ltdc_pix_fmt_a2; in ltdc_get_caps()
1848 ldev->caps.pix_fmt_drm = ltdc_drm_fmt_a2; in ltdc_get_caps()
1849 ldev->caps.pix_fmt_nb = ARRAY_SIZE(ltdc_drm_fmt_a2); in ltdc_get_caps()
1850 ldev->caps.pix_fmt_flex = true; in ltdc_get_caps()
1851 ldev->caps.non_alpha_only_l1 = false; in ltdc_get_caps()
1852 ldev->caps.pad_max_freq_hz = 90000000; in ltdc_get_caps()
1853 ldev->caps.nb_irq = 2; in ltdc_get_caps()
1854 ldev->caps.ycbcr_input = true; in ltdc_get_caps()
1855 ldev->caps.ycbcr_output = true; in ltdc_get_caps()
1856 ldev->caps.plane_reg_shadow = true; in ltdc_get_caps()
1857 ldev->caps.crc = true; in ltdc_get_caps()
1858 ldev->caps.dynamic_zorder = true; in ltdc_get_caps()
1859 ldev->caps.plane_rotation = true; in ltdc_get_caps()
1860 ldev->caps.fifo_threshold = true; in ltdc_get_caps()
1871 struct ltdc_device *ldev = ddev->dev_private; in ltdc_suspend() local
1874 clk_disable_unprepare(ldev->pixel_clk); in ltdc_suspend()
1879 struct ltdc_device *ldev = ddev->dev_private; in ltdc_resume() local
1884 ret = clk_prepare_enable(ldev->pixel_clk); in ltdc_resume()
1896 struct ltdc_device *ldev = ddev->dev_private; in ltdc_load() local
1914 ldev->pixel_clk = devm_clk_get(dev, "lcd"); in ltdc_load()
1915 if (IS_ERR(ldev->pixel_clk)) { in ltdc_load()
1916 if (PTR_ERR(ldev->pixel_clk) != -EPROBE_DEFER) in ltdc_load()
1918 return PTR_ERR(ldev->pixel_clk); in ltdc_load()
1921 if (clk_prepare_enable(ldev->pixel_clk)) { in ltdc_load()
1961 mutex_init(&ldev->err_lock); in ltdc_load()
1970 ldev->regs = devm_ioremap_resource(dev, res); in ltdc_load()
1971 if (IS_ERR(ldev->regs)) { in ltdc_load()
1973 ret = PTR_ERR(ldev->regs); in ltdc_load()
1977 ldev->regmap = devm_regmap_init_mmio(&pdev->dev, ldev->regs, &stm32_ltdc_regmap_cfg); in ltdc_load()
1978 if (IS_ERR(ldev->regmap)) { in ltdc_load()
1980 ret = PTR_ERR(ldev->regmap); in ltdc_load()
1987 ldev->caps.hw_version); in ltdc_load()
1992 regmap_clear_bits(ldev->regmap, LTDC_IER, IER_MASK); in ltdc_load()
1994 DRM_DEBUG_DRIVER("ltdc hw version 0x%08x\n", ldev->caps.hw_version); in ltdc_load()
1997 ldev->transfer_err = 0; in ltdc_load()
1998 ldev->fifo_err = 0; in ltdc_load()
1999 ldev->fifo_warn = 0; in ltdc_load()
2000 ldev->fifo_threshold = FUT_DFT; in ltdc_load()
2002 for (i = 0; i < ldev->caps.nb_irq; i++) { in ltdc_load()
2037 clk_disable_unprepare(ldev->pixel_clk); in ltdc_load()
2045 clk_disable_unprepare(ldev->pixel_clk); in ltdc_load()