Lines Matching +full:sync +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0
74 #define AWG_DELAY_HD (-9)
75 #define AWG_DELAY_ED (-8)
76 #define AWG_DELAY_SD (-7)
156 writel(1, vtg->regs + VTG_DRST_AUTOC); in vtg_reset()
160 const struct drm_display_mode *mode) in vtg_set_output_window() argument
166 u32 xstart = sti_vtg_get_pixel_number(*mode, 0); in vtg_set_output_window()
167 u32 ystart = sti_vtg_get_line_number(*mode, 0); in vtg_set_output_window()
168 u32 xstop = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1); in vtg_set_output_window()
169 u32 ystop = sti_vtg_get_line_number(*mode, mode->vdisplay - 1); in vtg_set_output_window()
171 /* Set output window to fit the display mode selected */ in vtg_set_output_window()
185 static void vtg_set_hsync_vsync_pos(struct sti_vtg_sync_params *sync, in vtg_set_hsync_vsync_pos() argument
187 const struct drm_display_mode *mode) in vtg_set_hsync_vsync_pos() argument
193 clocksperline = mode->htotal; in vtg_set_hsync_vsync_pos()
197 stop = mode->hsync_end - mode->hsync_start; in vtg_set_hsync_vsync_pos()
205 start -= clocksperline; in vtg_set_hsync_vsync_pos()
210 stop -= clocksperline; in vtg_set_hsync_vsync_pos()
212 sync->hsync = (stop << 16) | start; in vtg_set_hsync_vsync_pos()
218 fallsync_top += mode->vsync_end - mode->vsync_start; in vtg_set_hsync_vsync_pos()
223 risesync_top = mode->vtotal; in vtg_set_hsync_vsync_pos()
224 fallsync_top = mode->vsync_end - mode->vsync_start; in vtg_set_hsync_vsync_pos()
230 sync->vsync_line_top = (fallsync_top << 16) | risesync_top; in vtg_set_hsync_vsync_pos()
231 sync->vsync_off_top = (fallsync_offs_top << 16) | risesync_offs_top; in vtg_set_hsync_vsync_pos()
234 sync->vsync_line_bot = sync->vsync_line_top; in vtg_set_hsync_vsync_pos()
235 sync->vsync_off_bot = sync->vsync_off_top; in vtg_set_hsync_vsync_pos()
240 struct sti_vtg_sync_params *sync, in vtg_set_mode() argument
241 const struct drm_display_mode *mode) in vtg_set_mode() argument
246 writel(mode->htotal, vtg->regs + VTG_CLKLN); in vtg_set_mode()
249 writel(mode->vtotal * 2, vtg->regs + VTG_HLFLN); in vtg_set_mode()
252 vtg_set_output_window(vtg->regs, mode); in vtg_set_mode()
255 vtg_set_hsync_vsync_pos(&sync[VTG_SYNC_ID_HDMI - 1], HDMI_DELAY, mode); in vtg_set_mode()
258 vtg_set_hsync_vsync_pos(&sync[VTG_SYNC_ID_HDDCS - 1], 0, mode); in vtg_set_mode()
261 vtg_set_hsync_vsync_pos(&sync[VTG_SYNC_ID_HDF - 1], AWG_DELAY_HD, mode); in vtg_set_mode()
264 vtg_set_hsync_vsync_pos(&sync[VTG_SYNC_ID_DVO - 1], DVO_DELAY, mode); in vtg_set_mode()
268 writel(sync[i].hsync, in vtg_set_mode()
269 vtg->regs + vtg_regs_offs[i].h_hd); in vtg_set_mode()
270 writel(sync[i].vsync_line_top, in vtg_set_mode()
271 vtg->regs + vtg_regs_offs[i].top_v_vd); in vtg_set_mode()
272 writel(sync[i].vsync_line_bot, in vtg_set_mode()
273 vtg->regs + vtg_regs_offs[i].bot_v_vd); in vtg_set_mode()
274 writel(sync[i].vsync_off_top, in vtg_set_mode()
275 vtg->regs + vtg_regs_offs[i].top_v_hd); in vtg_set_mode()
276 writel(sync[i].vsync_off_bot, in vtg_set_mode()
277 vtg->regs + vtg_regs_offs[i].bot_v_hd); in vtg_set_mode()
280 /* mode */ in vtg_set_mode()
281 writel(type, vtg->regs + VTG_MODE); in vtg_set_mode()
287 writel(0xFFFF, vtg->regs + VTG_HOST_ITS_BCLR); in vtg_enable_irq()
288 writel(0xFFFF, vtg->regs + VTG_HOST_ITM_BCLR); in vtg_enable_irq()
289 writel(VTG_IRQ_MASK, vtg->regs + VTG_HOST_ITM_BSET); in vtg_enable_irq()
293 const struct drm_display_mode *mode) in sti_vtg_set_config() argument
296 vtg_set_mode(vtg, VTG_MODE_MASTER, vtg->sync_params, mode); in sti_vtg_set_config()
306 * @mode: display mode to be used
309 * Return the line number according to the display mode taking
310 * into account the Sync and Back Porch information.
315 u32 sti_vtg_get_line_number(struct drm_display_mode mode, int y) in sti_vtg_get_line_number() argument
317 u32 start_line = mode.vtotal - mode.vsync_start + 1; in sti_vtg_get_line_number()
319 if (mode.flags & DRM_MODE_FLAG_INTERLACE) in sti_vtg_get_line_number()
328 * @mode: display mode to be used
331 * Return the pixel number according to the display mode taking
332 * into account the Sync and Back Porch information.
335 u32 sti_vtg_get_pixel_number(struct drm_display_mode mode, int x) in sti_vtg_get_pixel_number() argument
337 return mode.htotal - mode.hsync_start + x; in sti_vtg_get_pixel_number()
343 vtg->crtc = crtc; in sti_vtg_register_client()
344 return raw_notifier_chain_register(&vtg->notifier_list, nb); in sti_vtg_register_client()
349 return raw_notifier_chain_unregister(&vtg->notifier_list, nb); in sti_vtg_unregister_client()
357 event = (vtg->irq_status & VTG_IRQ_TOP) ? in vtg_irq_thread()
360 raw_notifier_call_chain(&vtg->notifier_list, event, vtg->crtc); in vtg_irq_thread()
369 vtg->irq_status = readl(vtg->regs + VTG_HOST_ITS); in vtg_irq()
371 writel(vtg->irq_status, vtg->regs + VTG_HOST_ITS_BCLR); in vtg_irq()
373 /* force sync bus write */ in vtg_irq()
374 readl(vtg->regs + VTG_HOST_ITS); in vtg_irq()
381 struct device *dev = &pdev->dev; in vtg_probe()
388 return -ENOMEM; in vtg_probe()
394 return -ENOMEM; in vtg_probe()
396 vtg->regs = devm_ioremap(dev, res->start, resource_size(res)); in vtg_probe()
397 if (!vtg->regs) { in vtg_probe()
399 return -ENOMEM; in vtg_probe()
402 vtg->irq = platform_get_irq(pdev, 0); in vtg_probe()
403 if (vtg->irq < 0) { in vtg_probe()
405 return vtg->irq; in vtg_probe()
408 RAW_INIT_NOTIFIER_HEAD(&vtg->notifier_list); in vtg_probe()
410 ret = devm_request_threaded_irq(dev, vtg->irq, vtg_irq, in vtg_probe()
433 .name = "sti-vtg",