Lines Matching refs:regmap
81 static void dphy_set_pll_reg(struct dphy_pll *pll, struct regmap *regmap) in dphy_set_pll_reg() argument
102 regmap_write(regmap, reg_addr[i], reg_val[i]); in dphy_set_pll_reg()
110 struct regmap *regmap = ctx->regmap; in dphy_pll_config() local
122 dphy_set_pll_reg(pll, regmap); in dphy_pll_config()
127 static void dphy_set_timing_reg(struct regmap *regmap, int type, u8 val[]) in dphy_set_timing_reg() argument
131 regmap_write(regmap, 0x31, val[CLK]); in dphy_set_timing_reg()
132 regmap_write(regmap, 0x41, val[DATA]); in dphy_set_timing_reg()
133 regmap_write(regmap, 0x51, val[DATA]); in dphy_set_timing_reg()
134 regmap_write(regmap, 0x61, val[DATA]); in dphy_set_timing_reg()
135 regmap_write(regmap, 0x71, val[DATA]); in dphy_set_timing_reg()
137 regmap_write(regmap, 0x90, val[CLK]); in dphy_set_timing_reg()
138 regmap_write(regmap, 0xa0, val[DATA]); in dphy_set_timing_reg()
139 regmap_write(regmap, 0xb0, val[DATA]); in dphy_set_timing_reg()
140 regmap_write(regmap, 0xc0, val[DATA]); in dphy_set_timing_reg()
141 regmap_write(regmap, 0xd0, val[DATA]); in dphy_set_timing_reg()
144 regmap_write(regmap, 0x32, val[CLK]); in dphy_set_timing_reg()
145 regmap_write(regmap, 0x42, val[DATA]); in dphy_set_timing_reg()
146 regmap_write(regmap, 0x52, val[DATA]); in dphy_set_timing_reg()
147 regmap_write(regmap, 0x62, val[DATA]); in dphy_set_timing_reg()
148 regmap_write(regmap, 0x72, val[DATA]); in dphy_set_timing_reg()
150 regmap_write(regmap, 0x91, val[CLK]); in dphy_set_timing_reg()
151 regmap_write(regmap, 0xa1, val[DATA]); in dphy_set_timing_reg()
152 regmap_write(regmap, 0xb1, val[DATA]); in dphy_set_timing_reg()
153 regmap_write(regmap, 0xc1, val[DATA]); in dphy_set_timing_reg()
154 regmap_write(regmap, 0xd1, val[DATA]); in dphy_set_timing_reg()
157 regmap_write(regmap, 0x33, val[CLK]); in dphy_set_timing_reg()
158 regmap_write(regmap, 0x43, val[DATA]); in dphy_set_timing_reg()
159 regmap_write(regmap, 0x53, val[DATA]); in dphy_set_timing_reg()
160 regmap_write(regmap, 0x63, val[DATA]); in dphy_set_timing_reg()
161 regmap_write(regmap, 0x73, val[DATA]); in dphy_set_timing_reg()
163 regmap_write(regmap, 0x92, val[CLK]); in dphy_set_timing_reg()
164 regmap_write(regmap, 0xa2, val[DATA]); in dphy_set_timing_reg()
165 regmap_write(regmap, 0xb2, val[DATA]); in dphy_set_timing_reg()
166 regmap_write(regmap, 0xc2, val[DATA]); in dphy_set_timing_reg()
167 regmap_write(regmap, 0xd2, val[DATA]); in dphy_set_timing_reg()
170 regmap_write(regmap, 0x34, val[CLK]); in dphy_set_timing_reg()
171 regmap_write(regmap, 0x44, val[DATA]); in dphy_set_timing_reg()
172 regmap_write(regmap, 0x54, val[DATA]); in dphy_set_timing_reg()
173 regmap_write(regmap, 0x64, val[DATA]); in dphy_set_timing_reg()
174 regmap_write(regmap, 0x74, val[DATA]); in dphy_set_timing_reg()
176 regmap_write(regmap, 0x93, val[CLK]); in dphy_set_timing_reg()
177 regmap_write(regmap, 0xa3, val[DATA]); in dphy_set_timing_reg()
178 regmap_write(regmap, 0xb3, val[DATA]); in dphy_set_timing_reg()
179 regmap_write(regmap, 0xc3, val[DATA]); in dphy_set_timing_reg()
180 regmap_write(regmap, 0xd3, val[DATA]); in dphy_set_timing_reg()
183 regmap_write(regmap, 0x36, val[CLK]); in dphy_set_timing_reg()
184 regmap_write(regmap, 0x46, val[DATA]); in dphy_set_timing_reg()
185 regmap_write(regmap, 0x56, val[DATA]); in dphy_set_timing_reg()
186 regmap_write(regmap, 0x66, val[DATA]); in dphy_set_timing_reg()
187 regmap_write(regmap, 0x76, val[DATA]); in dphy_set_timing_reg()
189 regmap_write(regmap, 0x95, val[CLK]); in dphy_set_timing_reg()
190 regmap_write(regmap, 0xA5, val[DATA]); in dphy_set_timing_reg()
191 regmap_write(regmap, 0xB5, val[DATA]); in dphy_set_timing_reg()
192 regmap_write(regmap, 0xc5, val[DATA]); in dphy_set_timing_reg()
193 regmap_write(regmap, 0xd5, val[DATA]); in dphy_set_timing_reg()
196 regmap_write(regmap, 0x35, val[CLK]); in dphy_set_timing_reg()
197 regmap_write(regmap, 0x94, val[CLK]); in dphy_set_timing_reg()
216 struct regmap *regmap = ctx->regmap; in dphy_timing_config() local
240 dphy_set_timing_reg(regmap, REQUEST_TIME, val); in dphy_timing_config()
251 dphy_set_timing_reg(regmap, PREPARE_TIME, val); in dphy_timing_config()
262 dphy_set_timing_reg(regmap, ZERO_TIME, val); in dphy_timing_config()
270 dphy_set_timing_reg(regmap, TRAIL_TIME, val); in dphy_timing_config()
277 dphy_set_timing_reg(regmap, EXIT_TIME, val); in dphy_timing_config()
284 dphy_set_timing_reg(regmap, CLKPOST_TIME, val); in dphy_timing_config()