Lines Matching +full:dsi +full:- +full:lanes
1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car MIPI DSI Encoder
70 struct clk *dsi; member
75 unsigned int lanes; member
176 static void rcar_mipi_dsi_write(struct rcar_mipi_dsi *dsi, u32 reg, u32 data) in rcar_mipi_dsi_write() argument
178 iowrite32(data, dsi->mmio + reg); in rcar_mipi_dsi_write()
181 static u32 rcar_mipi_dsi_read(struct rcar_mipi_dsi *dsi, u32 reg) in rcar_mipi_dsi_read() argument
183 return ioread32(dsi->mmio + reg); in rcar_mipi_dsi_read()
186 static void rcar_mipi_dsi_clr(struct rcar_mipi_dsi *dsi, u32 reg, u32 clr) in rcar_mipi_dsi_clr() argument
188 rcar_mipi_dsi_write(dsi, reg, rcar_mipi_dsi_read(dsi, reg) & ~clr); in rcar_mipi_dsi_clr()
191 static void rcar_mipi_dsi_set(struct rcar_mipi_dsi *dsi, u32 reg, u32 set) in rcar_mipi_dsi_set() argument
193 rcar_mipi_dsi_write(dsi, reg, rcar_mipi_dsi_read(dsi, reg) | set); in rcar_mipi_dsi_set()
196 static int rcar_mipi_dsi_write_phtw(struct rcar_mipi_dsi *dsi, u32 phtw) in rcar_mipi_dsi_write_phtw() argument
201 rcar_mipi_dsi_write(dsi, PHTW, phtw); in rcar_mipi_dsi_write_phtw()
205 2000, 10000, false, dsi, PHTW); in rcar_mipi_dsi_write_phtw()
207 dev_err(dsi->dev, "PHY test interface write timeout (0x%08x)\n", in rcar_mipi_dsi_write_phtw()
215 static int rcar_mipi_dsi_write_phtw_arr(struct rcar_mipi_dsi *dsi, in rcar_mipi_dsi_write_phtw_arr() argument
219 int ret = rcar_mipi_dsi_write_phtw(dsi, phtw[i]); in rcar_mipi_dsi_write_phtw_arr()
232 ret = rcar_mipi_dsi_write_phtw_arr(dsi, phtw, \
237 static int rcar_mipi_dsi_init_phtw_v3u(struct rcar_mipi_dsi *dsi) in rcar_mipi_dsi_init_phtw_v3u() argument
244 static int rcar_mipi_dsi_post_init_phtw_v3u(struct rcar_mipi_dsi *dsi) in rcar_mipi_dsi_post_init_phtw_v3u() argument
251 static int rcar_mipi_dsi_init_phtw_v4h(struct rcar_mipi_dsi *dsi, in rcar_mipi_dsi_init_phtw_v4h() argument
256 if (setup_info->hsfreq < MHZ(450)) { in rcar_mipi_dsi_init_phtw_v4h()
267 if (setup_info->hsfreq <= MHZ(1000)) in rcar_mipi_dsi_init_phtw_v4h()
270 else if (setup_info->hsfreq <= MHZ(1500)) in rcar_mipi_dsi_init_phtw_v4h()
273 else if (setup_info->hsfreq <= MHZ(2500)) in rcar_mipi_dsi_init_phtw_v4h()
276 return -EINVAL; in rcar_mipi_dsi_init_phtw_v4h()
281 if (dsi->lanes <= 1) { in rcar_mipi_dsi_init_phtw_v4h()
287 if (dsi->lanes <= 2) { in rcar_mipi_dsi_init_phtw_v4h()
293 if (dsi->lanes <= 3) { in rcar_mipi_dsi_init_phtw_v4h()
299 if (setup_info->hsfreq <= MHZ(1500)) { in rcar_mipi_dsi_init_phtw_v4h()
309 rcar_mipi_dsi_post_init_phtw_v4h(struct rcar_mipi_dsi *dsi, in rcar_mipi_dsi_post_init_phtw_v4h() argument
315 if (setup_info->hsfreq <= MHZ(1500)) { in rcar_mipi_dsi_post_init_phtw_v4h()
320 dsi, PHTR); in rcar_mipi_dsi_post_init_phtw_v4h()
322 dev_err(dsi->dev, "failed to test PHTR\n"); in rcar_mipi_dsi_post_init_phtw_v4h()
332 /* -----------------------------------------------------------------------------
336 static void rcar_mipi_dsi_pll_calc(struct rcar_mipi_dsi *dsi, in rcar_mipi_dsi_pll_calc() argument
341 unsigned int best_err = -1; in rcar_mipi_dsi_pll_calc()
342 const struct rcar_mipi_dsi_device_info *info = dsi->info; in rcar_mipi_dsi_pll_calc()
344 for (unsigned int n = info->n_min; n <= info->n_max; n++) { in rcar_mipi_dsi_pll_calc()
349 if (fpfd < info->fpfd_min || fpfd > info->fpfd_max) in rcar_mipi_dsi_pll_calc()
352 for (unsigned int m = info->m_min; m <= info->m_max; m++) { in rcar_mipi_dsi_pll_calc()
356 fout = div64_u64((u64)fpfd * m, dsi->info->n_mul); in rcar_mipi_dsi_pll_calc()
358 if (fout < info->fout_min || fout > info->fout_max) in rcar_mipi_dsi_pll_calc()
361 fout = div64_u64(fout, setup_info->vclk_divider); in rcar_mipi_dsi_pll_calc()
363 if (fout < setup_info->clkset->min_freq || in rcar_mipi_dsi_pll_calc()
364 fout > setup_info->clkset->max_freq) in rcar_mipi_dsi_pll_calc()
367 err = abs((long)(fout - fout_target) * 10000 / in rcar_mipi_dsi_pll_calc()
370 setup_info->m = m; in rcar_mipi_dsi_pll_calc()
371 setup_info->n = n; in rcar_mipi_dsi_pll_calc()
372 setup_info->fout = (unsigned long)fout; in rcar_mipi_dsi_pll_calc()
382 static void rcar_mipi_dsi_parameters_calc(struct rcar_mipi_dsi *dsi, in rcar_mipi_dsi_parameters_calc() argument
395 * The range out Fout is [40 - 1250] Mhz in rcar_mipi_dsi_parameters_calc()
397 fout_target = target * mipi_dsi_pixel_format_to_bpp(dsi->format) in rcar_mipi_dsi_parameters_calc()
398 / (2 * dsi->lanes); in rcar_mipi_dsi_parameters_calc()
403 for (clk_cfg = dsi->info->clk_cfg; clk_cfg->min_freq != 0; clk_cfg++) { in rcar_mipi_dsi_parameters_calc()
404 if (fout_target > clk_cfg->min_freq && in rcar_mipi_dsi_parameters_calc()
405 fout_target <= clk_cfg->max_freq) { in rcar_mipi_dsi_parameters_calc()
406 setup_info->clkset = clk_cfg; in rcar_mipi_dsi_parameters_calc()
413 switch (dsi->info->model) { in rcar_mipi_dsi_parameters_calc()
416 setup_info->vclk_divider = 1 << ((clk_cfg->vco_cntrl >> 4) & 0x3); in rcar_mipi_dsi_parameters_calc()
420 setup_info->vclk_divider = 1 << (((clk_cfg->vco_cntrl >> 3) & 0x7) + 1); in rcar_mipi_dsi_parameters_calc()
424 rcar_mipi_dsi_pll_calc(dsi, fin_rate, fout_target, setup_info); in rcar_mipi_dsi_parameters_calc()
427 setup_info->hsfreq = setup_info->fout * 2; in rcar_mipi_dsi_parameters_calc()
429 if (hsfreqrange_table[i][0] >= setup_info->hsfreq) { in rcar_mipi_dsi_parameters_calc()
430 setup_info->hsfreqrange = hsfreqrange_table[i][1]; in rcar_mipi_dsi_parameters_calc()
435 err = abs((long)(setup_info->fout - fout_target) * 10000 / (long)fout_target); in rcar_mipi_dsi_parameters_calc()
437 dev_dbg(dsi->dev, in rcar_mipi_dsi_parameters_calc()
439 setup_info->m, fin_rate, dsi->info->n_mul, setup_info->n, in rcar_mipi_dsi_parameters_calc()
440 setup_info->vclk_divider, setup_info->fout, fout_target, in rcar_mipi_dsi_parameters_calc()
443 dev_dbg(dsi->dev, in rcar_mipi_dsi_parameters_calc()
445 clk_cfg->vco_cntrl, clk_cfg->prop_cntrl, in rcar_mipi_dsi_parameters_calc()
446 setup_info->hsfreqrange); in rcar_mipi_dsi_parameters_calc()
449 static void rcar_mipi_dsi_set_display_timing(struct rcar_mipi_dsi *dsi, in rcar_mipi_dsi_set_display_timing() argument
460 if (mipi_dsi_pixel_format_to_bpp(dsi->format) == 24) in rcar_mipi_dsi_set_display_timing()
461 rcar_mipi_dsi_write(dsi, TXVMPSPHSETR, TXVMPSPHSETR_DT_RGB24); in rcar_mipi_dsi_set_display_timing()
462 else if (mipi_dsi_pixel_format_to_bpp(dsi->format) == 18) in rcar_mipi_dsi_set_display_timing()
463 rcar_mipi_dsi_write(dsi, TXVMPSPHSETR, TXVMPSPHSETR_DT_RGB18); in rcar_mipi_dsi_set_display_timing()
464 else if (mipi_dsi_pixel_format_to_bpp(dsi->format) == 16) in rcar_mipi_dsi_set_display_timing()
465 rcar_mipi_dsi_write(dsi, TXVMPSPHSETR, TXVMPSPHSETR_DT_RGB16); in rcar_mipi_dsi_set_display_timing()
467 dev_warn(dsi->dev, "unsupported format"); in rcar_mipi_dsi_set_display_timing()
475 rcar_mipi_dsi_write(dsi, TXVMSETR, setr); in rcar_mipi_dsi_set_display_timing()
478 vprmset0r = (mode->flags & DRM_MODE_FLAG_PVSYNC ? in rcar_mipi_dsi_set_display_timing()
480 | (mode->flags & DRM_MODE_FLAG_PHSYNC ? in rcar_mipi_dsi_set_display_timing()
484 vprmset1r = TXVMVPRMSET1R_VACTIVE(mode->vdisplay) in rcar_mipi_dsi_set_display_timing()
485 | TXVMVPRMSET1R_VSA(mode->vsync_end - mode->vsync_start); in rcar_mipi_dsi_set_display_timing()
487 vprmset2r = TXVMVPRMSET2R_VFP(mode->vsync_start - mode->vdisplay) in rcar_mipi_dsi_set_display_timing()
488 | TXVMVPRMSET2R_VBP(mode->vtotal - mode->vsync_end); in rcar_mipi_dsi_set_display_timing()
490 vprmset3r = TXVMVPRMSET3R_HACTIVE(mode->hdisplay) in rcar_mipi_dsi_set_display_timing()
491 | TXVMVPRMSET3R_HSA(mode->hsync_end - mode->hsync_start); in rcar_mipi_dsi_set_display_timing()
493 vprmset4r = TXVMVPRMSET4R_HFP(mode->hsync_start - mode->hdisplay) in rcar_mipi_dsi_set_display_timing()
494 | TXVMVPRMSET4R_HBP(mode->htotal - mode->hsync_end); in rcar_mipi_dsi_set_display_timing()
496 rcar_mipi_dsi_write(dsi, TXVMVPRMSET0R, vprmset0r); in rcar_mipi_dsi_set_display_timing()
497 rcar_mipi_dsi_write(dsi, TXVMVPRMSET1R, vprmset1r); in rcar_mipi_dsi_set_display_timing()
498 rcar_mipi_dsi_write(dsi, TXVMVPRMSET2R, vprmset2r); in rcar_mipi_dsi_set_display_timing()
499 rcar_mipi_dsi_write(dsi, TXVMVPRMSET3R, vprmset3r); in rcar_mipi_dsi_set_display_timing()
500 rcar_mipi_dsi_write(dsi, TXVMVPRMSET4R, vprmset4r); in rcar_mipi_dsi_set_display_timing()
503 static int rcar_mipi_dsi_startup(struct rcar_mipi_dsi *dsi, in rcar_mipi_dsi_startup() argument
516 dsi_format = mipi_dsi_pixel_format_to_bpp(dsi->format); in rcar_mipi_dsi_startup()
518 dev_warn(dsi->dev, "invalid format"); in rcar_mipi_dsi_startup()
519 return -EINVAL; in rcar_mipi_dsi_startup()
523 rcar_mipi_dsi_parameters_calc(dsi, dsi->clocks.pll, in rcar_mipi_dsi_startup()
524 mode->clock * 1000, &setup_info); in rcar_mipi_dsi_startup()
527 rcar_mipi_dsi_set(dsi, LPCLKSET, LPCLKSET_CKEN); in rcar_mipi_dsi_startup()
530 rcar_mipi_dsi_set(dsi, CFGCLKSET, CFGCLKSET_CKEN); in rcar_mipi_dsi_startup()
532 rcar_mipi_dsi_clr(dsi, PHYSETUP, PHYSETUP_RSTZ); in rcar_mipi_dsi_startup()
533 rcar_mipi_dsi_clr(dsi, PHYSETUP, PHYSETUP_SHUTDOWNZ); in rcar_mipi_dsi_startup()
535 rcar_mipi_dsi_set(dsi, PHTC, PHTC_TESTCLR); in rcar_mipi_dsi_startup()
536 rcar_mipi_dsi_clr(dsi, PHTC, PHTC_TESTCLR); in rcar_mipi_dsi_startup()
539 phy_setup = rcar_mipi_dsi_read(dsi, PHYSETUP); in rcar_mipi_dsi_startup()
542 rcar_mipi_dsi_write(dsi, PHYSETUP, phy_setup); in rcar_mipi_dsi_startup()
544 switch (dsi->info->model) { in rcar_mipi_dsi_startup()
547 ret = rcar_mipi_dsi_init_phtw_v3u(dsi); in rcar_mipi_dsi_startup()
553 ret = rcar_mipi_dsi_init_phtw_v4h(dsi, &setup_info); in rcar_mipi_dsi_startup()
560 rcar_mipi_dsi_clr(dsi, CLOCKSET1, CLOCKSET1_SHADOW_CLEAR); in rcar_mipi_dsi_startup()
561 rcar_mipi_dsi_set(dsi, CLOCKSET1, CLOCKSET1_SHADOW_CLEAR); in rcar_mipi_dsi_startup()
562 rcar_mipi_dsi_clr(dsi, CLOCKSET1, CLOCKSET1_SHADOW_CLEAR); in rcar_mipi_dsi_startup()
564 clockset2 = CLOCKSET2_M(setup_info.m - dsi->info->clockset2_m_offset) in rcar_mipi_dsi_startup()
565 | CLOCKSET2_N(setup_info.n - 1) in rcar_mipi_dsi_startup()
566 | CLOCKSET2_VCO_CNTRL(setup_info.clkset->vco_cntrl); in rcar_mipi_dsi_startup()
567 clockset3 = CLOCKSET3_PROP_CNTRL(setup_info.clkset->prop_cntrl) in rcar_mipi_dsi_startup()
568 | CLOCKSET3_INT_CNTRL(setup_info.clkset->int_cntrl) in rcar_mipi_dsi_startup()
569 | CLOCKSET3_CPBIAS_CNTRL(setup_info.clkset->cpbias_cntrl) in rcar_mipi_dsi_startup()
570 | CLOCKSET3_GMP_CNTRL(setup_info.clkset->gmp_cntrl); in rcar_mipi_dsi_startup()
571 rcar_mipi_dsi_write(dsi, CLOCKSET2, clockset2); in rcar_mipi_dsi_startup()
572 rcar_mipi_dsi_write(dsi, CLOCKSET3, clockset3); in rcar_mipi_dsi_startup()
574 rcar_mipi_dsi_clr(dsi, CLOCKSET1, CLOCKSET1_UPDATEPLL); in rcar_mipi_dsi_startup()
575 rcar_mipi_dsi_set(dsi, CLOCKSET1, CLOCKSET1_UPDATEPLL); in rcar_mipi_dsi_startup()
577 rcar_mipi_dsi_clr(dsi, CLOCKSET1, CLOCKSET1_UPDATEPLL); in rcar_mipi_dsi_startup()
580 rcar_mipi_dsi_write(dsi, PPISETR, ppisetr); in rcar_mipi_dsi_startup()
582 rcar_mipi_dsi_set(dsi, PHYSETUP, PHYSETUP_SHUTDOWNZ); in rcar_mipi_dsi_startup()
583 rcar_mipi_dsi_set(dsi, PHYSETUP, PHYSETUP_RSTZ); in rcar_mipi_dsi_startup()
587 for (timeout = 10; timeout > 0; --timeout) { in rcar_mipi_dsi_startup()
588 if ((rcar_mipi_dsi_read(dsi, PPICLSR) & PPICLSR_STPST) && in rcar_mipi_dsi_startup()
589 (rcar_mipi_dsi_read(dsi, PPIDLSR) & PPIDLSR_STPST) && in rcar_mipi_dsi_startup()
590 (rcar_mipi_dsi_read(dsi, CLOCKSET1) & CLOCKSET1_LOCK)) in rcar_mipi_dsi_startup()
597 dev_err(dsi->dev, "failed to enable PPI clock\n"); in rcar_mipi_dsi_startup()
598 return -ETIMEDOUT; in rcar_mipi_dsi_startup()
601 switch (dsi->info->model) { in rcar_mipi_dsi_startup()
604 ret = rcar_mipi_dsi_post_init_phtw_v3u(dsi); in rcar_mipi_dsi_startup()
610 ret = rcar_mipi_dsi_post_init_phtw_v4h(dsi, &setup_info); in rcar_mipi_dsi_startup()
618 rcar_mipi_dsi_write(dsi, VCLKSET, vclkset); in rcar_mipi_dsi_startup()
627 dev_warn(dsi->dev, "unsupported format"); in rcar_mipi_dsi_startup()
628 return -EINVAL; in rcar_mipi_dsi_startup()
631 vclkset |= VCLKSET_COLOR_RGB | VCLKSET_LANE(dsi->lanes - 1); in rcar_mipi_dsi_startup()
633 switch (dsi->info->model) { in rcar_mipi_dsi_startup()
640 vclkset |= VCLKSET_DIV_V4H(__ffs(setup_info.vclk_divider) - 1); in rcar_mipi_dsi_startup()
644 rcar_mipi_dsi_write(dsi, VCLKSET, vclkset); in rcar_mipi_dsi_startup()
647 rcar_mipi_dsi_set(dsi, VCLKEN, VCLKEN_CKEN); in rcar_mipi_dsi_startup()
649 dev_dbg(dsi->dev, "DSI device is started\n"); in rcar_mipi_dsi_startup()
654 static void rcar_mipi_dsi_shutdown(struct rcar_mipi_dsi *dsi) in rcar_mipi_dsi_shutdown() argument
657 rcar_mipi_dsi_write(dsi, VCLKSET, 0); in rcar_mipi_dsi_shutdown()
660 rcar_mipi_dsi_write(dsi, VCLKSET, 0); in rcar_mipi_dsi_shutdown()
662 rcar_mipi_dsi_clr(dsi, PHYSETUP, PHYSETUP_RSTZ); in rcar_mipi_dsi_shutdown()
663 rcar_mipi_dsi_clr(dsi, PHYSETUP, PHYSETUP_SHUTDOWNZ); in rcar_mipi_dsi_shutdown()
666 rcar_mipi_dsi_clr(dsi, CFGCLKSET, CFGCLKSET_CKEN); in rcar_mipi_dsi_shutdown()
669 rcar_mipi_dsi_clr(dsi, LPCLKSET, LPCLKSET_CKEN); in rcar_mipi_dsi_shutdown()
671 dev_dbg(dsi->dev, "DSI device is shutdown\n"); in rcar_mipi_dsi_shutdown()
674 static int rcar_mipi_dsi_clk_enable(struct rcar_mipi_dsi *dsi) in rcar_mipi_dsi_clk_enable() argument
678 reset_control_deassert(dsi->rstc); in rcar_mipi_dsi_clk_enable()
680 ret = clk_prepare_enable(dsi->clocks.mod); in rcar_mipi_dsi_clk_enable()
684 ret = clk_prepare_enable(dsi->clocks.dsi); in rcar_mipi_dsi_clk_enable()
691 clk_disable_unprepare(dsi->clocks.mod); in rcar_mipi_dsi_clk_enable()
693 reset_control_assert(dsi->rstc); in rcar_mipi_dsi_clk_enable()
697 static void rcar_mipi_dsi_clk_disable(struct rcar_mipi_dsi *dsi) in rcar_mipi_dsi_clk_disable() argument
699 clk_disable_unprepare(dsi->clocks.dsi); in rcar_mipi_dsi_clk_disable()
700 clk_disable_unprepare(dsi->clocks.mod); in rcar_mipi_dsi_clk_disable()
702 reset_control_assert(dsi->rstc); in rcar_mipi_dsi_clk_disable()
705 static int rcar_mipi_dsi_start_hs_clock(struct rcar_mipi_dsi *dsi) in rcar_mipi_dsi_start_hs_clock() argument
708 * In HW manual, we need to check TxDDRClkHS-Q Stable? but it dont in rcar_mipi_dsi_start_hs_clock()
715 rcar_mipi_dsi_set(dsi, PPICLCR, PPICLCR_TXREQHS); in rcar_mipi_dsi_start_hs_clock()
719 2000, 10000, false, dsi, PPICLSR); in rcar_mipi_dsi_start_hs_clock()
721 dev_err(dsi->dev, "failed to enable HS clock\n"); in rcar_mipi_dsi_start_hs_clock()
725 rcar_mipi_dsi_set(dsi, PPICLSCR, PPICLSCR_TOHS); in rcar_mipi_dsi_start_hs_clock()
730 static int rcar_mipi_dsi_start_video(struct rcar_mipi_dsi *dsi) in rcar_mipi_dsi_start_video() argument
738 2000, 10000, false, dsi, LINKSR); in rcar_mipi_dsi_start_video()
740 dev_err(dsi->dev, "Link failed to become ready\n"); in rcar_mipi_dsi_start_video()
744 /* De-assert video FIFO clear. */ in rcar_mipi_dsi_start_video()
745 rcar_mipi_dsi_clr(dsi, TXVMCR, TXVMCR_VFCLR); in rcar_mipi_dsi_start_video()
749 2000, 10000, false, dsi, TXVMSR); in rcar_mipi_dsi_start_video()
751 dev_err(dsi->dev, "Failed to de-assert video FIFO clear\n"); in rcar_mipi_dsi_start_video()
756 rcar_mipi_dsi_set(dsi, TXVMCR, TXVMCR_EN_VIDEO); in rcar_mipi_dsi_start_video()
760 2000, 10000, false, dsi, TXVMSR); in rcar_mipi_dsi_start_video()
762 dev_err(dsi->dev, "Failed to enable video transmission\n"); in rcar_mipi_dsi_start_video()
769 static void rcar_mipi_dsi_stop_video(struct rcar_mipi_dsi *dsi) in rcar_mipi_dsi_stop_video() argument
775 rcar_mipi_dsi_clr(dsi, TXVMCR, TXVMCR_EN_VIDEO); in rcar_mipi_dsi_stop_video()
779 2000, 100000, false, dsi, TXVMSR); in rcar_mipi_dsi_stop_video()
781 dev_err(dsi->dev, "Failed to disable video transmission\n"); in rcar_mipi_dsi_stop_video()
786 rcar_mipi_dsi_set(dsi, TXVMCR, TXVMCR_VFCLR); in rcar_mipi_dsi_stop_video()
790 2000, 100000, false, dsi, TXVMSR); in rcar_mipi_dsi_stop_video()
792 dev_err(dsi->dev, "Failed to assert video FIFO clear\n"); in rcar_mipi_dsi_stop_video()
797 /* -----------------------------------------------------------------------------
804 struct rcar_mipi_dsi *dsi = bridge_to_rcar_mipi_dsi(bridge); in rcar_mipi_dsi_attach() local
806 return drm_bridge_attach(bridge->encoder, dsi->next_bridge, bridge, in rcar_mipi_dsi_attach()
813 struct rcar_mipi_dsi *dsi = bridge_to_rcar_mipi_dsi(bridge); in rcar_mipi_dsi_atomic_enable() local
815 rcar_mipi_dsi_start_video(dsi); in rcar_mipi_dsi_atomic_enable()
821 struct rcar_mipi_dsi *dsi = bridge_to_rcar_mipi_dsi(bridge); in rcar_mipi_dsi_atomic_disable() local
823 rcar_mipi_dsi_stop_video(dsi); in rcar_mipi_dsi_atomic_disable()
829 struct rcar_mipi_dsi *dsi = bridge_to_rcar_mipi_dsi(bridge); in rcar_mipi_dsi_pclk_enable() local
836 bridge->encoder); in rcar_mipi_dsi_pclk_enable()
837 crtc = drm_atomic_get_new_connector_state(state, connector)->crtc; in rcar_mipi_dsi_pclk_enable()
838 mode = &drm_atomic_get_new_crtc_state(state, crtc)->adjusted_mode; in rcar_mipi_dsi_pclk_enable()
840 ret = rcar_mipi_dsi_clk_enable(dsi); in rcar_mipi_dsi_pclk_enable()
842 dev_err(dsi->dev, "failed to enable DSI clocks\n"); in rcar_mipi_dsi_pclk_enable()
846 ret = rcar_mipi_dsi_startup(dsi, mode); in rcar_mipi_dsi_pclk_enable()
850 rcar_mipi_dsi_set_display_timing(dsi, mode); in rcar_mipi_dsi_pclk_enable()
852 ret = rcar_mipi_dsi_start_hs_clock(dsi); in rcar_mipi_dsi_pclk_enable()
859 rcar_mipi_dsi_shutdown(dsi); in rcar_mipi_dsi_pclk_enable()
861 rcar_mipi_dsi_clk_disable(dsi); in rcar_mipi_dsi_pclk_enable()
867 struct rcar_mipi_dsi *dsi = bridge_to_rcar_mipi_dsi(bridge); in rcar_mipi_dsi_pclk_disable() local
869 rcar_mipi_dsi_shutdown(dsi); in rcar_mipi_dsi_pclk_disable()
870 rcar_mipi_dsi_clk_disable(dsi); in rcar_mipi_dsi_pclk_disable()
879 if (mode->clock > 297000) in rcar_mipi_dsi_bridge_mode_valid()
895 /* -----------------------------------------------------------------------------
902 struct rcar_mipi_dsi *dsi = host_to_rcar_mipi_dsi(host); in rcar_mipi_dsi_host_attach() local
905 if (device->lanes > dsi->num_data_lanes) in rcar_mipi_dsi_host_attach()
906 return -EINVAL; in rcar_mipi_dsi_host_attach()
908 dsi->lanes = device->lanes; in rcar_mipi_dsi_host_attach()
909 dsi->format = device->format; in rcar_mipi_dsi_host_attach()
911 dsi->next_bridge = devm_drm_of_get_bridge(dsi->dev, dsi->dev->of_node, in rcar_mipi_dsi_host_attach()
913 if (IS_ERR(dsi->next_bridge)) { in rcar_mipi_dsi_host_attach()
914 ret = PTR_ERR(dsi->next_bridge); in rcar_mipi_dsi_host_attach()
915 dev_err(dsi->dev, "failed to get next bridge: %d\n", ret); in rcar_mipi_dsi_host_attach()
920 dsi->bridge.funcs = &rcar_mipi_dsi_bridge_ops; in rcar_mipi_dsi_host_attach()
921 dsi->bridge.of_node = dsi->dev->of_node; in rcar_mipi_dsi_host_attach()
922 drm_bridge_add(&dsi->bridge); in rcar_mipi_dsi_host_attach()
930 struct rcar_mipi_dsi *dsi = host_to_rcar_mipi_dsi(host); in rcar_mipi_dsi_host_detach() local
932 drm_bridge_remove(&dsi->bridge); in rcar_mipi_dsi_host_detach()
942 /* -----------------------------------------------------------------------------
946 static int rcar_mipi_dsi_parse_dt(struct rcar_mipi_dsi *dsi) in rcar_mipi_dsi_parse_dt() argument
950 ret = drm_of_get_data_lanes_count_ep(dsi->dev->of_node, 1, 0, 1, 4); in rcar_mipi_dsi_parse_dt()
952 dev_err(dsi->dev, "missing or invalid data-lanes property\n"); in rcar_mipi_dsi_parse_dt()
956 dsi->num_data_lanes = ret; in rcar_mipi_dsi_parse_dt()
960 static struct clk *rcar_mipi_dsi_get_clock(struct rcar_mipi_dsi *dsi, in rcar_mipi_dsi_get_clock() argument
966 clk = devm_clk_get(dsi->dev, name); in rcar_mipi_dsi_get_clock()
970 if (PTR_ERR(clk) == -ENOENT && optional) in rcar_mipi_dsi_get_clock()
973 dev_err_probe(dsi->dev, PTR_ERR(clk), "failed to get %s clock\n", in rcar_mipi_dsi_get_clock()
979 static int rcar_mipi_dsi_get_clocks(struct rcar_mipi_dsi *dsi) in rcar_mipi_dsi_get_clocks() argument
981 dsi->clocks.mod = rcar_mipi_dsi_get_clock(dsi, NULL, false); in rcar_mipi_dsi_get_clocks()
982 if (IS_ERR(dsi->clocks.mod)) in rcar_mipi_dsi_get_clocks()
983 return PTR_ERR(dsi->clocks.mod); in rcar_mipi_dsi_get_clocks()
985 dsi->clocks.pll = rcar_mipi_dsi_get_clock(dsi, "pll", true); in rcar_mipi_dsi_get_clocks()
986 if (IS_ERR(dsi->clocks.pll)) in rcar_mipi_dsi_get_clocks()
987 return PTR_ERR(dsi->clocks.pll); in rcar_mipi_dsi_get_clocks()
989 dsi->clocks.dsi = rcar_mipi_dsi_get_clock(dsi, "dsi", true); in rcar_mipi_dsi_get_clocks()
990 if (IS_ERR(dsi->clocks.dsi)) in rcar_mipi_dsi_get_clocks()
991 return PTR_ERR(dsi->clocks.dsi); in rcar_mipi_dsi_get_clocks()
993 if (!dsi->clocks.pll && !dsi->clocks.dsi) { in rcar_mipi_dsi_get_clocks()
994 dev_err(dsi->dev, "no input clock (pll, dsi)\n"); in rcar_mipi_dsi_get_clocks()
995 return -EINVAL; in rcar_mipi_dsi_get_clocks()
1003 struct rcar_mipi_dsi *dsi; in rcar_mipi_dsi_probe() local
1006 dsi = devm_kzalloc(&pdev->dev, sizeof(*dsi), GFP_KERNEL); in rcar_mipi_dsi_probe()
1007 if (dsi == NULL) in rcar_mipi_dsi_probe()
1008 return -ENOMEM; in rcar_mipi_dsi_probe()
1010 platform_set_drvdata(pdev, dsi); in rcar_mipi_dsi_probe()
1012 dsi->dev = &pdev->dev; in rcar_mipi_dsi_probe()
1013 dsi->info = of_device_get_match_data(&pdev->dev); in rcar_mipi_dsi_probe()
1015 ret = rcar_mipi_dsi_parse_dt(dsi); in rcar_mipi_dsi_probe()
1020 dsi->mmio = devm_platform_ioremap_resource(pdev, 0); in rcar_mipi_dsi_probe()
1021 if (IS_ERR(dsi->mmio)) in rcar_mipi_dsi_probe()
1022 return PTR_ERR(dsi->mmio); in rcar_mipi_dsi_probe()
1024 ret = rcar_mipi_dsi_get_clocks(dsi); in rcar_mipi_dsi_probe()
1028 dsi->rstc = devm_reset_control_get(dsi->dev, NULL); in rcar_mipi_dsi_probe()
1029 if (IS_ERR(dsi->rstc)) { in rcar_mipi_dsi_probe()
1030 dev_err(dsi->dev, "failed to get cpg reset\n"); in rcar_mipi_dsi_probe()
1031 return PTR_ERR(dsi->rstc); in rcar_mipi_dsi_probe()
1034 /* Initialize the DSI host. */ in rcar_mipi_dsi_probe()
1035 dsi->host.dev = dsi->dev; in rcar_mipi_dsi_probe()
1036 dsi->host.ops = &rcar_mipi_dsi_host_ops; in rcar_mipi_dsi_probe()
1037 ret = mipi_dsi_host_register(&dsi->host); in rcar_mipi_dsi_probe()
1046 struct rcar_mipi_dsi *dsi = platform_get_drvdata(pdev); in rcar_mipi_dsi_remove() local
1048 mipi_dsi_host_unregister(&dsi->host); in rcar_mipi_dsi_remove()
1082 { .compatible = "renesas,r8a779a0-dsi-csi2-tx", .data = &v3u_data },
1083 { .compatible = "renesas,r8a779g0-dsi-csi2-tx", .data = &v4h_data },
1093 .name = "rcar-mipi-dsi",
1100 MODULE_DESCRIPTION("Renesas R-Car MIPI DSI Encoder Driver");