669 		pi->boost_pl.sclk = pi->sys_info.boost_sclk;  in sumo_patch_boost_state()
670 		pi->boost_pl.vddc_index = pi->sys_info.boost_vid_2bit;  in sumo_patch_boost_state()
671 		pi->boost_pl.sclk_dpm_tdp_limit = pi->sys_info.sclk_dpm_tdp_limit_boost;  in sumo_patch_boost_state()
1032 	for (i = 0; i < pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries; i++) {  in sumo_get_valid_engine_clock()
1033 		if (pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency >= lower_limit)  in sumo_get_valid_engine_clock()
1034 			return pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency;  in sumo_get_valid_engine_clock()
1037 …return pi->sys_info.sclk_voltage_mapping_table.entries[pi->sys_info.sclk_voltage_mapping_table.num…  in sumo_get_valid_engine_clock()
1045 	u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */  in sumo_patch_thermal_state()
1092 	u32 min_sclk = pi->sys_info.min_sclk; /* XXX check against disp reqs */  in sumo_apply_state_adjust_rules()
1093 	u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */  in sumo_apply_state_adjust_rules()
1562 	u32 vid_7bit = sumo_convert_vid2_to_vid7(rdev, &pi->sys_info.vid_mapping_table, vid_2bit);  in sumo_convert_voltage_index_to_value()
1676 		pi->sys_info.bootup_sclk = le32_to_cpu(igp_info->info_6.ulBootUpEngineClock);  in sumo_parse_sys_info_table()
1677 		pi->sys_info.min_sclk = le32_to_cpu(igp_info->info_6.ulMinEngineClock);  in sumo_parse_sys_info_table()
1678 		pi->sys_info.bootup_uma_clk = le32_to_cpu(igp_info->info_6.ulBootUpUMAClock);  in sumo_parse_sys_info_table()
1679 		pi->sys_info.bootup_nb_voltage_index =  in sumo_parse_sys_info_table()
1682 			pi->sys_info.htc_tmp_lmt = 203;  in sumo_parse_sys_info_table()
1684 			pi->sys_info.htc_tmp_lmt = igp_info->info_6.ucHtcTmpLmt;  in sumo_parse_sys_info_table()
1686 			pi->sys_info.htc_hyst_lmt = 5;  in sumo_parse_sys_info_table()
1688 			pi->sys_info.htc_hyst_lmt = igp_info->info_6.ucHtcHystLmt;  in sumo_parse_sys_info_table()
1689 		if (pi->sys_info.htc_tmp_lmt <= pi->sys_info.htc_hyst_lmt) {  in sumo_parse_sys_info_table()
1693 			pi->sys_info.csr_m3_arb_cntl_default[i] =  in sumo_parse_sys_info_table()
1695 			pi->sys_info.csr_m3_arb_cntl_uvd[i] =  in sumo_parse_sys_info_table()
1697 			pi->sys_info.csr_m3_arb_cntl_fs3d[i] =  in sumo_parse_sys_info_table()
1700 		pi->sys_info.sclk_dpm_boost_margin =  in sumo_parse_sys_info_table()
1702 		pi->sys_info.sclk_dpm_throttle_margin =  in sumo_parse_sys_info_table()
1704 		pi->sys_info.sclk_dpm_tdp_limit_pg =  in sumo_parse_sys_info_table()
1706 		pi->sys_info.gnb_tdp_limit = le16_to_cpu(igp_info->info_6.GnbTdpLimit);  in sumo_parse_sys_info_table()
1707 		pi->sys_info.sclk_dpm_tdp_limit_boost =  in sumo_parse_sys_info_table()
1709 		pi->sys_info.boost_sclk = le32_to_cpu(igp_info->info_6.ulBoostEngineCLock);  in sumo_parse_sys_info_table()
1710 		pi->sys_info.boost_vid_2bit = igp_info->info_6.ulBoostVid_2bit;  in sumo_parse_sys_info_table()
1712 			pi->sys_info.enable_boost = true;  in sumo_parse_sys_info_table()
1714 			pi->sys_info.enable_boost = false;  in sumo_parse_sys_info_table()
1716 							     &pi->sys_info.disp_clk_voltage_mapping_table,  in sumo_parse_sys_info_table()
1719 							  &pi->sys_info.sclk_voltage_mapping_table,  in sumo_parse_sys_info_table()
1721 		sumo_construct_vid_mapping_table(rdev, &pi->sys_info.vid_mapping_table,  in sumo_parse_sys_info_table()
1732 	pi->boot_pl.sclk = pi->sys_info.bootup_sclk;  in sumo_construct_boot_and_acpi_state()
1733 	pi->boot_pl.vddc_index = pi->sys_info.bootup_nb_voltage_index;  in sumo_construct_boot_and_acpi_state()
1789 	pi->thermal_auto_throttling = pi->sys_info.htc_tmp_lmt;  in sumo_dpm_init()
1790 	pi->enable_boost = pi->sys_info.enable_boost;  in sumo_dpm_init()
1867 	return pi->sys_info.bootup_uma_clk;  in sumo_dpm_get_current_mclk()
1918 	return pi->sys_info.bootup_uma_clk;  in sumo_dpm_get_mclk()