Lines Matching +full:0 +full:x01ffffff
167 #define SISLANDS_SMC_STROBE_RATIO 0x0F
168 #define SISLANDS_SMC_STROBE_ENABLE 0x10
170 #define SISLANDS_SMC_MC_EDC_RD_FLAG 0x01
171 #define SISLANDS_SMC_MC_EDC_WR_FLAG 0x02
172 #define SISLANDS_SMC_MC_RTT_ENABLE 0x04
173 #define SISLANDS_SMC_MC_STUTTER_EN 0x08
174 #define SISLANDS_SMC_MC_PG_EN 0x10
196 #define SISLANDS_SMC_VOLTAGEMASK_VDDC 0
228 #define SI_SMC_SOFT_REGISTER_mclk_chg_timeout 0x0
229 #define SI_SMC_SOFT_REGISTER_delay_vreg 0xC
230 #define SI_SMC_SOFT_REGISTER_delay_acpi 0x28
231 #define SI_SMC_SOFT_REGISTER_seq_index 0x5C
232 #define SI_SMC_SOFT_REGISTER_mvdd_chg_time 0x60
233 #define SI_SMC_SOFT_REGISTER_mclk_switch_lim 0x70
234 #define SI_SMC_SOFT_REGISTER_watermark_threshold 0x78
235 #define SI_SMC_SOFT_REGISTER_phase_shedding_delay 0x88
236 #define SI_SMC_SOFT_REGISTER_ulv_volt_change_delay 0x8C
237 #define SI_SMC_SOFT_REGISTER_mc_block_delay 0x98
238 #define SI_SMC_SOFT_REGISTER_ticks_per_us 0xA8
239 #define SI_SMC_SOFT_REGISTER_crtc_index 0xC4
240 #define SI_SMC_SOFT_REGISTER_mclk_change_block_cp_min 0xC8
241 #define SI_SMC_SOFT_REGISTER_mclk_change_block_cp_max 0xCC
242 #define SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width 0xF4
243 #define SI_SMC_SOFT_REGISTER_tdr_is_about_to_happen 0xFC
244 #define SI_SMC_SOFT_REGISTER_vr_hot_gpio 0x100
245 #define SI_SMC_SOFT_REGISTER_svi_rework_plat_type 0x118
246 #define SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svd 0x11c
247 #define SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svc 0x120
346 #define SMC_SISLANDS_SPLL_DIV_TABLE_FBDIV_MASK 0x01ffffff
347 #define SMC_SISLANDS_SPLL_DIV_TABLE_FBDIV_SHIFT 0
348 #define SMC_SISLANDS_SPLL_DIV_TABLE_PDIV_MASK 0xfe000000
350 #define SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_MASK 0x000fffff
351 #define SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT 0
352 #define SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_MASK 0xfff00000
381 #define SISLANDS_SMC_FIRMWARE_HEADER_LOCATION 0x10000
383 #define SISLANDS_SMC_FIRMWARE_HEADER_version 0x0
384 #define SISLANDS_SMC_FIRMWARE_HEADER_flags 0x4
385 #define SISLANDS_SMC_FIRMWARE_HEADER_softRegisters 0xC
386 #define SISLANDS_SMC_FIRMWARE_HEADER_stateTable 0x10
387 #define SISLANDS_SMC_FIRMWARE_HEADER_fanTable 0x14
388 #define SISLANDS_SMC_FIRMWARE_HEADER_CacConfigTable 0x18
389 #define SISLANDS_SMC_FIRMWARE_HEADER_mcRegisterTable 0x24
390 #define SISLANDS_SMC_FIRMWARE_HEADER_mcArbDramAutoRefreshTable 0x30
391 #define SISLANDS_SMC_FIRMWARE_HEADER_spllTable 0x38
392 #define SISLANDS_SMC_FIRMWARE_HEADER_DteConfiguration 0x40
393 #define SISLANDS_SMC_FIRMWARE_HEADER_PAPMParameters 0x48