Lines Matching full:mclk

389 				     RV7XX_SMC_MCLK_VALUE *mclk)  in rv770_populate_mclk_value()  argument
474 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock); in rv770_populate_mclk_value()
475 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv770_populate_mclk_value()
476 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv770_populate_mclk_value()
477 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv770_populate_mclk_value()
478 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv770_populate_mclk_value()
479 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv770_populate_mclk_value()
480 mclk->mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv770_populate_mclk_value()
593 int rv770_populate_mvdd_value(struct radeon_device *rdev, u32 mclk, in rv770_populate_mvdd_value() argument
604 if (mclk <= pi->mvdd_split_frequency) { in rv770_populate_mvdd_value()
643 if (pl->mclk <= pi->mclk_strobe_mode_threshold) in rv770_convert_power_level_to_smc()
645 rv740_get_mclk_frequency_ratio(pl->mclk) | 0x10; in rv770_convert_power_level_to_smc()
649 if (pl->mclk > pi->mclk_edc_enable_threshold) in rv770_convert_power_level_to_smc()
655 pl->mclk, &level->mclk); in rv770_convert_power_level_to_smc()
658 pl->mclk, &level->mclk); in rv770_convert_power_level_to_smc()
661 pl->mclk, &level->mclk); in rv770_convert_power_level_to_smc()
670 ret = rv770_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); in rv770_convert_power_level_to_smc()
755 state->high.mclk); in rv770_program_memory_timing_parameters()
983 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv770_populate_smc_acpi_state()
984 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv770_populate_smc_acpi_state()
985 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv770_populate_smc_acpi_state()
986 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv770_populate_smc_acpi_state()
988 table->ACPIState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv770_populate_smc_acpi_state()
989 table->ACPIState.levels[0].mclk.mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv770_populate_smc_acpi_state()
991 table->ACPIState.levels[0].mclk.mclk770.mclk_value = 0; in rv770_populate_smc_acpi_state()
1032 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL = in rv770_populate_smc_initial_state()
1034 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = in rv770_populate_smc_initial_state()
1036 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = in rv770_populate_smc_initial_state()
1038 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = in rv770_populate_smc_initial_state()
1040 table->initialState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = in rv770_populate_smc_initial_state()
1042 table->initialState.levels[0].mclk.mclk770.vDLL_CNTL = in rv770_populate_smc_initial_state()
1045 table->initialState.levels[0].mclk.mclk770.vMPLL_SS = in rv770_populate_smc_initial_state()
1047 table->initialState.levels[0].mclk.mclk770.vMPLL_SS2 = in rv770_populate_smc_initial_state()
1050 table->initialState.levels[0].mclk.mclk770.mclk_value = in rv770_populate_smc_initial_state()
1051 cpu_to_be32(initial_state->low.mclk); in rv770_populate_smc_initial_state()
1094 if (initial_state->low.mclk <= pi->mclk_strobe_mode_threshold) in rv770_populate_smc_initial_state()
1096 rv740_get_mclk_frequency_ratio(initial_state->low.mclk) | 0x10; in rv770_populate_smc_initial_state()
1100 if (initial_state->low.mclk >= pi->mclk_edc_enable_threshold) in rv770_populate_smc_initial_state()
1758 if (current_state->high.mclk <= pi->mclk_odt_threshold) in rv770_program_dcodt_before_state_switch()
1761 if (new_state->high.mclk <= pi->mclk_odt_threshold) in rv770_program_dcodt_before_state_switch()
1787 if (current_state->high.mclk <= pi->mclk_odt_threshold) in rv770_program_dcodt_after_state_switch()
1790 if (new_state->high.mclk <= pi->mclk_odt_threshold) in rv770_program_dcodt_after_state_switch()
2182 u32 sclk, mclk; in rv7xx_parse_pplib_clock_info() local
2201 mclk = le16_to_cpu(clock_info->evergreen.usMemoryClockLow); in rv7xx_parse_pplib_clock_info()
2202 mclk |= clock_info->evergreen.ucMemoryClockHigh << 16; in rv7xx_parse_pplib_clock_info()
2210 mclk = le16_to_cpu(clock_info->r600.usMemoryClockLow); in rv7xx_parse_pplib_clock_info()
2211 mclk |= clock_info->r600.ucMemoryClockHigh << 16; in rv7xx_parse_pplib_clock_info()
2217 pl->mclk = mclk; in rv7xx_parse_pplib_clock_info()
2253 pl->mclk = rdev->clock.default_mclk; in rv7xx_parse_pplib_clock_info()
2262 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk; in rv7xx_parse_pplib_clock_info()
2445 printk("\t\tpower level 0 sclk: %u mclk: %u vddc: %u vddci: %u\n", in rv770_dpm_print_power_state()
2446 pl->sclk, pl->mclk, pl->vddc, pl->vddci); in rv770_dpm_print_power_state()
2448 printk("\t\tpower level 1 sclk: %u mclk: %u vddc: %u vddci: %u\n", in rv770_dpm_print_power_state()
2449 pl->sclk, pl->mclk, pl->vddc, pl->vddci); in rv770_dpm_print_power_state()
2451 printk("\t\tpower level 2 sclk: %u mclk: %u vddc: %u vddci: %u\n", in rv770_dpm_print_power_state()
2452 pl->sclk, pl->mclk, pl->vddc, pl->vddci); in rv770_dpm_print_power_state()
2455 printk("\t\tpower level 0 sclk: %u mclk: %u vddc: %u\n", in rv770_dpm_print_power_state()
2456 pl->sclk, pl->mclk, pl->vddc); in rv770_dpm_print_power_state()
2458 printk("\t\tpower level 1 sclk: %u mclk: %u vddc: %u\n", in rv770_dpm_print_power_state()
2459 pl->sclk, pl->mclk, pl->vddc); in rv770_dpm_print_power_state()
2461 printk("\t\tpower level 2 sclk: %u mclk: %u vddc: %u\n", in rv770_dpm_print_power_state()
2462 pl->sclk, pl->mclk, pl->vddc); in rv770_dpm_print_power_state()
2488 seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u vddci: %u\n", in rv770_dpm_debugfs_print_current_performance_level()
2489 current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci); in rv770_dpm_debugfs_print_current_performance_level()
2491 seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u\n", in rv770_dpm_debugfs_print_current_performance_level()
2492 current_index, pl->sclk, pl->mclk, pl->vddc); in rv770_dpm_debugfs_print_current_performance_level()
2537 return pl->mclk; in rv770_dpm_get_current_mclk()
2567 return requested_state->low.mclk; in rv770_dpm_get_mclk()
2569 return requested_state->high.mclk; in rv770_dpm_get_mclk()
2578 /* mclk switching doesn't seem to work reliably on desktop RV770s */ in rv770_dpm_vblank_too_short()
2581 switch_limit = 0xffffffff; /* disable mclk switching */ in rv770_dpm_vblank_too_short()