Lines Matching +full:clkf +full:- +full:- +full:-
124 u32 spll_func_cntl = pi->clk_regs.rv770.cg_spll_func_cntl; in rv740_populate_sclk_value()
125 u32 spll_func_cntl_2 = pi->clk_regs.rv770.cg_spll_func_cntl_2; in rv740_populate_sclk_value()
126 u32 spll_func_cntl_3 = pi->clk_regs.rv770.cg_spll_func_cntl_3; in rv740_populate_sclk_value()
127 u32 cg_spll_spread_spectrum = pi->clk_regs.rv770.cg_spll_spread_spectrum; in rv740_populate_sclk_value()
128 u32 cg_spll_spread_spectrum_2 = pi->clk_regs.rv770.cg_spll_spread_spectrum_2; in rv740_populate_sclk_value()
130 u32 reference_clock = rdev->clock.spll.reference_freq; in rv740_populate_sclk_value()
157 if (pi->sclk_ss) { in rv740_populate_sclk_value()
175 sclk->sclk_value = cpu_to_be32(engine_clock); in rv740_populate_sclk_value()
176 sclk->vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in rv740_populate_sclk_value()
177 sclk->vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2); in rv740_populate_sclk_value()
178 sclk->vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); in rv740_populate_sclk_value()
179 sclk->vCG_SPLL_SPREAD_SPECTRUM = cpu_to_be32(cg_spll_spread_spectrum); in rv740_populate_sclk_value()
180 sclk->vCG_SPLL_SPREAD_SPECTRUM_2 = cpu_to_be32(cg_spll_spread_spectrum_2); in rv740_populate_sclk_value()
190 u32 mpll_ad_func_cntl = pi->clk_regs.rv770.mpll_ad_func_cntl; in rv740_populate_mclk_value()
191 u32 mpll_ad_func_cntl_2 = pi->clk_regs.rv770.mpll_ad_func_cntl_2; in rv740_populate_mclk_value()
192 u32 mpll_dq_func_cntl = pi->clk_regs.rv770.mpll_dq_func_cntl; in rv740_populate_mclk_value()
193 u32 mpll_dq_func_cntl_2 = pi->clk_regs.rv770.mpll_dq_func_cntl_2; in rv740_populate_mclk_value()
194 u32 mclk_pwrmgt_cntl = pi->clk_regs.rv770.mclk_pwrmgt_cntl; in rv740_populate_mclk_value()
195 u32 dll_cntl = pi->clk_regs.rv770.dll_cntl; in rv740_populate_mclk_value()
196 u32 mpll_ss1 = pi->clk_regs.rv770.mpll_ss1; in rv740_populate_mclk_value()
197 u32 mpll_ss2 = pi->clk_regs.rv770.mpll_ss2; in rv740_populate_mclk_value()
217 mpll_ad_func_cntl |= CLKF(dividers.whole_fb_div); in rv740_populate_mclk_value()
226 if (pi->mem_gddr5) { in rv740_populate_mclk_value()
234 mpll_dq_func_cntl |= CLKF(dividers.whole_fb_div); in rv740_populate_mclk_value()
244 if (pi->mclk_ss) { in rv740_populate_mclk_value()
250 u32 reference_clock = rdev->clock.mpll.reference_freq; in rv740_populate_mclk_value()
255 return -EINVAL; in rv740_populate_mclk_value()
268 dll_speed = rv740_get_dll_speed(pi->mem_gddr5, in rv740_populate_mclk_value()
274 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock); in rv740_populate_mclk_value()
275 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv740_populate_mclk_value()
276 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv740_populate_mclk_value()
277 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv740_populate_mclk_value()
278 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv740_populate_mclk_value()
279 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv740_populate_mclk_value()
280 mclk->mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv740_populate_mclk_value()
281 mclk->mclk770.vMPLL_SS = cpu_to_be32(mpll_ss1); in rv740_populate_mclk_value()
282 mclk->mclk770.vMPLL_SS2 = cpu_to_be32(mpll_ss2); in rv740_populate_mclk_value()
291 pi->clk_regs.rv770.cg_spll_func_cntl = in rv740_read_clock_registers()
293 pi->clk_regs.rv770.cg_spll_func_cntl_2 = in rv740_read_clock_registers()
295 pi->clk_regs.rv770.cg_spll_func_cntl_3 = in rv740_read_clock_registers()
297 pi->clk_regs.rv770.cg_spll_spread_spectrum = in rv740_read_clock_registers()
299 pi->clk_regs.rv770.cg_spll_spread_spectrum_2 = in rv740_read_clock_registers()
302 pi->clk_regs.rv770.mpll_ad_func_cntl = in rv740_read_clock_registers()
304 pi->clk_regs.rv770.mpll_ad_func_cntl_2 = in rv740_read_clock_registers()
306 pi->clk_regs.rv770.mpll_dq_func_cntl = in rv740_read_clock_registers()
308 pi->clk_regs.rv770.mpll_dq_func_cntl_2 = in rv740_read_clock_registers()
310 pi->clk_regs.rv770.mclk_pwrmgt_cntl = in rv740_read_clock_registers()
312 pi->clk_regs.rv770.dll_cntl = RREG32(DLL_CNTL); in rv740_read_clock_registers()
313 pi->clk_regs.rv770.mpll_ss1 = RREG32(MPLL_SS1); in rv740_read_clock_registers()
314 pi->clk_regs.rv770.mpll_ss2 = RREG32(MPLL_SS2); in rv740_read_clock_registers()
321 u32 mpll_ad_func_cntl = pi->clk_regs.rv770.mpll_ad_func_cntl; in rv740_populate_smc_acpi_state()
322 u32 mpll_ad_func_cntl_2 = pi->clk_regs.rv770.mpll_ad_func_cntl_2; in rv740_populate_smc_acpi_state()
323 u32 mpll_dq_func_cntl = pi->clk_regs.rv770.mpll_dq_func_cntl; in rv740_populate_smc_acpi_state()
324 u32 mpll_dq_func_cntl_2 = pi->clk_regs.rv770.mpll_dq_func_cntl_2; in rv740_populate_smc_acpi_state()
325 u32 spll_func_cntl = pi->clk_regs.rv770.cg_spll_func_cntl; in rv740_populate_smc_acpi_state()
326 u32 spll_func_cntl_2 = pi->clk_regs.rv770.cg_spll_func_cntl_2; in rv740_populate_smc_acpi_state()
327 u32 spll_func_cntl_3 = pi->clk_regs.rv770.cg_spll_func_cntl_3; in rv740_populate_smc_acpi_state()
328 u32 mclk_pwrmgt_cntl = pi->clk_regs.rv770.mclk_pwrmgt_cntl; in rv740_populate_smc_acpi_state()
329 u32 dll_cntl = pi->clk_regs.rv770.dll_cntl; in rv740_populate_smc_acpi_state()
331 table->ACPIState = table->initialState; in rv740_populate_smc_acpi_state()
333 table->ACPIState.flags &= ~PPSMC_SWSTATE_FLAG_DC; in rv740_populate_smc_acpi_state()
335 if (pi->acpi_vddc) { in rv740_populate_smc_acpi_state()
336 rv770_populate_vddc_value(rdev, pi->acpi_vddc, in rv740_populate_smc_acpi_state()
337 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state()
338 table->ACPIState.levels[0].gen2PCIE = in rv740_populate_smc_acpi_state()
339 pi->pcie_gen2 ? in rv740_populate_smc_acpi_state()
340 pi->acpi_pcie_gen2 : 0; in rv740_populate_smc_acpi_state()
341 table->ACPIState.levels[0].gen2XSP = in rv740_populate_smc_acpi_state()
342 pi->acpi_pcie_gen2; in rv740_populate_smc_acpi_state()
344 rv770_populate_vddc_value(rdev, pi->min_vddc_in_table, in rv740_populate_smc_acpi_state()
345 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state()
346 table->ACPIState.levels[0].gen2PCIE = 0; in rv740_populate_smc_acpi_state()
376 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv740_populate_smc_acpi_state()
377 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv740_populate_smc_acpi_state()
378 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv740_populate_smc_acpi_state()
379 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv740_populate_smc_acpi_state()
380 table->ACPIState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv740_populate_smc_acpi_state()
381 table->ACPIState.levels[0].mclk.mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv740_populate_smc_acpi_state()
383 table->ACPIState.levels[0].mclk.mclk770.mclk_value = 0; in rv740_populate_smc_acpi_state()
385 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in rv740_populate_smc_acpi_state()
386 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2); in rv740_populate_smc_acpi_state()
387 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); in rv740_populate_smc_acpi_state()
389 table->ACPIState.levels[0].sclk.sclk_value = 0; in rv740_populate_smc_acpi_state()
391 table->ACPIState.levels[1] = table->ACPIState.levels[0]; in rv740_populate_smc_acpi_state()
392 table->ACPIState.levels[2] = table->ACPIState.levels[0]; in rv740_populate_smc_acpi_state()
394 rv770_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in rv740_populate_smc_acpi_state()
415 mc_para_index = (u8)((memory_clock - 10000) / 2500); in rv740_get_mclk_frequency_ratio()