Lines Matching refs:R600_POWER_LEVEL_LOW

438 	pi->hw.sclks[R600_POWER_LEVEL_LOW] =  in rv6xx_calculate_engine_speed_stepping_parameters()
445 pi->hw.low_sclk_index = R600_POWER_LEVEL_LOW; in rv6xx_calculate_engine_speed_stepping_parameters()
461 pi->hw.mclks[R600_POWER_LEVEL_LOW] = in rv6xx_calculate_memory_clock_stepping_parameters()
477 pi->hw.low_mclk_index = R600_POWER_LEVEL_LOW; in rv6xx_calculate_memory_clock_stepping_parameters()
488 pi->hw.vddc[R600_POWER_LEVEL_LOW] = state->low.vddc; in rv6xx_calculate_voltage_stepping_parameters()
496 pi->hw.backbias[R600_POWER_LEVEL_LOW] = in rv6xx_calculate_voltage_stepping_parameters()
503 pi->hw.pcie_gen2[R600_POWER_LEVEL_LOW] = in rv6xx_calculate_voltage_stepping_parameters()
522 pi->hw.medium_vddc_index = R600_POWER_LEVEL_LOW; in rv6xx_calculate_voltage_stepping_parameters()
749 pi->hw.sclks[R600_POWER_LEVEL_LOW], in rv6xx_program_sclk_spread_spectrum_parameters_lowest_entry()
750 R600_POWER_LEVEL_LOW); in rv6xx_program_sclk_spread_spectrum_parameters_lowest_entry()
802 (pi->hw.sclks[R600_POWER_LEVEL_LOW] * 0xFF / 0x40)) in rv6xx_program_memory_timing_parameters()
806 pi->hw.sclks[R600_POWER_LEVEL_LOW] * 0xFF / 0x40; in rv6xx_program_memory_timing_parameters()
810 sqm_ratio = (STATE0(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_LOW]) | in rv6xx_program_memory_timing_parameters()
818 pi->hw.sclks[R600_POWER_LEVEL_LOW])) | in rv6xx_program_memory_timing_parameters()
1084 r600_power_level_set_voltage_index(rdev, R600_POWER_LEVEL_LOW, in rv6xx_program_power_level_low()
1086 r600_power_level_set_mem_clock_index(rdev, R600_POWER_LEVEL_LOW, in rv6xx_program_power_level_low()
1088 r600_power_level_set_eng_clock_index(rdev, R600_POWER_LEVEL_LOW, in rv6xx_program_power_level_low()
1090 r600_power_level_set_watermark_id(rdev, R600_POWER_LEVEL_LOW, in rv6xx_program_power_level_low()
1092 r600_power_level_set_pcie_gen2(rdev, R600_POWER_LEVEL_LOW, in rv6xx_program_power_level_low()
1093 pi->hw.pcie_gen2[R600_POWER_LEVEL_LOW]); in rv6xx_program_power_level_low()
1100 r600_power_level_set_voltage_index(rdev, R600_POWER_LEVEL_LOW, 0); in rv6xx_program_power_level_low_to_lowest_state()
1101 r600_power_level_set_mem_clock_index(rdev, R600_POWER_LEVEL_LOW, 0); in rv6xx_program_power_level_low_to_lowest_state()
1102 r600_power_level_set_eng_clock_index(rdev, R600_POWER_LEVEL_LOW, 0); in rv6xx_program_power_level_low_to_lowest_state()
1104 r600_power_level_set_watermark_id(rdev, R600_POWER_LEVEL_LOW, in rv6xx_program_power_level_low_to_lowest_state()
1107 r600_power_level_set_pcie_gen2(rdev, R600_POWER_LEVEL_LOW, in rv6xx_program_power_level_low_to_lowest_state()
1108 pi->hw.pcie_gen2[R600_POWER_LEVEL_LOW]); in rv6xx_program_power_level_low_to_lowest_state()
1149 pi->hw.pcie_gen2[R600_POWER_LEVEL_LOW]); in rv6xx_program_power_level_medium_for_transition()
1477 rv6xx_enable_engine_spread_spectrum(rdev, R600_POWER_LEVEL_LOW, false); in rv6xx_enable_spread_spectrum()
1592 r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true); in rv6xx_dpm_enable()
1620 r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true); in rv6xx_dpm_disable()
1629 r600_wait_for_power_level(rdev, R600_POWER_LEVEL_LOW); in rv6xx_dpm_disable()
1668 r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true); in rv6xx_dpm_set_power_state()
1674 r600_wait_for_power_level(rdev, R600_POWER_LEVEL_LOW); in rv6xx_dpm_set_power_state()
1706 r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, false); in rv6xx_dpm_set_power_state()
1707 r600_wait_for_power_level_unequal(rdev, R600_POWER_LEVEL_LOW); in rv6xx_dpm_set_power_state()
1715 r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true); in rv6xx_dpm_set_power_state()
1716 r600_wait_for_power_level(rdev, R600_POWER_LEVEL_LOW); in rv6xx_dpm_set_power_state()
2144 r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true); in rv6xx_dpm_force_performance_level()
2146 r600_wait_for_power_level(rdev, R600_POWER_LEVEL_LOW); in rv6xx_dpm_force_performance_level()
2152 r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, false); in rv6xx_dpm_force_performance_level()