Lines Matching full:pm
64 for (i = 0; i < rdev->pm.num_power_states; i++) { in radeon_pm_get_type_index()
65 if (rdev->pm.power_state[i].type == ps_type) { in radeon_pm_get_type_index()
72 return rdev->pm.default_power_state_index; in radeon_pm_get_type_index()
77 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { in radeon_pm_acpi_event_handler()
78 mutex_lock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
80 rdev->pm.dpm.ac_power = true; in radeon_pm_acpi_event_handler()
82 rdev->pm.dpm.ac_power = false; in radeon_pm_acpi_event_handler()
85 radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power); in radeon_pm_acpi_event_handler()
87 mutex_unlock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
88 } else if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_acpi_event_handler()
89 if (rdev->pm.profile == PM_PROFILE_AUTO) { in radeon_pm_acpi_event_handler()
90 mutex_lock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
93 mutex_unlock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
100 switch (rdev->pm.profile) { in radeon_pm_update_profile()
102 rdev->pm.profile_index = PM_PROFILE_DEFAULT_IDX; in radeon_pm_update_profile()
106 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
107 rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; in radeon_pm_update_profile()
109 rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; in radeon_pm_update_profile()
111 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
112 rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; in radeon_pm_update_profile()
114 rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; in radeon_pm_update_profile()
118 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
119 rdev->pm.profile_index = PM_PROFILE_LOW_MH_IDX; in radeon_pm_update_profile()
121 rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX; in radeon_pm_update_profile()
124 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
125 rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; in radeon_pm_update_profile()
127 rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; in radeon_pm_update_profile()
130 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
131 rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; in radeon_pm_update_profile()
133 rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; in radeon_pm_update_profile()
137 if (rdev->pm.active_crtc_count == 0) { in radeon_pm_update_profile()
138 rdev->pm.requested_power_state_index = in radeon_pm_update_profile()
139 rdev->pm.profiles[rdev->pm.profile_index].dpms_off_ps_idx; in radeon_pm_update_profile()
140 rdev->pm.requested_clock_mode_index = in radeon_pm_update_profile()
141 rdev->pm.profiles[rdev->pm.profile_index].dpms_off_cm_idx; in radeon_pm_update_profile()
143 rdev->pm.requested_power_state_index = in radeon_pm_update_profile()
144 rdev->pm.profiles[rdev->pm.profile_index].dpms_on_ps_idx; in radeon_pm_update_profile()
145 rdev->pm.requested_clock_mode_index = in radeon_pm_update_profile()
146 rdev->pm.profiles[rdev->pm.profile_index].dpms_on_cm_idx; in radeon_pm_update_profile()
165 if (rdev->pm.active_crtcs) { in radeon_sync_with_vblank()
166 rdev->pm.vblank_sync = false; in radeon_sync_with_vblank()
168 rdev->irq.vblank_queue, rdev->pm.vblank_sync, in radeon_sync_with_vblank()
178 if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && in radeon_set_power_state()
179 (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) in radeon_set_power_state()
183 sclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
184 clock_info[rdev->pm.requested_clock_mode_index].sclk; in radeon_set_power_state()
185 if (sclk > rdev->pm.default_sclk) in radeon_set_power_state()
186 sclk = rdev->pm.default_sclk; in radeon_set_power_state()
192 if ((rdev->pm.pm_method == PM_METHOD_PROFILE) && in radeon_set_power_state()
194 rdev->pm.active_crtc_count && in radeon_set_power_state()
195 ((rdev->pm.profile_index == PM_PROFILE_MID_MH_IDX) || in radeon_set_power_state()
196 (rdev->pm.profile_index == PM_PROFILE_LOW_MH_IDX))) in radeon_set_power_state()
197 mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
198 clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].mclk; in radeon_set_power_state()
200 mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
201 clock_info[rdev->pm.requested_clock_mode_index].mclk; in radeon_set_power_state()
203 if (mclk > rdev->pm.default_mclk) in radeon_set_power_state()
204 mclk = rdev->pm.default_mclk; in radeon_set_power_state()
207 if (sclk < rdev->pm.current_sclk) in radeon_set_power_state()
212 if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_set_power_state()
224 if (sclk != rdev->pm.current_sclk) { in radeon_set_power_state()
228 rdev->pm.current_sclk = sclk; in radeon_set_power_state()
233 if (rdev->asic->pm.set_memory_clock && (mclk != rdev->pm.current_mclk)) { in radeon_set_power_state()
237 rdev->pm.current_mclk = mclk; in radeon_set_power_state()
247 rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index; in radeon_set_power_state()
248 rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index; in radeon_set_power_state()
250 DRM_DEBUG_DRIVER("pm: GUI not idle!!!\n"); in radeon_set_power_state()
259 if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && in radeon_pm_set_clocks()
260 (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) in radeon_pm_set_clocks()
263 down_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
276 up_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
286 if (rdev->pm.active_crtcs & (1 << i)) { in radeon_pm_set_clocks()
289 rdev->pm.req_vblank |= (1 << i); in radeon_pm_set_clocks()
303 if (rdev->pm.req_vblank & (1 << i)) { in radeon_pm_set_clocks()
304 rdev->pm.req_vblank &= ~(1 << i); in radeon_pm_set_clocks()
313 if (rdev->pm.active_crtc_count) in radeon_pm_set_clocks()
316 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_pm_set_clocks()
319 up_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
328 DRM_DEBUG_DRIVER("%d Power State(s)\n", rdev->pm.num_power_states); in radeon_pm_print_states()
329 for (i = 0; i < rdev->pm.num_power_states; i++) { in radeon_pm_print_states()
330 power_state = &rdev->pm.power_state[i]; in radeon_pm_print_states()
333 if (i == rdev->pm.default_power_state_index) in radeon_pm_print_states()
362 int cp = rdev->pm.profile; in radeon_get_pm_profile()
383 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_profile()
384 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_set_pm_profile()
386 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_set_pm_profile()
388 rdev->pm.profile = PM_PROFILE_AUTO; in radeon_set_pm_profile()
390 rdev->pm.profile = PM_PROFILE_LOW; in radeon_set_pm_profile()
392 rdev->pm.profile = PM_PROFILE_MID; in radeon_set_pm_profile()
394 rdev->pm.profile = PM_PROFILE_HIGH; in radeon_set_pm_profile()
405 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_profile()
416 int pm = rdev->pm.pm_method; in radeon_get_pm_method() local
418 return sysfs_emit(buf, "%s\n", (pm == PM_METHOD_DYNPM) ? "dynpm" : in radeon_get_pm_method()
419 (pm == PM_METHOD_PROFILE) ? "profile" : "dpm"); in radeon_get_pm_method()
438 if (rdev->pm.pm_method == PM_METHOD_DPM) { in radeon_set_pm_method()
444 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_method()
445 rdev->pm.pm_method = PM_METHOD_DYNPM; in radeon_set_pm_method()
446 rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; in radeon_set_pm_method()
447 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_set_pm_method()
448 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_method()
450 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_method()
452 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_set_pm_method()
453 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_set_pm_method()
454 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_set_pm_method()
455 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_method()
456 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_set_pm_method()
472 enum radeon_pm_state_type pm = rdev->pm.dpm.user_state; in radeon_get_dpm_state() local
475 (pm == POWER_STATE_TYPE_BATTERY) ? "battery" : in radeon_get_dpm_state()
476 (pm == POWER_STATE_TYPE_BALANCED) ? "balanced" : "performance"); in radeon_get_dpm_state()
487 mutex_lock(&rdev->pm.mutex); in radeon_set_dpm_state()
489 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY; in radeon_set_dpm_state()
491 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_set_dpm_state()
493 rdev->pm.dpm.user_state = POWER_STATE_TYPE_PERFORMANCE; in radeon_set_dpm_state()
495 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_state()
499 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_state()
516 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; in radeon_get_dpm_forced_performance_level()
542 mutex_lock(&rdev->pm.mutex); in radeon_set_dpm_forced_performance_level()
554 if (rdev->pm.dpm.thermal_active) { in radeon_set_dpm_forced_performance_level()
563 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_forced_performance_level()
682 if (rdev->asic->pm.get_temperature) in radeon_hwmon_show_temp()
699 temp = rdev->pm.dpm.thermal.min_temp; in radeon_hwmon_show_temp_thresh()
701 temp = rdev->pm.dpm.thermal.max_temp; in radeon_hwmon_show_temp_thresh()
781 if (rdev->pm.pm_method != PM_METHOD_DPM && in hwmon_attributes_visible()
798 if (rdev->pm.no_fan && in hwmon_attributes_visible()
842 switch (rdev->pm.int_thermal_type) { in radeon_hwmon_init()
851 if (rdev->asic->pm.get_temperature == NULL) in radeon_hwmon_init()
853 rdev->pm.int_hwmon_dev = hwmon_device_register_with_groups(rdev->dev, in radeon_hwmon_init()
856 if (IS_ERR(rdev->pm.int_hwmon_dev)) { in radeon_hwmon_init()
857 err = PTR_ERR(rdev->pm.int_hwmon_dev); in radeon_hwmon_init()
871 if (rdev->pm.int_hwmon_dev) in radeon_hwmon_fini()
872 hwmon_device_unregister(rdev->pm.int_hwmon_dev); in radeon_hwmon_fini()
879 pm.dpm.thermal.work); in radeon_dpm_thermal_work_handler()
883 if (!rdev->pm.dpm_enabled) in radeon_dpm_thermal_work_handler()
886 if (rdev->asic->pm.get_temperature) { in radeon_dpm_thermal_work_handler()
889 if (temp < rdev->pm.dpm.thermal.min_temp) in radeon_dpm_thermal_work_handler()
891 dpm_state = rdev->pm.dpm.user_state; in radeon_dpm_thermal_work_handler()
893 if (rdev->pm.dpm.thermal.high_to_low) in radeon_dpm_thermal_work_handler()
895 dpm_state = rdev->pm.dpm.user_state; in radeon_dpm_thermal_work_handler()
897 mutex_lock(&rdev->pm.mutex); in radeon_dpm_thermal_work_handler()
899 rdev->pm.dpm.thermal_active = true; in radeon_dpm_thermal_work_handler()
901 rdev->pm.dpm.thermal_active = false; in radeon_dpm_thermal_work_handler()
902 rdev->pm.dpm.state = dpm_state; in radeon_dpm_thermal_work_handler()
903 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_thermal_work_handler()
910 bool single_display = (rdev->pm.dpm.new_active_crtc_count < 2) ? in radeon_dpm_single_display()
947 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in radeon_dpm_pick_power_state()
948 ps = &rdev->pm.dpm.ps[i]; in radeon_dpm_pick_power_state()
981 if (rdev->pm.dpm.uvd_ps) in radeon_dpm_pick_power_state()
982 return rdev->pm.dpm.uvd_ps; in radeon_dpm_pick_power_state()
1002 return rdev->pm.dpm.boot_ps; in radeon_dpm_pick_power_state()
1031 if (rdev->pm.dpm.uvd_ps) { in radeon_dpm_pick_power_state()
1032 return rdev->pm.dpm.uvd_ps; in radeon_dpm_pick_power_state()
1064 if (!rdev->pm.dpm_enabled) in radeon_dpm_change_power_state_locked()
1067 if (rdev->pm.dpm.user_state != rdev->pm.dpm.state) { in radeon_dpm_change_power_state_locked()
1069 if ((!rdev->pm.dpm.thermal_active) && in radeon_dpm_change_power_state_locked()
1070 (!rdev->pm.dpm.uvd_active)) in radeon_dpm_change_power_state_locked()
1071 rdev->pm.dpm.state = rdev->pm.dpm.user_state; in radeon_dpm_change_power_state_locked()
1073 dpm_state = rdev->pm.dpm.state; in radeon_dpm_change_power_state_locked()
1077 rdev->pm.dpm.requested_ps = ps; in radeon_dpm_change_power_state_locked()
1082 if (rdev->pm.dpm.current_ps == rdev->pm.dpm.requested_ps) { in radeon_dpm_change_power_state_locked()
1084 if (ps->vce_active != rdev->pm.dpm.vce_active) in radeon_dpm_change_power_state_locked()
1087 if (rdev->pm.dpm.single_display != single_display) in radeon_dpm_change_power_state_locked()
1093 if (rdev->pm.dpm.new_active_crtcs != rdev->pm.dpm.current_active_crtcs) { in radeon_dpm_change_power_state_locked()
1098 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1099 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1107 if (rdev->pm.dpm.new_active_crtcs == in radeon_dpm_change_power_state_locked()
1108 rdev->pm.dpm.current_active_crtcs) { in radeon_dpm_change_power_state_locked()
1111 if ((rdev->pm.dpm.current_active_crtc_count > 1) && in radeon_dpm_change_power_state_locked()
1112 (rdev->pm.dpm.new_active_crtc_count > 1)) { in radeon_dpm_change_power_state_locked()
1117 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1118 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1128 radeon_dpm_print_power_state(rdev, rdev->pm.dpm.current_ps); in radeon_dpm_change_power_state_locked()
1130 radeon_dpm_print_power_state(rdev, rdev->pm.dpm.requested_ps); in radeon_dpm_change_power_state_locked()
1133 down_write(&rdev->pm.mclk_lock); in radeon_dpm_change_power_state_locked()
1137 ps->vce_active = rdev->pm.dpm.vce_active; in radeon_dpm_change_power_state_locked()
1159 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps; in radeon_dpm_change_power_state_locked()
1163 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1164 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1165 rdev->pm.dpm.single_display = single_display; in radeon_dpm_change_power_state_locked()
1168 if (rdev->pm.dpm.thermal_active) { in radeon_dpm_change_power_state_locked()
1169 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; in radeon_dpm_change_power_state_locked()
1173 rdev->pm.dpm.forced_level = level; in radeon_dpm_change_power_state_locked()
1176 radeon_dpm_force_performance_level(rdev, rdev->pm.dpm.forced_level); in radeon_dpm_change_power_state_locked()
1182 up_write(&rdev->pm.mclk_lock); in radeon_dpm_change_power_state_locked()
1190 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1193 enable |= rdev->pm.dpm.sd > 0; in radeon_dpm_enable_uvd()
1194 enable |= rdev->pm.dpm.hd > 0; in radeon_dpm_enable_uvd()
1197 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1200 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1201 rdev->pm.dpm.uvd_active = true; in radeon_dpm_enable_uvd()
1204 if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0)) in radeon_dpm_enable_uvd()
1206 else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0)) in radeon_dpm_enable_uvd()
1208 else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 1)) in radeon_dpm_enable_uvd()
1210 else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2)) in radeon_dpm_enable_uvd()
1215 rdev->pm.dpm.state = dpm_state; in radeon_dpm_enable_uvd()
1216 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1218 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1219 rdev->pm.dpm.uvd_active = false; in radeon_dpm_enable_uvd()
1220 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1230 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1231 rdev->pm.dpm.vce_active = true; in radeon_dpm_enable_vce()
1233 rdev->pm.dpm.vce_level = RADEON_VCE_LEVEL_AC_ALL; in radeon_dpm_enable_vce()
1234 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1236 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1237 rdev->pm.dpm.vce_active = false; in radeon_dpm_enable_vce()
1238 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1246 mutex_lock(&rdev->pm.mutex); in radeon_pm_suspend_old()
1247 if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_suspend_old()
1248 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) in radeon_pm_suspend_old()
1249 rdev->pm.dynpm_state = DYNPM_STATE_SUSPENDED; in radeon_pm_suspend_old()
1251 mutex_unlock(&rdev->pm.mutex); in radeon_pm_suspend_old()
1253 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_pm_suspend_old()
1258 mutex_lock(&rdev->pm.mutex); in radeon_pm_suspend_dpm()
1262 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_suspend_dpm()
1263 rdev->pm.dpm_enabled = false; in radeon_pm_suspend_dpm()
1264 mutex_unlock(&rdev->pm.mutex); in radeon_pm_suspend_dpm()
1269 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_suspend()
1281 if (rdev->pm.default_vddc) in radeon_pm_resume_old()
1282 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_resume_old()
1284 if (rdev->pm.default_vddci) in radeon_pm_resume_old()
1285 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_resume_old()
1287 if (rdev->pm.default_sclk) in radeon_pm_resume_old()
1288 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_resume_old()
1289 if (rdev->pm.default_mclk) in radeon_pm_resume_old()
1290 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_resume_old()
1293 mutex_lock(&rdev->pm.mutex); in radeon_pm_resume_old()
1294 rdev->pm.current_power_state_index = rdev->pm.default_power_state_index; in radeon_pm_resume_old()
1295 rdev->pm.current_clock_mode_index = 0; in radeon_pm_resume_old()
1296 rdev->pm.current_sclk = rdev->pm.default_sclk; in radeon_pm_resume_old()
1297 rdev->pm.current_mclk = rdev->pm.default_mclk; in radeon_pm_resume_old()
1298 if (rdev->pm.power_state) { in radeon_pm_resume_old()
1299 …rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vol… in radeon_pm_resume_old()
1300 …rdev->pm.current_vddci = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vo… in radeon_pm_resume_old()
1302 if (rdev->pm.pm_method == PM_METHOD_DYNPM in radeon_pm_resume_old()
1303 && rdev->pm.dynpm_state == DYNPM_STATE_SUSPENDED) { in radeon_pm_resume_old()
1304 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_resume_old()
1305 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_resume_old()
1308 mutex_unlock(&rdev->pm.mutex); in radeon_pm_resume_old()
1317 mutex_lock(&rdev->pm.mutex); in radeon_pm_resume_dpm()
1318 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_resume_dpm()
1321 mutex_unlock(&rdev->pm.mutex); in radeon_pm_resume_dpm()
1324 rdev->pm.dpm_enabled = true; in radeon_pm_resume_dpm()
1332 if (rdev->pm.default_vddc) in radeon_pm_resume_dpm()
1333 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_resume_dpm()
1335 if (rdev->pm.default_vddci) in radeon_pm_resume_dpm()
1336 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_resume_dpm()
1338 if (rdev->pm.default_sclk) in radeon_pm_resume_dpm()
1339 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_resume_dpm()
1340 if (rdev->pm.default_mclk) in radeon_pm_resume_dpm()
1341 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_resume_dpm()
1347 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_resume()
1357 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_pm_init_old()
1358 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_pm_init_old()
1359 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_pm_init_old()
1360 rdev->pm.dynpm_can_upclock = true; in radeon_pm_init_old()
1361 rdev->pm.dynpm_can_downclock = true; in radeon_pm_init_old()
1362 rdev->pm.default_sclk = rdev->clock.default_sclk; in radeon_pm_init_old()
1363 rdev->pm.default_mclk = rdev->clock.default_mclk; in radeon_pm_init_old()
1364 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_old()
1365 rdev->pm.current_mclk = rdev->clock.default_mclk; in radeon_pm_init_old()
1366 rdev->pm.int_thermal_type = THERMAL_TYPE_NONE; in radeon_pm_init_old()
1379 if (rdev->pm.default_vddc) in radeon_pm_init_old()
1380 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_init_old()
1382 if (rdev->pm.default_vddci) in radeon_pm_init_old()
1383 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_init_old()
1385 if (rdev->pm.default_sclk) in radeon_pm_init_old()
1386 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_init_old()
1387 if (rdev->pm.default_mclk) in radeon_pm_init_old()
1388 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_init_old()
1397 INIT_DELAYED_WORK(&rdev->pm.dynpm_idle_work, radeon_dynpm_idle_work_handler); in radeon_pm_init_old()
1399 if (rdev->pm.num_power_states > 1) { in radeon_pm_init_old()
1411 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in radeon_dpm_print_power_states()
1413 radeon_dpm_print_power_state(rdev, &rdev->pm.dpm.ps[i]); in radeon_dpm_print_power_states()
1422 rdev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; in radeon_pm_init_dpm()
1423 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_pm_init_dpm()
1424 rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO; in radeon_pm_init_dpm()
1425 rdev->pm.default_sclk = rdev->clock.default_sclk; in radeon_pm_init_dpm()
1426 rdev->pm.default_mclk = rdev->clock.default_mclk; in radeon_pm_init_dpm()
1427 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_dpm()
1428 rdev->pm.current_mclk = rdev->clock.default_mclk; in radeon_pm_init_dpm()
1429 rdev->pm.int_thermal_type = THERMAL_TYPE_NONE; in radeon_pm_init_dpm()
1441 INIT_WORK(&rdev->pm.dpm.thermal.work, radeon_dpm_thermal_work_handler); in radeon_pm_init_dpm()
1442 mutex_lock(&rdev->pm.mutex); in radeon_pm_init_dpm()
1444 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_init_dpm()
1449 mutex_unlock(&rdev->pm.mutex); in radeon_pm_init_dpm()
1452 rdev->pm.dpm_enabled = true; in radeon_pm_init_dpm()
1461 rdev->pm.dpm_enabled = false; in radeon_pm_init_dpm()
1465 if (rdev->pm.default_vddc) in radeon_pm_init_dpm()
1466 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_init_dpm()
1468 if (rdev->pm.default_vddci) in radeon_pm_init_dpm()
1469 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_init_dpm()
1471 if (rdev->pm.default_sclk) in radeon_pm_init_dpm()
1472 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_init_dpm()
1473 if (rdev->pm.default_mclk) in radeon_pm_init_dpm()
1474 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_init_dpm()
1525 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1529 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1531 rdev->pm.pm_method = PM_METHOD_DPM; in radeon_pm_init()
1533 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1563 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1567 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1569 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1571 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1573 rdev->pm.pm_method = PM_METHOD_DPM; in radeon_pm_init()
1577 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1581 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_init()
1591 if (rdev->pm.pm_method == PM_METHOD_DPM) { in radeon_pm_late_init()
1592 if (rdev->pm.dpm_enabled) { in radeon_pm_late_init()
1593 if (!rdev->pm.sysfs_initialized) { in radeon_pm_late_init()
1607 rdev->pm.sysfs_initialized = true; in radeon_pm_late_init()
1610 mutex_lock(&rdev->pm.mutex); in radeon_pm_late_init()
1612 mutex_unlock(&rdev->pm.mutex); in radeon_pm_late_init()
1614 rdev->pm.dpm_enabled = false; in radeon_pm_late_init()
1624 if ((rdev->pm.num_power_states > 1) && in radeon_pm_late_init()
1625 (!rdev->pm.sysfs_initialized)) { in radeon_pm_late_init()
1634 rdev->pm.sysfs_initialized = true; in radeon_pm_late_init()
1642 if (rdev->pm.num_power_states > 1) { in radeon_pm_fini_old()
1643 mutex_lock(&rdev->pm.mutex); in radeon_pm_fini_old()
1644 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_fini_old()
1645 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_pm_fini_old()
1648 } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_fini_old()
1650 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_pm_fini_old()
1651 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_pm_fini_old()
1654 mutex_unlock(&rdev->pm.mutex); in radeon_pm_fini_old()
1656 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_pm_fini_old()
1663 kfree(rdev->pm.power_state); in radeon_pm_fini_old()
1668 if (rdev->pm.num_power_states > 1) { in radeon_pm_fini_dpm()
1669 mutex_lock(&rdev->pm.mutex); in radeon_pm_fini_dpm()
1671 mutex_unlock(&rdev->pm.mutex); in radeon_pm_fini_dpm()
1682 kfree(rdev->pm.power_state); in radeon_pm_fini_dpm()
1687 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_fini()
1699 if (rdev->pm.num_power_states < 2) in radeon_pm_compute_clocks_old()
1702 mutex_lock(&rdev->pm.mutex); in radeon_pm_compute_clocks_old()
1704 rdev->pm.active_crtcs = 0; in radeon_pm_compute_clocks_old()
1705 rdev->pm.active_crtc_count = 0; in radeon_pm_compute_clocks_old()
1711 rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_old()
1712 rdev->pm.active_crtc_count++; in radeon_pm_compute_clocks_old()
1717 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_compute_clocks_old()
1720 } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_compute_clocks_old()
1721 if (rdev->pm.dynpm_state != DYNPM_STATE_DISABLED) { in radeon_pm_compute_clocks_old()
1722 if (rdev->pm.active_crtc_count > 1) { in radeon_pm_compute_clocks_old()
1723 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { in radeon_pm_compute_clocks_old()
1724 cancel_delayed_work(&rdev->pm.dynpm_idle_work); in radeon_pm_compute_clocks_old()
1726 rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; in radeon_pm_compute_clocks_old()
1727 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_pm_compute_clocks_old()
1733 } else if (rdev->pm.active_crtc_count == 1) { in radeon_pm_compute_clocks_old()
1736 if (rdev->pm.dynpm_state == DYNPM_STATE_MINIMUM) { in radeon_pm_compute_clocks_old()
1737 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_compute_clocks_old()
1738 rdev->pm.dynpm_planned_action = DYNPM_ACTION_UPCLOCK; in radeon_pm_compute_clocks_old()
1742 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_compute_clocks_old()
1744 } else if (rdev->pm.dynpm_state == DYNPM_STATE_PAUSED) { in radeon_pm_compute_clocks_old()
1745 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_compute_clocks_old()
1746 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_compute_clocks_old()
1751 if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) { in radeon_pm_compute_clocks_old()
1752 cancel_delayed_work(&rdev->pm.dynpm_idle_work); in radeon_pm_compute_clocks_old()
1754 rdev->pm.dynpm_state = DYNPM_STATE_MINIMUM; in radeon_pm_compute_clocks_old()
1755 rdev->pm.dynpm_planned_action = DYNPM_ACTION_MINIMUM; in radeon_pm_compute_clocks_old()
1763 mutex_unlock(&rdev->pm.mutex); in radeon_pm_compute_clocks_old()
1773 if (!rdev->pm.dpm_enabled) in radeon_pm_compute_clocks_dpm()
1776 mutex_lock(&rdev->pm.mutex); in radeon_pm_compute_clocks_dpm()
1779 rdev->pm.dpm.new_active_crtcs = 0; in radeon_pm_compute_clocks_dpm()
1780 rdev->pm.dpm.new_active_crtc_count = 0; in radeon_pm_compute_clocks_dpm()
1781 rdev->pm.dpm.high_pixelclock_count = 0; in radeon_pm_compute_clocks_dpm()
1787 rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_dpm()
1788 rdev->pm.dpm.new_active_crtc_count++; in radeon_pm_compute_clocks_dpm()
1794 rdev->pm.dpm.high_pixelclock_count++; in radeon_pm_compute_clocks_dpm()
1801 rdev->pm.dpm.ac_power = true; in radeon_pm_compute_clocks_dpm()
1803 rdev->pm.dpm.ac_power = false; in radeon_pm_compute_clocks_dpm()
1807 mutex_unlock(&rdev->pm.mutex); in radeon_pm_compute_clocks_dpm()
1813 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_compute_clocks()
1828 if (rdev->pm.active_crtcs & (1 << crtc)) { in radeon_pm_in_vbl()
1849 DRM_DEBUG_DRIVER("not in vbl for pm change %08x at %s\n", stat_crtc, in radeon_pm_debug_check_in_vbl()
1859 pm.dynpm_idle_work.work); in radeon_dynpm_idle_work_handler()
1861 mutex_lock(&rdev->pm.mutex); in radeon_dynpm_idle_work_handler()
1862 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { in radeon_dynpm_idle_work_handler()
1877 if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_DOWNCLOCK) { in radeon_dynpm_idle_work_handler()
1878 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_dynpm_idle_work_handler()
1879 } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1880 rdev->pm.dynpm_can_upclock) { in radeon_dynpm_idle_work_handler()
1881 rdev->pm.dynpm_planned_action = in radeon_dynpm_idle_work_handler()
1883 rdev->pm.dynpm_action_timeout = jiffies + in radeon_dynpm_idle_work_handler()
1887 if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_UPCLOCK) { in radeon_dynpm_idle_work_handler()
1888 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_dynpm_idle_work_handler()
1889 } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1890 rdev->pm.dynpm_can_downclock) { in radeon_dynpm_idle_work_handler()
1891 rdev->pm.dynpm_planned_action = in radeon_dynpm_idle_work_handler()
1893 rdev->pm.dynpm_action_timeout = jiffies + in radeon_dynpm_idle_work_handler()
1901 if (rdev->pm.dynpm_planned_action != DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1902 time_after(jiffies, rdev->pm.dynpm_action_timeout)) { in radeon_dynpm_idle_work_handler()
1907 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_dynpm_idle_work_handler()
1910 mutex_unlock(&rdev->pm.mutex); in radeon_dynpm_idle_work_handler()
1926 } else if (rdev->pm.dpm_enabled) { in radeon_debugfs_pm_info_show()
1927 mutex_lock(&rdev->pm.mutex); in radeon_debugfs_pm_info_show()
1932 mutex_unlock(&rdev->pm.mutex); in radeon_debugfs_pm_info_show()
1934 seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk); in radeon_debugfs_pm_info_show()
1937 seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk); in radeon_debugfs_pm_info_show()
1940 seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk); in radeon_debugfs_pm_info_show()
1941 if (rdev->asic->pm.get_memory_clock) in radeon_debugfs_pm_info_show()
1943 if (rdev->pm.current_vddc) in radeon_debugfs_pm_info_show()
1944 seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc); in radeon_debugfs_pm_info_show()
1945 if (rdev->asic->pm.get_pcie_lanes) in radeon_debugfs_pm_info_show()