728 	uint32_t fp_gen_cntl = RREG32(RADEON_FP_GEN_CNTL);  in radeon_legacy_tmds_int_dpms()  local
733 		fp_gen_cntl |= (RADEON_FP_FPON | RADEON_FP_TMDS_EN);  in radeon_legacy_tmds_int_dpms()
738 		fp_gen_cntl &= ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN);  in radeon_legacy_tmds_int_dpms()
742 	WREG32(RADEON_FP_GEN_CNTL, fp_gen_cntl);  in radeon_legacy_tmds_int_dpms()
782 	uint32_t tmp, tmds_pll_cntl, tmds_transmitter_cntl, fp_gen_cntl;  in radeon_legacy_tmds_int_mode_set()  local
828 	fp_gen_cntl = (RREG32(RADEON_FP_GEN_CNTL) |  in radeon_legacy_tmds_int_mode_set()
832 	fp_gen_cntl &= ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN);  in radeon_legacy_tmds_int_mode_set()
834 	fp_gen_cntl &= ~(RADEON_FP_RMX_HVSYNC_CONTROL_EN |  in radeon_legacy_tmds_int_mode_set()
843 		fp_gen_cntl |= RADEON_FP_PANEL_FORMAT;  /* 24 bit format */  in radeon_legacy_tmds_int_mode_set()
845 		fp_gen_cntl &= ~RADEON_FP_PANEL_FORMAT;/* 18 bit format */  in radeon_legacy_tmds_int_mode_set()
849 			fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK;  in radeon_legacy_tmds_int_mode_set()
851 				fp_gen_cntl |= R200_FP_SOURCE_SEL_RMX;  in radeon_legacy_tmds_int_mode_set()
853 				fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC1;  in radeon_legacy_tmds_int_mode_set()
855 			fp_gen_cntl &= ~RADEON_FP_SEL_CRTC2;  in radeon_legacy_tmds_int_mode_set()
858 			fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK;  in radeon_legacy_tmds_int_mode_set()
859 			fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC2;  in radeon_legacy_tmds_int_mode_set()
861 			fp_gen_cntl |= RADEON_FP_SEL_CRTC2;  in radeon_legacy_tmds_int_mode_set()
866 	WREG32(RADEON_FP_GEN_CNTL, fp_gen_cntl);  in radeon_legacy_tmds_int_mode_set()