Lines Matching refs:bo_va
202 struct radeon_bo_va *bo_va; in radeon_gem_object_open() local
215 bo_va = radeon_vm_bo_find(vm, rbo); in radeon_gem_object_open()
216 if (!bo_va) { in radeon_gem_object_open()
217 bo_va = radeon_vm_bo_add(rdev, vm, rbo); in radeon_gem_object_open()
219 ++bo_va->ref_count; in radeon_gem_object_open()
233 struct radeon_bo_va *bo_va; in radeon_gem_object_close() local
247 bo_va = radeon_vm_bo_find(vm, rbo); in radeon_gem_object_close()
248 if (bo_va) { in radeon_gem_object_close()
249 if (--bo_va->ref_count == 0) { in radeon_gem_object_close()
250 radeon_vm_bo_rmv(rdev, bo_va); in radeon_gem_object_close()
606 struct radeon_bo_va *bo_va) in radeon_gem_va_update_vm() argument
617 tv.bo = &bo_va->bo->tbo; in radeon_gem_va_update_vm()
621 vm_bos = radeon_vm_get_bos(rdev, bo_va->vm, &list); in radeon_gem_va_update_vm()
637 mutex_lock(&bo_va->vm->mutex); in radeon_gem_va_update_vm()
638 r = radeon_vm_clear_freed(rdev, bo_va->vm); in radeon_gem_va_update_vm()
642 if (bo_va->it.start && bo_va->bo) in radeon_gem_va_update_vm()
643 r = radeon_vm_bo_update(rdev, bo_va, bo_va->bo->tbo.resource); in radeon_gem_va_update_vm()
646 mutex_unlock(&bo_va->vm->mutex); in radeon_gem_va_update_vm()
666 struct radeon_bo_va *bo_va; in radeon_gem_va_ioctl() local
729 bo_va = radeon_vm_bo_find(&fpriv->vm, rbo); in radeon_gem_va_ioctl()
730 if (!bo_va) { in radeon_gem_va_ioctl()
739 if (bo_va->it.start) { in radeon_gem_va_ioctl()
741 args->offset = bo_va->it.start * RADEON_GPU_PAGE_SIZE; in radeon_gem_va_ioctl()
745 r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags); in radeon_gem_va_ioctl()
748 r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0); in radeon_gem_va_ioctl()
754 radeon_gem_va_update_vm(rdev, bo_va); in radeon_gem_va_ioctl()