Lines Matching refs:RADEON_SCLK_MORE_CNTL

521 				tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);  in radeon_legacy_set_clock_gating()
524 				WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);  in radeon_legacy_set_clock_gating()
574 				tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);  in radeon_legacy_set_clock_gating()
577 				WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);  in radeon_legacy_set_clock_gating()
692 				tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);  in radeon_legacy_set_clock_gating()
703 				WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);  in radeon_legacy_set_clock_gating()
764 			tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);  in radeon_legacy_set_clock_gating()
766 			WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);  in radeon_legacy_set_clock_gating()
808 			tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);  in radeon_legacy_set_clock_gating()
810 			WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);  in radeon_legacy_set_clock_gating()
892 				tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);  in radeon_legacy_set_clock_gating()
894 				WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);  in radeon_legacy_set_clock_gating()