Lines Matching refs:WREG32

266 	WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));  in ni_read_disabled_bios()
269 WREG32(AVIVO_D1VGA_CONTROL, in ni_read_disabled_bios()
272 WREG32(AVIVO_D2VGA_CONTROL, in ni_read_disabled_bios()
275 WREG32(AVIVO_VGA_RENDER_CONTROL, in ni_read_disabled_bios()
278 WREG32(R600_ROM_CNTL, rom_cntl | R600_SCK_OVERWRITE); in ni_read_disabled_bios()
283 WREG32(R600_BUS_CNTL, bus_cntl); in ni_read_disabled_bios()
285 WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); in ni_read_disabled_bios()
286 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control); in ni_read_disabled_bios()
287 WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); in ni_read_disabled_bios()
289 WREG32(R600_ROM_CNTL, rom_cntl); in ni_read_disabled_bios()
313 WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN)); in r700_read_disabled_bios()
315 WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS)); in r700_read_disabled_bios()
317 WREG32(AVIVO_D1VGA_CONTROL, in r700_read_disabled_bios()
320 WREG32(AVIVO_D2VGA_CONTROL, in r700_read_disabled_bios()
323 WREG32(AVIVO_VGA_RENDER_CONTROL, in r700_read_disabled_bios()
330 WREG32(R600_CG_SPLL_FUNC_CNTL, (cg_spll_func_cntl | in r700_read_disabled_bios()
338 WREG32(R600_ROM_CNTL, (rom_cntl & ~R600_SCK_OVERWRITE)); in r700_read_disabled_bios()
340 WREG32(R600_ROM_CNTL, (rom_cntl | R600_SCK_OVERWRITE)); in r700_read_disabled_bios()
346 WREG32(R600_CG_SPLL_FUNC_CNTL, cg_spll_func_cntl); in r700_read_disabled_bios()
353 WREG32(RADEON_VIPH_CONTROL, viph_control); in r700_read_disabled_bios()
354 WREG32(R600_BUS_CNTL, bus_cntl); in r700_read_disabled_bios()
355 WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); in r700_read_disabled_bios()
356 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control); in r700_read_disabled_bios()
357 WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); in r700_read_disabled_bios()
358 WREG32(R600_ROM_CNTL, rom_cntl); in r700_read_disabled_bios()
392 WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN)); in r600_read_disabled_bios()
394 WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS)); in r600_read_disabled_bios()
396 WREG32(AVIVO_D1VGA_CONTROL, in r600_read_disabled_bios()
399 WREG32(AVIVO_D2VGA_CONTROL, in r600_read_disabled_bios()
402 WREG32(AVIVO_VGA_RENDER_CONTROL, in r600_read_disabled_bios()
405 WREG32(R600_ROM_CNTL, in r600_read_disabled_bios()
410 WREG32(R600_GENERAL_PWRMGT, (general_pwrmgt & ~R600_OPEN_DRAIN_PADS)); in r600_read_disabled_bios()
411 WREG32(R600_LOW_VID_LOWER_GPIO_CNTL, in r600_read_disabled_bios()
413 WREG32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, in r600_read_disabled_bios()
415 WREG32(R600_HIGH_VID_LOWER_GPIO_CNTL, in r600_read_disabled_bios()
417 WREG32(R600_CTXSW_VID_LOWER_GPIO_CNTL, in r600_read_disabled_bios()
419 WREG32(R600_LOWER_GPIO_ENABLE, (lower_gpio_enable | 0x400)); in r600_read_disabled_bios()
424 WREG32(RADEON_VIPH_CONTROL, viph_control); in r600_read_disabled_bios()
425 WREG32(R600_BUS_CNTL, bus_cntl); in r600_read_disabled_bios()
426 WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); in r600_read_disabled_bios()
427 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control); in r600_read_disabled_bios()
428 WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); in r600_read_disabled_bios()
429 WREG32(R600_ROM_CNTL, rom_cntl); in r600_read_disabled_bios()
430 WREG32(R600_GENERAL_PWRMGT, general_pwrmgt); in r600_read_disabled_bios()
431 WREG32(R600_LOW_VID_LOWER_GPIO_CNTL, low_vid_lower_gpio_cntl); in r600_read_disabled_bios()
432 WREG32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, medium_vid_lower_gpio_cntl); in r600_read_disabled_bios()
433 WREG32(R600_HIGH_VID_LOWER_GPIO_CNTL, high_vid_lower_gpio_cntl); in r600_read_disabled_bios()
434 WREG32(R600_CTXSW_VID_LOWER_GPIO_CNTL, ctxsw_vid_lower_gpio_cntl); in r600_read_disabled_bios()
435 WREG32(R600_LOWER_GPIO_ENABLE, lower_gpio_enable); in r600_read_disabled_bios()
462 WREG32(RADEON_SEPROM_CNTL1, in avivo_read_disabled_bios()
465 WREG32(RADEON_GPIOPAD_A, 0); in avivo_read_disabled_bios()
466 WREG32(RADEON_GPIOPAD_EN, 0); in avivo_read_disabled_bios()
467 WREG32(RADEON_GPIOPAD_MASK, 0); in avivo_read_disabled_bios()
470 WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN)); in avivo_read_disabled_bios()
473 WREG32(RV370_BUS_CNTL, (bus_cntl & ~RV370_BUS_BIOS_DIS_ROM)); in avivo_read_disabled_bios()
476 WREG32(AVIVO_D1VGA_CONTROL, in avivo_read_disabled_bios()
479 WREG32(AVIVO_D2VGA_CONTROL, in avivo_read_disabled_bios()
482 WREG32(AVIVO_VGA_RENDER_CONTROL, in avivo_read_disabled_bios()
488 WREG32(RADEON_SEPROM_CNTL1, seprom_cntl1); in avivo_read_disabled_bios()
489 WREG32(RADEON_VIPH_CONTROL, viph_control); in avivo_read_disabled_bios()
490 WREG32(RV370_BUS_CNTL, bus_cntl); in avivo_read_disabled_bios()
491 WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); in avivo_read_disabled_bios()
492 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control); in avivo_read_disabled_bios()
493 WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); in avivo_read_disabled_bios()
494 WREG32(RADEON_GPIOPAD_A, gpiopad_a); in avivo_read_disabled_bios()
495 WREG32(RADEON_GPIOPAD_EN, gpiopad_en); in avivo_read_disabled_bios()
496 WREG32(RADEON_GPIOPAD_MASK, gpiopad_mask); in avivo_read_disabled_bios()
530 WREG32(RADEON_SEPROM_CNTL1, in legacy_read_disabled_bios()
535 WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN)); in legacy_read_disabled_bios()
539 WREG32(RV370_BUS_CNTL, (bus_cntl & ~RV370_BUS_BIOS_DIS_ROM)); in legacy_read_disabled_bios()
541 WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM)); in legacy_read_disabled_bios()
544 WREG32(RADEON_CRTC_GEN_CNTL, in legacy_read_disabled_bios()
549 WREG32(RADEON_CRTC2_GEN_CNTL, in legacy_read_disabled_bios()
554 WREG32(RADEON_CRTC_EXT_CNTL, in legacy_read_disabled_bios()
560 WREG32(RADEON_FP2_GEN_CNTL, (fp2_gen_cntl & ~RADEON_FP2_ON)); in legacy_read_disabled_bios()
566 WREG32(RADEON_SEPROM_CNTL1, seprom_cntl1); in legacy_read_disabled_bios()
567 WREG32(RADEON_VIPH_CONTROL, viph_control); in legacy_read_disabled_bios()
569 WREG32(RV370_BUS_CNTL, bus_cntl); in legacy_read_disabled_bios()
571 WREG32(RADEON_BUS_CNTL, bus_cntl); in legacy_read_disabled_bios()
572 WREG32(RADEON_CRTC_GEN_CNTL, crtc_gen_cntl); in legacy_read_disabled_bios()
574 WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); in legacy_read_disabled_bios()
576 WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl); in legacy_read_disabled_bios()
578 WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl); in legacy_read_disabled_bios()