Lines Matching +full:0 +full:x22
29 #define R600_BSP_DFLT 0x41EB
30 #define R600_BSU_DFLT 0x2
36 #define R600_TD_DFLT 0
37 #define R600_UTC_DFLT_00 0x24
38 #define R600_UTC_DFLT_01 0x22
39 #define R600_UTC_DFLT_02 0x22
40 #define R600_UTC_DFLT_03 0x22
41 #define R600_UTC_DFLT_04 0x22
42 #define R600_UTC_DFLT_05 0x22
43 #define R600_UTC_DFLT_06 0x22
44 #define R600_UTC_DFLT_07 0x22
45 #define R600_UTC_DFLT_08 0x22
46 #define R600_UTC_DFLT_09 0x22
47 #define R600_UTC_DFLT_10 0x22
48 #define R600_UTC_DFLT_11 0x22
49 #define R600_UTC_DFLT_12 0x22
50 #define R600_UTC_DFLT_13 0x22
51 #define R600_UTC_DFLT_14 0x22
52 #define R600_DTC_DFLT_00 0x24
53 #define R600_DTC_DFLT_01 0x22
54 #define R600_DTC_DFLT_02 0x22
55 #define R600_DTC_DFLT_03 0x22
56 #define R600_DTC_DFLT_04 0x22
57 #define R600_DTC_DFLT_05 0x22
58 #define R600_DTC_DFLT_06 0x22
59 #define R600_DTC_DFLT_07 0x22
60 #define R600_DTC_DFLT_08 0x22
61 #define R600_DTC_DFLT_09 0x22
62 #define R600_DTC_DFLT_10 0x22
63 #define R600_DTC_DFLT_11 0x22
64 #define R600_DTC_DFLT_12 0x22
65 #define R600_DTC_DFLT_13 0x22
66 #define R600_DTC_DFLT_14 0x22
67 #define R600_VRC_DFLT 0x0000C003
70 #define R600_VRU_DFLT 0x3
71 #define R600_SPLLSTEPTIME_DFLT 0x1000
72 #define R600_SPLLSTEPUNIT_DFLT 0x3
73 #define R600_TPU_DFLT 0
74 #define R600_TPC_DFLT 0x200
75 #define R600_SSTU_DFLT 0
76 #define R600_SST_DFLT 0x00C8
77 #define R600_GICST_DFLT 0x200
78 #define R600_FCT_DFLT 0x0400
79 #define R600_FCTU_DFLT 0
80 #define R600_CTXCGTT3DRPHC_DFLT 0x20
81 #define R600_CTXCGTT3DRSDC_DFLT 0x40
82 #define R600_VDDC3DOORPHC_DFLT 0x100
83 #define R600_VDDC3DOORSDC_DFLT 0x7
84 #define R600_VDDC3DOORSU_DFLT 0
105 R600_POWER_LEVEL_LOW = 0,
118 R600_DISPLAY_WATERMARK_LOW = 0,
123 R600_PM_DISPLAY_GAP_VBLANK_OR_WM = 0,