Lines Matching +full:3 +full:base +full:- +full:x
38 #include "atom-names.h"
39 #include "atom-bits.h"
45 #define ATOM_COND_BELOW 3
58 #define PLL_DATA 3
84 {1, 2, 3, 0},
85 {1, 2, 3, 0},
86 {1, 2, 3, 0},
92 static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
98 while (n--) in debug_print_spaces()
109 static uint32_t atom_iio_execute(struct atom_context *ctx, int base, in atom_iio_execute() argument
112 struct radeon_device *rdev = ctx->card->dev->dev_private; in atom_iio_execute()
116 switch (CU8(base)) { in atom_iio_execute()
118 base++; in atom_iio_execute()
121 temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1)); in atom_iio_execute()
122 base += 3; in atom_iio_execute()
125 if (rdev->family == CHIP_RV515) in atom_iio_execute()
126 (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1)); in atom_iio_execute()
127 ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp); in atom_iio_execute()
128 base += 3; in atom_iio_execute()
132 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << in atom_iio_execute()
133 CU8(base + 2)); in atom_iio_execute()
134 base += 3; in atom_iio_execute()
138 (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base + in atom_iio_execute()
140 base += 3; in atom_iio_execute()
144 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << in atom_iio_execute()
145 CU8(base + 3)); in atom_iio_execute()
147 ((index >> CU8(base + 2)) & in atom_iio_execute()
148 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base + in atom_iio_execute()
149 3); in atom_iio_execute()
150 base += 4; in atom_iio_execute()
154 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << in atom_iio_execute()
155 CU8(base + 3)); in atom_iio_execute()
157 ((data >> CU8(base + 2)) & in atom_iio_execute()
158 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base + in atom_iio_execute()
159 3); in atom_iio_execute()
160 base += 4; in atom_iio_execute()
164 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << in atom_iio_execute()
165 CU8(base + 3)); in atom_iio_execute()
167 ((ctx->io_attr >> CU8(base + 2)) & in atom_iio_execute()
168 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << in atom_iio_execute()
169 CU8(base + 3); in atom_iio_execute()
170 base += 4; in atom_iio_execute()
184 struct atom_context *gctx = ctx->ctx; in atom_get_src_int()
186 align = (attr >> 3) & 7; in atom_get_src_int()
192 DEBUG("REG[0x%04X]", idx); in atom_get_src_int()
193 idx += gctx->reg_block; in atom_get_src_int()
194 switch (gctx->io_mode) { in atom_get_src_int()
196 val = gctx->card->reg_read(gctx->card, idx); in atom_get_src_int()
205 if (!(gctx->io_mode & 0x80)) { in atom_get_src_int()
209 if (!gctx->iio[gctx->io_mode & 0x7F]) { in atom_get_src_int()
211 gctx->io_mode & 0x7F); in atom_get_src_int()
216 gctx->iio[gctx->io_mode & 0x7F], in atom_get_src_int()
225 if (idx < ctx->ps_size) in atom_get_src_int()
226 val = get_unaligned_le32((u32 *)&ctx->ps[idx]); in atom_get_src_int()
228 pr_info("PS index out of range: %i > %i\n", idx, ctx->ps_size); in atom_get_src_int()
230 DEBUG("PS[0x%02X,0x%04X]", idx, val); in atom_get_src_int()
236 DEBUG("WS[0x%02X]", idx); in atom_get_src_int()
239 val = gctx->divmul[0]; in atom_get_src_int()
242 val = gctx->divmul[1]; in atom_get_src_int()
245 val = gctx->data_block; in atom_get_src_int()
248 val = gctx->shift; in atom_get_src_int()
251 val = 1 << gctx->shift; in atom_get_src_int()
254 val = ~(1 << gctx->shift); in atom_get_src_int()
257 val = gctx->fb_base; in atom_get_src_int()
260 val = gctx->io_attr; in atom_get_src_int()
263 val = gctx->reg_block; in atom_get_src_int()
266 if (idx < ctx->ws_size) in atom_get_src_int()
267 val = ctx->ws[idx]; in atom_get_src_int()
269 pr_info("WS index out of range: %i > %i\n", idx, ctx->ws_size); in atom_get_src_int()
276 if (gctx->data_block) in atom_get_src_int()
277 DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block); in atom_get_src_int()
279 DEBUG("ID[0x%04X]", idx); in atom_get_src_int()
281 val = U32(idx + gctx->data_block); in atom_get_src_int()
286 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) { in atom_get_src_int()
288 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes); in atom_get_src_int()
291 val = gctx->scratch[(gctx->fb_base / 4) + idx]; in atom_get_src_int()
293 DEBUG("FB[0x%02X]", idx); in atom_get_src_int()
301 DEBUG("IMM 0x%08X\n", val); in atom_get_src_int()
309 DEBUG("IMM 0x%04X\n", val); in atom_get_src_int()
318 DEBUG("IMM 0x%02X\n", val); in atom_get_src_int()
326 DEBUG("PLL[0x%02X]", idx); in atom_get_src_int()
327 val = gctx->card->pll_read(gctx->card, idx); in atom_get_src_int()
333 DEBUG("MC[0x%02X]", idx); in atom_get_src_int()
334 val = gctx->card->mc_read(gctx->card, idx); in atom_get_src_int()
344 DEBUG(".[31:0] -> 0x%08X\n", val); in atom_get_src_int()
347 DEBUG(".[15:0] -> 0x%04X\n", val); in atom_get_src_int()
350 DEBUG(".[23:8] -> 0x%04X\n", val); in atom_get_src_int()
353 DEBUG(".[31:16] -> 0x%04X\n", val); in atom_get_src_int()
356 DEBUG(".[7:0] -> 0x%02X\n", val); in atom_get_src_int()
359 DEBUG(".[15:8] -> 0x%02X\n", val); in atom_get_src_int()
362 DEBUG(".[23:16] -> 0x%02X\n", val); in atom_get_src_int()
365 DEBUG(".[31:24] -> 0x%02X\n", val); in atom_get_src_int()
373 uint32_t align = (attr >> 3) & 7, arg = attr & 7; in atom_skip_src_int()
442 arg | atom_dst_to_src[(attr >> 3) & in atom_get_dst()
443 7][(attr >> 6) & 3] << 3, in atom_get_dst()
450 arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & in atom_skip_dst()
451 3] << 3, ptr); in atom_skip_dst()
458 atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val = in atom_put_dst()
460 struct atom_context *gctx = ctx->ctx; in atom_put_dst()
470 DEBUG("REG[0x%04X]", idx); in atom_put_dst()
471 idx += gctx->reg_block; in atom_put_dst()
472 switch (gctx->io_mode) { in atom_put_dst()
475 gctx->card->reg_write(gctx->card, idx, in atom_put_dst()
478 gctx->card->reg_write(gctx->card, idx, val); in atom_put_dst()
487 if (!(gctx->io_mode & 0x80)) { in atom_put_dst()
491 if (!gctx->iio[gctx->io_mode & 0xFF]) { in atom_put_dst()
493 gctx->io_mode & 0x7F); in atom_put_dst()
496 atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF], in atom_put_dst()
503 DEBUG("PS[0x%02X]", idx); in atom_put_dst()
504 if (idx >= ctx->ps_size) { in atom_put_dst()
505 pr_info("PS index out of range: %i > %i\n", idx, ctx->ps_size); in atom_put_dst()
508 ctx->ps[idx] = cpu_to_le32(val); in atom_put_dst()
513 DEBUG("WS[0x%02X]", idx); in atom_put_dst()
516 gctx->divmul[0] = val; in atom_put_dst()
519 gctx->divmul[1] = val; in atom_put_dst()
522 gctx->data_block = val; in atom_put_dst()
525 gctx->shift = val; in atom_put_dst()
531 gctx->fb_base = val; in atom_put_dst()
534 gctx->io_attr = val; in atom_put_dst()
537 gctx->reg_block = val; in atom_put_dst()
540 if (idx >= ctx->ws_size) { in atom_put_dst()
541 pr_info("WS index out of range: %i > %i\n", idx, ctx->ws_size); in atom_put_dst()
544 ctx->ws[idx] = val; in atom_put_dst()
550 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) { in atom_put_dst()
552 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes); in atom_put_dst()
554 gctx->scratch[(gctx->fb_base / 4) + idx] = val; in atom_put_dst()
555 DEBUG("FB[0x%02X]", idx); in atom_put_dst()
560 DEBUG("PLL[0x%02X]", idx); in atom_put_dst()
561 gctx->card->pll_write(gctx->card, idx, val); in atom_put_dst()
566 DEBUG("MC[0x%02X]", idx); in atom_put_dst()
567 gctx->card->mc_write(gctx->card, idx, val); in atom_put_dst()
572 DEBUG(".[31:0] <- 0x%08X\n", old_val); in atom_put_dst()
575 DEBUG(".[15:0] <- 0x%04X\n", old_val); in atom_put_dst()
578 DEBUG(".[23:8] <- 0x%04X\n", old_val); in atom_put_dst()
581 DEBUG(".[31:16] <- 0x%04X\n", old_val); in atom_put_dst()
584 DEBUG(".[7:0] <- 0x%02X\n", old_val); in atom_put_dst()
587 DEBUG(".[15:8] <- 0x%02X\n", old_val); in atom_put_dst()
590 DEBUG(".[23:16] <- 0x%02X\n", old_val); in atom_put_dst()
593 DEBUG(".[31:24] <- 0x%02X\n", old_val); in atom_put_dst()
640 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx)) in atom_op_calltable()
641 …r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift, ctx->ps_size - ctx->ps_shift… in atom_op_calltable()
643 ctx->abort = true; in atom_op_calltable()
653 attr |= atom_def_dst[attr >> 3] << 6; in atom_op_clear()
667 ctx->ctx->cs_equal = (dst == src); in atom_op_compare()
668 ctx->ctx->cs_above = (dst > src); in atom_op_compare()
669 SDEBUG(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE", in atom_op_compare()
670 ctx->ctx->cs_above ? "GT" : "LE"); in atom_op_compare()
694 ctx->ctx->divmul[0] = dst / src; in atom_op_div()
695 ctx->ctx->divmul[1] = dst % src; in atom_op_div()
697 ctx->ctx->divmul[0] = 0; in atom_op_div()
698 ctx->ctx->divmul[1] = 0; in atom_op_div()
715 execute = ctx->ctx->cs_above; in atom_op_jump()
718 execute = ctx->ctx->cs_above || ctx->ctx->cs_equal; in atom_op_jump()
724 execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal); in atom_op_jump()
727 execute = !ctx->ctx->cs_above; in atom_op_jump()
730 execute = ctx->ctx->cs_equal; in atom_op_jump()
733 execute = !ctx->ctx->cs_equal; in atom_op_jump()
738 SDEBUG(" target: 0x%04X\n", target); in atom_op_jump()
740 if (ctx->last_jump == (ctx->start + target)) { in atom_op_jump()
742 if (time_after(cjiffies, ctx->last_jump_jiffies)) { in atom_op_jump()
743 cjiffies -= ctx->last_jump_jiffies; in atom_op_jump()
746 ctx->abort = true; in atom_op_jump()
750 ctx->last_jump_jiffies = jiffies; in atom_op_jump()
753 ctx->last_jump = ctx->start + target; in atom_op_jump()
754 ctx->last_jump_jiffies = jiffies; in atom_op_jump()
756 *ptr = ctx->start + target; in atom_op_jump()
767 mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr); in atom_op_mask()
768 SDEBUG(" mask: 0x%08x", mask); in atom_op_mask()
782 if (((attr >> 3) & 7) != ATOM_SRC_DWORD) in atom_op_move()
802 ctx->ctx->divmul[0] = dst * src; in atom_op_mul()
827 SDEBUG("POST card output: 0x%02X\n", val); in atom_op_postcard()
851 ctx->ctx->data_block = 0; in atom_op_setdatablock()
853 ctx->ctx->data_block = ctx->start; in atom_op_setdatablock()
855 ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx); in atom_op_setdatablock()
856 SDEBUG(" base: 0x%04X\n", ctx->ctx->data_block); in atom_op_setdatablock()
863 ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr); in atom_op_setfbbase()
877 ctx->ctx->io_mode = ATOM_IO_MM; in atom_op_setport()
879 ctx->ctx->io_mode = ATOM_IO_IIO | port; in atom_op_setport()
883 ctx->ctx->io_mode = ATOM_IO_PCI; in atom_op_setport()
887 ctx->ctx->io_mode = ATOM_IO_SYSIO; in atom_op_setport()
895 ctx->ctx->reg_block = U16(*ptr); in atom_op_setregblock()
897 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block); in atom_op_setregblock()
906 attr |= atom_def_dst[attr >> 3] << 6; in atom_op_shift_left()
922 attr |= atom_def_dst[attr >> 3] << 6; in atom_op_shift_right()
937 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3]; in atom_op_shl()
956 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3]; in atom_op_shr()
979 dst -= src; in atom_op_sub()
999 SDEBUG(" target: %04X\n", target); in atom_op_switch()
1000 *ptr = ctx->start + target; in atom_op_switch()
1019 ctx->ctx->cs_equal = ((dst & src) == 0); in atom_op_test()
1020 SDEBUG(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE"); in atom_op_test()
1172 int base = CU16(ctx->cmd_table + 4 + 2 * index); in atom_execute_table_locked() local
1178 if (!base) in atom_execute_table_locked()
1179 return -EINVAL; in atom_execute_table_locked()
1181 len = CU16(base + ATOM_CT_SIZE_PTR); in atom_execute_table_locked()
1182 ws = CU8(base + ATOM_CT_WS_PTR); in atom_execute_table_locked()
1183 ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK; in atom_execute_table_locked()
1184 ptr = base + ATOM_CT_CODE_PTR; in atom_execute_table_locked()
1186 SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps); in atom_execute_table_locked()
1190 ectx.start = base; in atom_execute_table_locked()
1207 SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1); in atom_execute_table_locked()
1209 SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1); in atom_execute_table_locked()
1211 DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n", in atom_execute_table_locked()
1212 base, len, ws, ps, ptr - 1); in atom_execute_table_locked()
1213 ret = -EINVAL; in atom_execute_table_locked()
1226 debug_depth--; in atom_execute_table_locked()
1238 mutex_lock(&ctx->mutex); in atom_execute_table_scratch_unlocked()
1240 ctx->data_block = 0; in atom_execute_table_scratch_unlocked()
1242 ctx->reg_block = 0; in atom_execute_table_scratch_unlocked()
1244 ctx->fb_base = 0; in atom_execute_table_scratch_unlocked()
1246 ctx->io_mode = ATOM_IO_MM; in atom_execute_table_scratch_unlocked()
1248 ctx->divmul[0] = 0; in atom_execute_table_scratch_unlocked()
1249 ctx->divmul[1] = 0; in atom_execute_table_scratch_unlocked()
1251 mutex_unlock(&ctx->mutex); in atom_execute_table_scratch_unlocked()
1258 mutex_lock(&ctx->scratch_mutex); in atom_execute_table()
1260 mutex_unlock(&ctx->scratch_mutex); in atom_execute_table()
1264 static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
1266 static void atom_index_iio(struct atom_context *ctx, int base) in atom_index_iio() argument
1268 ctx->iio = kzalloc(2 * 256, GFP_KERNEL); in atom_index_iio()
1269 if (!ctx->iio) in atom_index_iio()
1271 while (CU8(base) == ATOM_IIO_START) { in atom_index_iio()
1272 ctx->iio[CU8(base + 1)] = base + 2; in atom_index_iio()
1273 base += 2; in atom_index_iio()
1274 while (CU8(base) != ATOM_IIO_END) in atom_index_iio()
1275 base += atom_iio_len[CU8(base)]; in atom_index_iio()
1276 base += 3; in atom_index_iio()
1282 int base; in atom_parse() local
1292 ctx->card = card; in atom_parse()
1293 ctx->bios = bios; in atom_parse()
1308 base = CU16(ATOM_ROM_TABLE_PTR); in atom_parse()
1310 (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC, in atom_parse()
1317 ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR); in atom_parse()
1318 ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR); in atom_parse()
1319 atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4); in atom_parse()
1320 if (!ctx->iio) { in atom_parse()
1325 str = CSTR(CU16(base + ATOM_ROM_MSG_PTR)); in atom_parse()
1343 struct radeon_device *rdev = ctx->card->dev->dev_private; in atom_asic_init()
1344 int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR); in atom_asic_init()
1355 if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT)) in atom_asic_init()
1363 if (rdev->family < CHIP_R600) { in atom_asic_init()
1364 if (CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_SPDFANCNTL)) in atom_asic_init()
1372 kfree(ctx->iio); in atom_destroy()
1381 int idx = CU16(ctx->data_table + offset); in atom_parse_data_header()
1382 u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4); in atom_parse_data_header()
1392 *crev = CU8(idx + 3); in atom_parse_data_header()
1401 int idx = CU16(ctx->cmd_table + offset); in atom_parse_cmd_header()
1402 u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4); in atom_parse_cmd_header()
1410 *crev = CU8(idx + 3); in atom_parse_cmd_header()
1422 firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset); in atom_allocate_fb_scratch()
1424 DRM_DEBUG("atom firmware requested %08x %dkb\n", in atom_allocate_fb_scratch()
1425 le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware), in atom_allocate_fb_scratch()
1426 le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb)); in atom_allocate_fb_scratch()
1428 usage_bytes = le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb) * 1024; in atom_allocate_fb_scratch()
1430 ctx->scratch_size_bytes = 0; in atom_allocate_fb_scratch()
1434 ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL); in atom_allocate_fb_scratch()
1435 if (!ctx->scratch) in atom_allocate_fb_scratch()
1436 return -ENOMEM; in atom_allocate_fb_scratch()
1437 ctx->scratch_size_bytes = usage_bytes; in atom_allocate_fb_scratch()