49 	struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };  in visionox_vtdr6130_on()  local
53 	mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);  in visionox_vtdr6130_on()
55 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx,  in visionox_vtdr6130_on()
57 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx,  in visionox_vtdr6130_on()
60 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x09);  in visionox_vtdr6130_on()
61 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x01);  in visionox_vtdr6130_on()
62 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x00);  in visionox_vtdr6130_on()
63 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x01);  in visionox_vtdr6130_on()
64 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x12, 0x00, 0x00, 0xab,  in visionox_vtdr6130_on()
78 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x10);  in visionox_vtdr6130_on()
79 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1, 0x01, 0x38, 0x00, 0x14,  in visionox_vtdr6130_on()
83 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x13);  in visionox_vtdr6130_on()
84 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xce, 0x09, 0x11, 0x09, 0x11,  in visionox_vtdr6130_on()
88 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x14);  in visionox_vtdr6130_on()
89 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x03, 0x33);  in visionox_vtdr6130_on()
90 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4, 0x00, 0x33, 0x00, 0x00,  in visionox_vtdr6130_on()
93 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5, 0x00, 0x09, 0x09, 0x09,  in visionox_vtdr6130_on()
95 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x00, 0x00, 0x08, 0x09,  in visionox_vtdr6130_on()
97 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbc, 0x10, 0x00, 0x00, 0x06,  in visionox_vtdr6130_on()
100 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbe, 0x10, 0x10, 0x00, 0x08,  in visionox_vtdr6130_on()
103 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x80);  in visionox_vtdr6130_on()
104 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x14);  in visionox_vtdr6130_on()
105 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfa, 0x08, 0x08, 0x08);  in visionox_vtdr6130_on()
106 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x81);  in visionox_vtdr6130_on()
107 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x05);  in visionox_vtdr6130_on()
108 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf3, 0x0f);  in visionox_vtdr6130_on()
109 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x00);  in visionox_vtdr6130_on()
110 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x82);  in visionox_vtdr6130_on()
111 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf9, 0x00);  in visionox_vtdr6130_on()
112 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x51, 0x83);  in visionox_vtdr6130_on()
113 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x04);  in visionox_vtdr6130_on()
114 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf8, 0x00);  in visionox_vtdr6130_on()
115 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x00);  in visionox_vtdr6130_on()
116 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x01);  in visionox_vtdr6130_on()
117 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf4, 0x9a);  in visionox_vtdr6130_on()
118 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x00);  in visionox_vtdr6130_on()
120 	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);  in visionox_vtdr6130_on()
121 	mipi_dsi_msleep(&dsi_ctx, 120);  in visionox_vtdr6130_on()
123 	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);  in visionox_vtdr6130_on()
124 	mipi_dsi_msleep(&dsi_ctx, 20);  in visionox_vtdr6130_on()
126 	return dsi_ctx.accum_err;  in visionox_vtdr6130_on()
132 	struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };  in visionox_vtdr6130_off()  local
136 	mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);  in visionox_vtdr6130_off()
137 	mipi_dsi_msleep(&dsi_ctx, 20);  in visionox_vtdr6130_off()
139 	mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);  in visionox_vtdr6130_off()
140 	mipi_dsi_msleep(&dsi_ctx, 120);  in visionox_vtdr6130_off()