38 	gpiod_set_value_cansleep(ctx->reset_gpio, 0);  in visionox_vtdr6130_reset()
42 	gpiod_set_value_cansleep(ctx->reset_gpio, 0);  in visionox_vtdr6130_reset()
56 				     MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);  in visionox_vtdr6130_on()
58 				     MIPI_DCS_SET_DISPLAY_BRIGHTNESS, 0x00,  in visionox_vtdr6130_on()
59 				     0x00);  in visionox_vtdr6130_on()
60 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x09);  in visionox_vtdr6130_on()
61 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x01);  in visionox_vtdr6130_on()
62 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x00);  in visionox_vtdr6130_on()
63 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x01);  in visionox_vtdr6130_on()
64 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x12, 0x00, 0x00, 0xab,  in visionox_vtdr6130_on()
65 				     0x30, 0x80, 0x09, 0x60, 0x04, 0x38, 0x00,  in visionox_vtdr6130_on()
66 				     0x28, 0x02, 0x1c, 0x02, 0x1c, 0x02, 0x00,  in visionox_vtdr6130_on()
67 				     0x02, 0x0e, 0x00, 0x20, 0x03, 0xdd, 0x00,  in visionox_vtdr6130_on()
68 				     0x07, 0x00, 0x0c, 0x02, 0x77, 0x02, 0x8b,  in visionox_vtdr6130_on()
69 				     0x18, 0x00, 0x10, 0xf0, 0x07, 0x10, 0x20,  in visionox_vtdr6130_on()
70 				     0x00, 0x06, 0x0f, 0x0f, 0x33, 0x0e, 0x1c,  in visionox_vtdr6130_on()
71 				     0x2a, 0x38, 0x46, 0x54, 0x62, 0x69, 0x70,  in visionox_vtdr6130_on()
72 				     0x77, 0x79, 0x7b, 0x7d, 0x7e, 0x02, 0x02,  in visionox_vtdr6130_on()
73 				     0x22, 0x00, 0x2a, 0x40, 0x2a, 0xbe, 0x3a,  in visionox_vtdr6130_on()
74 				     0xfc, 0x3a, 0xfa, 0x3a, 0xf8, 0x3b, 0x38,  in visionox_vtdr6130_on()
75 				     0x3b, 0x78, 0x3b, 0xb6, 0x4b, 0xb6, 0x4b,  in visionox_vtdr6130_on()
76 				     0xf4, 0x4b, 0xf4, 0x6c, 0x34, 0x84, 0x74,  in visionox_vtdr6130_on()
77 				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00);  in visionox_vtdr6130_on()
78 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x10);  in visionox_vtdr6130_on()
79 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1, 0x01, 0x38, 0x00, 0x14,  in visionox_vtdr6130_on()
80 				     0x00, 0x1c, 0x00, 0x01, 0x66, 0x00, 0x14,  in visionox_vtdr6130_on()
81 				     0x00, 0x14, 0x00, 0x01, 0x66, 0x00, 0x14,  in visionox_vtdr6130_on()
82 				     0x05, 0xcc, 0x00);  in visionox_vtdr6130_on()
83 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x13);  in visionox_vtdr6130_on()
84 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xce, 0x09, 0x11, 0x09, 0x11,  in visionox_vtdr6130_on()
85 				     0x08, 0xc1, 0x07, 0xfa, 0x05, 0xa4, 0x00,  in visionox_vtdr6130_on()
86 				     0x3c, 0x00, 0x34, 0x00, 0x24, 0x00, 0x0c,  in visionox_vtdr6130_on()
87 				     0x00, 0x0c, 0x04, 0x00, 0x35);  in visionox_vtdr6130_on()
88 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x14);  in visionox_vtdr6130_on()
89 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x03, 0x33);  in visionox_vtdr6130_on()
90 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4, 0x00, 0x33, 0x00, 0x00,  in visionox_vtdr6130_on()
91 				     0x00, 0x3e, 0x00, 0x00, 0x00, 0x3e, 0x00,  in visionox_vtdr6130_on()
92 				     0x00);  in visionox_vtdr6130_on()
93 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5, 0x00, 0x09, 0x09, 0x09,  in visionox_vtdr6130_on()
94 				     0x09, 0x09, 0x09, 0x06, 0x01);  in visionox_vtdr6130_on()
95 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x00, 0x00, 0x08, 0x09,  in visionox_vtdr6130_on()
96 				     0x09, 0x09);  in visionox_vtdr6130_on()
97 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbc, 0x10, 0x00, 0x00, 0x06,  in visionox_vtdr6130_on()
98 				     0x11, 0x09, 0x3b, 0x09, 0x47, 0x09, 0x47,  in visionox_vtdr6130_on()
99 				     0x00);  in visionox_vtdr6130_on()
100 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbe, 0x10, 0x10, 0x00, 0x08,  in visionox_vtdr6130_on()
101 				     0x22, 0x09, 0x19, 0x09, 0x25, 0x09, 0x25,  in visionox_vtdr6130_on()
102 				     0x00);  in visionox_vtdr6130_on()
103 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x80);  in visionox_vtdr6130_on()
104 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x14);  in visionox_vtdr6130_on()
105 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfa, 0x08, 0x08, 0x08);  in visionox_vtdr6130_on()
106 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x81);  in visionox_vtdr6130_on()
107 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x05);  in visionox_vtdr6130_on()
108 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf3, 0x0f);  in visionox_vtdr6130_on()
109 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x00);  in visionox_vtdr6130_on()
110 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x82);  in visionox_vtdr6130_on()
111 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf9, 0x00);  in visionox_vtdr6130_on()
112 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x51, 0x83);  in visionox_vtdr6130_on()
113 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x04);  in visionox_vtdr6130_on()
114 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf8, 0x00);  in visionox_vtdr6130_on()
115 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x00);  in visionox_vtdr6130_on()
116 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x01);  in visionox_vtdr6130_on()
117 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf4, 0x9a);  in visionox_vtdr6130_on()
118 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x00);  in visionox_vtdr6130_on()
150 	if (ret < 0)  in visionox_vtdr6130_prepare()
156 	if (ret < 0) {  in visionox_vtdr6130_prepare()
163 	return 0;  in visionox_vtdr6130_prepare()
177 	return 0;  in visionox_vtdr6130_unprepare()
259 	if (ret < 0)  in visionox_vtdr6130_probe()
287 	if (ret < 0) {  in visionox_vtdr6130_probe()
293 	return 0;  in visionox_vtdr6130_probe()
302 	if (ret < 0)  in visionox_vtdr6130_remove()