Lines Matching full:st7701
103 struct st7701;
129 void (*gip_sequence)(struct st7701 *st7701);
132 struct st7701 { struct
143 int (*write_command)(struct st7701 *st7701, u8 cmd, const u8 *seq, argument
147 static inline struct st7701 *panel_to_st7701(struct drm_panel *panel) in panel_to_st7701()
149 return container_of(panel, struct st7701, panel); in panel_to_st7701()
152 static int st7701_dsi_write(struct st7701 *st7701, u8 cmd, const u8 *seq, in st7701_dsi_write() argument
155 return mipi_dsi_dcs_write(st7701->dsi, cmd, seq, len); in st7701_dsi_write()
158 static int st7701_dbi_write(struct st7701 *st7701, u8 cmd, const u8 *seq, in st7701_dbi_write() argument
161 return mipi_dbi_command_stackbuf(&st7701->dbi, cmd, seq, len); in st7701_dbi_write()
164 #define ST7701_WRITE(st7701, cmd, seq...) \ argument
167 st7701->write_command(st7701, cmd, d, ARRAY_SIZE(d)); \
170 static u8 st7701_vgls_map(struct st7701 *st7701) in st7701_vgls_map() argument
172 const struct st7701_panel_desc *desc = st7701->desc; in st7701_vgls_map()
195 static void st7701_switch_cmd_bkx(struct st7701 *st7701, bool cmd2, u8 bkx) in st7701_switch_cmd_bkx() argument
204 ST7701_WRITE(st7701, ST7701_CMD2BKX_SEL, 0x77, 0x01, 0x00, 0x00, val); in st7701_switch_cmd_bkx()
207 static void st7701_init_sequence(struct st7701 *st7701) in st7701_init_sequence() argument
209 const struct st7701_panel_desc *desc = st7701->desc; in st7701_init_sequence()
214 ST7701_WRITE(st7701, MIPI_DCS_SOFT_RESET, 0x00); in st7701_init_sequence()
219 ST7701_WRITE(st7701, MIPI_DCS_EXIT_SLEEP_MODE, 0x00); in st7701_init_sequence()
221 msleep(st7701->sleep_delay); in st7701_init_sequence()
224 st7701_switch_cmd_bkx(st7701, true, 0); in st7701_init_sequence()
226 st7701->write_command(st7701, ST7701_CMD2_BK0_PVGAMCTRL, desc->pv_gamma, in st7701_init_sequence()
228 st7701->write_command(st7701, ST7701_CMD2_BK0_NVGAMCTRL, desc->nv_gamma, in st7701_init_sequence()
241 ST7701_WRITE(st7701, ST7701_CMD2_BK0_LNESET, in st7701_init_sequence()
245 ST7701_WRITE(st7701, ST7701_CMD2_BK0_PORCTRL, in st7701_init_sequence()
256 ST7701_WRITE(st7701, ST7701_CMD2_BK0_INVSEL, in st7701_init_sequence()
263 st7701_switch_cmd_bkx(st7701, true, 1); in st7701_init_sequence()
266 ST7701_WRITE(st7701, ST7701_CMD2_BK1_VRHS, in st7701_init_sequence()
271 ST7701_WRITE(st7701, ST7701_CMD2_BK1_VCOM, in st7701_init_sequence()
276 ST7701_WRITE(st7701, ST7701_CMD2_BK1_VGHSS, in st7701_init_sequence()
283 ST7701_WRITE(st7701, ST7701_CMD2_BK1_TESTCMD, ST7701_CMD2_BK1_TESTCMD_VAL); in st7701_init_sequence()
286 ST7701_WRITE(st7701, ST7701_CMD2_BK1_VGLS, in st7701_init_sequence()
288 FIELD_PREP(ST7701_CMD2_BK1_VGLS_MASK, st7701_vgls_map(st7701))); in st7701_init_sequence()
290 ST7701_WRITE(st7701, ST7701_CMD2_BK1_PWCTLR1, in st7701_init_sequence()
299 ST7701_WRITE(st7701, ST7701_CMD2_BK1_PWCTLR2, in st7701_init_sequence()
306 ST7701_WRITE(st7701, ST7701_CMD2_BK1_SPD1, in st7701_init_sequence()
312 ST7701_WRITE(st7701, ST7701_CMD2_BK1_SPD2, in st7701_init_sequence()
317 ST7701_WRITE(st7701, ST7701_CMD2_BK1_MIPISET1, in st7701_init_sequence()
322 static void ts8550b_gip_sequence(struct st7701 *st7701) in ts8550b_gip_sequence() argument
328 ST7701_WRITE(st7701, 0xE0, 0x00, 0x00, 0x02); in ts8550b_gip_sequence()
329 ST7701_WRITE(st7701, 0xE1, 0x0B, 0x00, 0x0D, 0x00, 0x0C, 0x00, 0x0E, in ts8550b_gip_sequence()
331 ST7701_WRITE(st7701, 0xE2, 0x33, 0x33, 0x44, 0x44, 0x64, 0x00, 0x66, in ts8550b_gip_sequence()
333 ST7701_WRITE(st7701, 0xE3, 0x00, 0x00, 0x33, 0x33); in ts8550b_gip_sequence()
334 ST7701_WRITE(st7701, 0xE4, 0x44, 0x44); in ts8550b_gip_sequence()
335 ST7701_WRITE(st7701, 0xE5, 0x0C, 0x78, 0x3C, 0xA0, 0x0E, 0x78, 0x3C, in ts8550b_gip_sequence()
337 ST7701_WRITE(st7701, 0xE6, 0x00, 0x00, 0x33, 0x33); in ts8550b_gip_sequence()
338 ST7701_WRITE(st7701, 0xE7, 0x44, 0x44); in ts8550b_gip_sequence()
339 ST7701_WRITE(st7701, 0xE8, 0x0D, 0x78, 0x3C, 0xA0, 0x0F, 0x78, 0x3C, in ts8550b_gip_sequence()
341 ST7701_WRITE(st7701, 0xEB, 0x02, 0x02, 0x39, 0x39, 0xEE, 0x44, 0x00); in ts8550b_gip_sequence()
342 ST7701_WRITE(st7701, 0xEC, 0x00, 0x00); in ts8550b_gip_sequence()
343 ST7701_WRITE(st7701, 0xED, 0xFF, 0xF1, 0x04, 0x56, 0x72, 0x3F, 0xFF, in ts8550b_gip_sequence()
347 static void dmt028vghmcmi_1a_gip_sequence(struct st7701 *st7701) in dmt028vghmcmi_1a_gip_sequence() argument
349 ST7701_WRITE(st7701, 0xEE, 0x42); in dmt028vghmcmi_1a_gip_sequence()
350 ST7701_WRITE(st7701, 0xE0, 0x00, 0x00, 0x02); in dmt028vghmcmi_1a_gip_sequence()
352 ST7701_WRITE(st7701, 0xE1, in dmt028vghmcmi_1a_gip_sequence()
356 ST7701_WRITE(st7701, 0xE2, in dmt028vghmcmi_1a_gip_sequence()
360 ST7701_WRITE(st7701, 0xE3, in dmt028vghmcmi_1a_gip_sequence()
362 ST7701_WRITE(st7701, 0xE4, 0x44, 0x44); in dmt028vghmcmi_1a_gip_sequence()
363 ST7701_WRITE(st7701, 0xE5, in dmt028vghmcmi_1a_gip_sequence()
368 ST7701_WRITE(st7701, 0xE6, in dmt028vghmcmi_1a_gip_sequence()
370 ST7701_WRITE(st7701, 0xE7, 0x44, 0x44); in dmt028vghmcmi_1a_gip_sequence()
371 ST7701_WRITE(st7701, 0xE8, in dmt028vghmcmi_1a_gip_sequence()
376 ST7701_WRITE(st7701, 0xEB, in dmt028vghmcmi_1a_gip_sequence()
379 ST7701_WRITE(st7701, 0xED, in dmt028vghmcmi_1a_gip_sequence()
384 ST7701_WRITE(st7701, 0xEF, in dmt028vghmcmi_1a_gip_sequence()
388 st7701_switch_cmd_bkx(st7701, false, 0); in dmt028vghmcmi_1a_gip_sequence()
390 st7701_switch_cmd_bkx(st7701, true, 3); in dmt028vghmcmi_1a_gip_sequence()
391 ST7701_WRITE(st7701, 0xE6, 0x7C); in dmt028vghmcmi_1a_gip_sequence()
392 ST7701_WRITE(st7701, 0xE8, 0x00, 0x0E); in dmt028vghmcmi_1a_gip_sequence()
394 st7701_switch_cmd_bkx(st7701, false, 0); in dmt028vghmcmi_1a_gip_sequence()
395 ST7701_WRITE(st7701, 0x11); in dmt028vghmcmi_1a_gip_sequence()
398 st7701_switch_cmd_bkx(st7701, true, 3); in dmt028vghmcmi_1a_gip_sequence()
399 ST7701_WRITE(st7701, 0xE8, 0x00, 0x0C); in dmt028vghmcmi_1a_gip_sequence()
401 ST7701_WRITE(st7701, 0xE8, 0x00, 0x00); in dmt028vghmcmi_1a_gip_sequence()
403 st7701_switch_cmd_bkx(st7701, false, 0); in dmt028vghmcmi_1a_gip_sequence()
404 ST7701_WRITE(st7701, 0x11); in dmt028vghmcmi_1a_gip_sequence()
406 ST7701_WRITE(st7701, 0xE8, 0x00, 0x00); in dmt028vghmcmi_1a_gip_sequence()
408 st7701_switch_cmd_bkx(st7701, false, 0); in dmt028vghmcmi_1a_gip_sequence()
410 ST7701_WRITE(st7701, 0x3A, 0x70); in dmt028vghmcmi_1a_gip_sequence()
413 static void kd50t048a_gip_sequence(struct st7701 *st7701) in kd50t048a_gip_sequence() argument
419 ST7701_WRITE(st7701, 0xE0, 0x00, 0x00, 0x02); in kd50t048a_gip_sequence()
420 ST7701_WRITE(st7701, 0xE1, 0x08, 0x00, 0x0A, 0x00, 0x07, 0x00, 0x09, in kd50t048a_gip_sequence()
422 ST7701_WRITE(st7701, 0xE2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, in kd50t048a_gip_sequence()
424 ST7701_WRITE(st7701, 0xE3, 0x00, 0x00, 0x33, 0x33); in kd50t048a_gip_sequence()
425 ST7701_WRITE(st7701, 0xE4, 0x44, 0x44); in kd50t048a_gip_sequence()
426 ST7701_WRITE(st7701, 0xE5, 0x0E, 0x60, 0xA0, 0xA0, 0x10, 0x60, 0xA0, in kd50t048a_gip_sequence()
428 ST7701_WRITE(st7701, 0xE6, 0x00, 0x00, 0x33, 0x33); in kd50t048a_gip_sequence()
429 ST7701_WRITE(st7701, 0xE7, 0x44, 0x44); in kd50t048a_gip_sequence()
430 ST7701_WRITE(st7701, 0xE8, 0x0D, 0x60, 0xA0, 0xA0, 0x0F, 0x60, 0xA0, in kd50t048a_gip_sequence()
432 ST7701_WRITE(st7701, 0xEB, 0x02, 0x01, 0xE4, 0xE4, 0x44, 0x00, 0x40); in kd50t048a_gip_sequence()
433 ST7701_WRITE(st7701, 0xEC, 0x02, 0x01); in kd50t048a_gip_sequence()
434 ST7701_WRITE(st7701, 0xED, 0xAB, 0x89, 0x76, 0x54, 0x01, 0xFF, 0xFF, in kd50t048a_gip_sequence()
438 static void rg_arc_gip_sequence(struct st7701 *st7701) in rg_arc_gip_sequence() argument
440 st7701_switch_cmd_bkx(st7701, true, 3); in rg_arc_gip_sequence()
441 ST7701_WRITE(st7701, 0xEF, 0x08); in rg_arc_gip_sequence()
442 st7701_switch_cmd_bkx(st7701, true, 0); in rg_arc_gip_sequence()
443 ST7701_WRITE(st7701, 0xC7, 0x04); in rg_arc_gip_sequence()
444 ST7701_WRITE(st7701, 0xCC, 0x38); in rg_arc_gip_sequence()
445 st7701_switch_cmd_bkx(st7701, true, 1); in rg_arc_gip_sequence()
446 ST7701_WRITE(st7701, 0xB9, 0x10); in rg_arc_gip_sequence()
447 ST7701_WRITE(st7701, 0xBC, 0x03); in rg_arc_gip_sequence()
448 ST7701_WRITE(st7701, 0xC0, 0x89); in rg_arc_gip_sequence()
449 ST7701_WRITE(st7701, 0xE0, 0x00, 0x00, 0x02); in rg_arc_gip_sequence()
450 ST7701_WRITE(st7701, 0xE1, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, in rg_arc_gip_sequence()
452 ST7701_WRITE(st7701, 0xE2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, in rg_arc_gip_sequence()
454 ST7701_WRITE(st7701, 0xE3, 0x00, 0x00, 0x33, 0x00); in rg_arc_gip_sequence()
455 ST7701_WRITE(st7701, 0xE4, 0x22, 0x00); in rg_arc_gip_sequence()
456 ST7701_WRITE(st7701, 0xE5, 0x04, 0x5C, 0xA0, 0xA0, 0x06, 0x5C, 0xA0, in rg_arc_gip_sequence()
458 ST7701_WRITE(st7701, 0xE6, 0x00, 0x00, 0x33, 0x00); in rg_arc_gip_sequence()
459 ST7701_WRITE(st7701, 0xE7, 0x22, 0x00); in rg_arc_gip_sequence()
460 ST7701_WRITE(st7701, 0xE8, 0x05, 0x5C, 0xA0, 0xA0, 0x07, 0x5C, 0xA0, in rg_arc_gip_sequence()
462 ST7701_WRITE(st7701, 0xEB, 0x02, 0x00, 0x40, 0x40, 0x00, 0x00, 0x00); in rg_arc_gip_sequence()
463 ST7701_WRITE(st7701, 0xEC, 0x00, 0x00); in rg_arc_gip_sequence()
464 ST7701_WRITE(st7701, 0xED, 0xFA, 0x45, 0x0B, 0xFF, 0xFF, 0xFF, 0xFF, in rg_arc_gip_sequence()
466 ST7701_WRITE(st7701, 0xEF, 0x08, 0x08, 0x08, 0x45, 0x3F, 0x54); in rg_arc_gip_sequence()
467 st7701_switch_cmd_bkx(st7701, false, 0); in rg_arc_gip_sequence()
468 ST7701_WRITE(st7701, MIPI_DCS_SET_ADDRESS_MODE, 0x17); in rg_arc_gip_sequence()
469 ST7701_WRITE(st7701, MIPI_DCS_SET_PIXEL_FORMAT, 0x77); in rg_arc_gip_sequence()
470 ST7701_WRITE(st7701, MIPI_DCS_EXIT_SLEEP_MODE, 0x00); in rg_arc_gip_sequence()
474 static void rg28xx_gip_sequence(struct st7701 *st7701) in rg28xx_gip_sequence() argument
476 st7701_switch_cmd_bkx(st7701, true, 3); in rg28xx_gip_sequence()
477 ST7701_WRITE(st7701, 0xEF, 0x08); in rg28xx_gip_sequence()
479 st7701_switch_cmd_bkx(st7701, true, 0); in rg28xx_gip_sequence()
480 ST7701_WRITE(st7701, 0xC3, 0x02, 0x10, 0x02); in rg28xx_gip_sequence()
481 ST7701_WRITE(st7701, 0xC7, 0x04); in rg28xx_gip_sequence()
482 ST7701_WRITE(st7701, 0xCC, 0x10); in rg28xx_gip_sequence()
484 st7701_switch_cmd_bkx(st7701, true, 1); in rg28xx_gip_sequence()
485 ST7701_WRITE(st7701, 0xEE, 0x42); in rg28xx_gip_sequence()
486 ST7701_WRITE(st7701, 0xE0, 0x00, 0x00, 0x02); in rg28xx_gip_sequence()
488 ST7701_WRITE(st7701, 0xE1, 0x04, 0xA0, 0x06, 0xA0, 0x05, 0xA0, 0x07, 0xA0, in rg28xx_gip_sequence()
490 ST7701_WRITE(st7701, 0xE2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, in rg28xx_gip_sequence()
492 ST7701_WRITE(st7701, 0xE3, 0x00, 0x00, 0x22, 0x22); in rg28xx_gip_sequence()
493 ST7701_WRITE(st7701, 0xE4, 0x44, 0x44); in rg28xx_gip_sequence()
494 ST7701_WRITE(st7701, 0xE5, 0x0C, 0x90, 0xA0, 0xA0, 0x0E, 0x92, 0xA0, 0xA0, in rg28xx_gip_sequence()
496 ST7701_WRITE(st7701, 0xE6, 0x00, 0x00, 0x22, 0x22); in rg28xx_gip_sequence()
497 ST7701_WRITE(st7701, 0xE7, 0x44, 0x44); in rg28xx_gip_sequence()
498 ST7701_WRITE(st7701, 0xE8, 0x0D, 0x91, 0xA0, 0xA0, 0x0F, 0x93, 0xA0, 0xA0, in rg28xx_gip_sequence()
500 ST7701_WRITE(st7701, 0xEB, 0x00, 0x00, 0xE4, 0xE4, 0x44, 0x00, 0x40); in rg28xx_gip_sequence()
501 ST7701_WRITE(st7701, 0xED, 0xFF, 0xF5, 0x47, 0x6F, 0x0B, 0xA1, 0xBA, 0xFF, in rg28xx_gip_sequence()
503 ST7701_WRITE(st7701, 0xEF, 0x08, 0x08, 0x08, 0x45, 0x3F, 0x54); in rg28xx_gip_sequence()
505 st7701_switch_cmd_bkx(st7701, false, 0); in rg28xx_gip_sequence()
507 st7701_switch_cmd_bkx(st7701, true, 3); in rg28xx_gip_sequence()
508 ST7701_WRITE(st7701, 0xE6, 0x16); in rg28xx_gip_sequence()
509 ST7701_WRITE(st7701, 0xE8, 0x00, 0x0E); in rg28xx_gip_sequence()
511 st7701_switch_cmd_bkx(st7701, false, 0); in rg28xx_gip_sequence()
512 ST7701_WRITE(st7701, MIPI_DCS_SET_ADDRESS_MODE, 0x10); in rg28xx_gip_sequence()
513 ST7701_WRITE(st7701, MIPI_DCS_EXIT_SLEEP_MODE); in rg28xx_gip_sequence()
516 st7701_switch_cmd_bkx(st7701, true, 3); in rg28xx_gip_sequence()
517 ST7701_WRITE(st7701, 0xE8, 0x00, 0x0C); in rg28xx_gip_sequence()
519 ST7701_WRITE(st7701, 0xE8, 0x00, 0x00); in rg28xx_gip_sequence()
520 st7701_switch_cmd_bkx(st7701, false, 0); in rg28xx_gip_sequence()
525 struct st7701 *st7701 = panel_to_st7701(panel); in st7701_prepare() local
528 gpiod_set_value(st7701->reset, 0); in st7701_prepare()
530 ret = regulator_bulk_enable(ARRAY_SIZE(st7701->supplies), in st7701_prepare()
531 st7701->supplies); in st7701_prepare()
536 gpiod_set_value(st7701->reset, 1); in st7701_prepare()
539 st7701_init_sequence(st7701); in st7701_prepare()
541 if (st7701->desc->gip_sequence) in st7701_prepare()
542 st7701->desc->gip_sequence(st7701); in st7701_prepare()
545 st7701_switch_cmd_bkx(st7701, false, 0); in st7701_prepare()
552 struct st7701 *st7701 = panel_to_st7701(panel); in st7701_enable() local
554 ST7701_WRITE(st7701, MIPI_DCS_SET_DISPLAY_ON, 0x00); in st7701_enable()
561 struct st7701 *st7701 = panel_to_st7701(panel); in st7701_disable() local
563 ST7701_WRITE(st7701, MIPI_DCS_SET_DISPLAY_OFF, 0x00); in st7701_disable()
570 struct st7701 *st7701 = panel_to_st7701(panel); in st7701_unprepare() local
572 ST7701_WRITE(st7701, MIPI_DCS_ENTER_SLEEP_MODE, 0x00); in st7701_unprepare()
574 msleep(st7701->sleep_delay); in st7701_unprepare()
576 gpiod_set_value(st7701->reset, 0); in st7701_unprepare()
587 msleep(st7701->sleep_delay); in st7701_unprepare()
589 regulator_bulk_disable(ARRAY_SIZE(st7701->supplies), st7701->supplies); in st7701_unprepare()
597 struct st7701 *st7701 = panel_to_st7701(panel); in st7701_get_modes() local
598 const struct drm_display_mode *desc_mode = st7701->desc->mode; in st7701_get_modes()
619 drm_connector_set_panel_orientation(connector, st7701->orientation); in st7701_get_modes()
626 struct st7701 *st7701 = panel_to_st7701(panel); in st7701_get_orientation() local
628 return st7701->orientation; in st7701_get_orientation()
1140 struct st7701 *st7701 = (struct st7701 *)data; in st7701_cleanup() local
1142 drm_panel_remove(&st7701->panel); in st7701_cleanup()
1143 drm_panel_disable(&st7701->panel); in st7701_cleanup()
1144 drm_panel_unprepare(&st7701->panel); in st7701_cleanup()
1150 struct st7701 *st7701; in st7701_probe() local
1153 st7701 = devm_kzalloc(dev, sizeof(*st7701), GFP_KERNEL); in st7701_probe()
1154 if (!st7701) in st7701_probe()
1161 st7701->supplies[0].supply = "VCC"; in st7701_probe()
1162 st7701->supplies[1].supply = "IOVCC"; in st7701_probe()
1164 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(st7701->supplies), in st7701_probe()
1165 st7701->supplies); in st7701_probe()
1169 st7701->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); in st7701_probe()
1170 if (IS_ERR(st7701->reset)) { in st7701_probe()
1172 return PTR_ERR(st7701->reset); in st7701_probe()
1175 ret = of_drm_get_panel_orientation(dev->of_node, &st7701->orientation); in st7701_probe()
1179 drm_panel_init(&st7701->panel, dev, &st7701_funcs, connector_type); in st7701_probe()
1182 * Once sleep out has been issued, ST7701 IC required to wait 120ms in st7701_probe()
1190 st7701->sleep_delay = 120 + desc->panel_sleep_delay; in st7701_probe()
1192 ret = drm_panel_of_backlight(&st7701->panel); in st7701_probe()
1196 drm_panel_add(&st7701->panel); in st7701_probe()
1198 dev_set_drvdata(dev, st7701); in st7701_probe()
1199 st7701->desc = desc; in st7701_probe()
1201 return devm_add_action_or_reset(dev, st7701_cleanup, st7701); in st7701_probe()
1206 struct st7701 *st7701; in st7701_dsi_probe() local
1213 st7701 = dev_get_drvdata(&dsi->dev); in st7701_dsi_probe()
1214 st7701->dsi = dsi; in st7701_dsi_probe()
1215 st7701->write_command = st7701_dsi_write; in st7701_dsi_probe()
1217 if (!st7701->desc->lanes) in st7701_dsi_probe()
1222 dsi->format = st7701->desc->format; in st7701_dsi_probe()
1223 dsi->lanes = st7701->desc->lanes; in st7701_dsi_probe()
1234 struct st7701 *st7701; in st7701_spi_probe() local
1242 st7701 = dev_get_drvdata(&spi->dev); in st7701_spi_probe()
1243 st7701->write_command = st7701_dbi_write; in st7701_spi_probe()
1249 err = mipi_dbi_spi_init(spi, &st7701->dbi, dc); in st7701_spi_probe()
1252 st7701->dbi.read_commands = NULL; in st7701_spi_probe()
1287 .name = "st7701",
1296 .name = "st7701",
1336 MODULE_DESCRIPTION("Sitronix ST7701 LCD Panel Driver");