1 // SPDX-License-Identifier: GPL-2.0+
12 #include <linux/delay.h>
25 	struct gpio_desc	*reset;  member
50 	struct mipi_dsi_device *dsi = ctx->dsi;  in feiyang_prepare()
54 	ret = regulator_enable(ctx->dvdd);  in feiyang_prepare()
58 	/* T1 (dvdd start + dvdd rise) 0 < T1 <= 10ms */  in feiyang_prepare()
61 	ret = regulator_enable(ctx->avdd);  in feiyang_prepare()
65 	/* T3 (dvdd rise + avdd start + avdd rise) T3 >= 20ms */  in feiyang_prepare()
68 	gpiod_set_value(ctx->reset, 0);  in feiyang_prepare()
72 	 * T5 >= 10ms, 0 < T6 <= 10ms  in feiyang_prepare()
76 	gpiod_set_value(ctx->reset, 1);  in feiyang_prepare()
78 	/* T12 (video & logic signal rise + backlight rise) T12 >= 200ms */  in feiyang_prepare()
85 		ret = mipi_dsi_dcs_write_buffer(dsi, cmd->data,  in feiyang_prepare()
98 	/* T12 (video & logic signal rise + backlight rise) T12 >= 200ms */  in feiyang_enable()
101 	mipi_dsi_dcs_set_display_on(ctx->dsi);  in feiyang_enable()
110 	return mipi_dsi_dcs_set_display_off(ctx->dsi);  in feiyang_disable()
118 	ret = mipi_dsi_dcs_set_display_off(ctx->dsi);  in feiyang_unprepare()
120 		dev_err(panel->dev, "failed to set display off: %d\n", ret);  in feiyang_unprepare()
122 	ret = mipi_dsi_dcs_enter_sleep_mode(ctx->dsi);  in feiyang_unprepare()
124 		dev_err(panel->dev, "failed to enter sleep mode: %d\n", ret);  in feiyang_unprepare()
126 	/* T13 (backlight fall + video & logic signal fall) T13 >= 200ms */  in feiyang_unprepare()
129 	gpiod_set_value(ctx->reset, 0);  in feiyang_unprepare()
131 	regulator_disable(ctx->avdd);  in feiyang_unprepare()
133 	/* T11 (dvdd rise to fall) 0 < T11 <= 10ms  */  in feiyang_unprepare()
136 	regulator_disable(ctx->dvdd);  in feiyang_unprepare()
163 	mode = drm_mode_duplicate(connector->dev, &feiyang_default_mode);  in feiyang_get_modes()
165 		dev_err(&ctx->dsi->dev, "failed to add mode %ux%u@%u\n",  in feiyang_get_modes()
169 		return -ENOMEM;  in feiyang_get_modes()
192 	ctx = devm_kzalloc(&dsi->dev, sizeof(*ctx), GFP_KERNEL);  in feiyang_dsi_probe()
194 		return -ENOMEM;  in feiyang_dsi_probe()
197 	ctx->dsi = dsi;  in feiyang_dsi_probe()
199 	drm_panel_init(&ctx->panel, &dsi->dev, &feiyang_funcs,  in feiyang_dsi_probe()
202 	ctx->dvdd = devm_regulator_get(&dsi->dev, "dvdd");  in feiyang_dsi_probe()
203 	if (IS_ERR(ctx->dvdd))  in feiyang_dsi_probe()
204 		return dev_err_probe(&dsi->dev, PTR_ERR(ctx->dvdd),  in feiyang_dsi_probe()
207 	ctx->avdd = devm_regulator_get(&dsi->dev, "avdd");  in feiyang_dsi_probe()
208 	if (IS_ERR(ctx->avdd))  in feiyang_dsi_probe()
209 		return dev_err_probe(&dsi->dev, PTR_ERR(ctx->avdd),  in feiyang_dsi_probe()
212 	ctx->reset = devm_gpiod_get_optional(&dsi->dev, "reset", GPIOD_OUT_LOW);  in feiyang_dsi_probe()
213 	if (IS_ERR(ctx->reset))  in feiyang_dsi_probe()
214 		return dev_err_probe(&dsi->dev, PTR_ERR(ctx->reset),  in feiyang_dsi_probe()
215 				     "Couldn't get our reset GPIO\n");  in feiyang_dsi_probe()
217 	ret = drm_panel_of_backlight(&ctx->panel);  in feiyang_dsi_probe()
221 	drm_panel_add(&ctx->panel);  in feiyang_dsi_probe()
223 	dsi->mode_flags = MIPI_DSI_MODE_VIDEO_BURST;  in feiyang_dsi_probe()
224 	dsi->format = MIPI_DSI_FMT_RGB888;  in feiyang_dsi_probe()
225 	dsi->lanes = 4;  in feiyang_dsi_probe()
229 		drm_panel_remove(&ctx->panel);  in feiyang_dsi_probe()
241 	drm_panel_remove(&ctx->panel);  in feiyang_dsi_remove()
254 		.name = "feiyang-fy07024di26a30d",
261 MODULE_DESCRIPTION("Feiyang FY07024DI26A30-D MIPI-DSI LCD panel");