63 	struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };  in boe_th101mb31ig002_enable()  local
65 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0xab, 0xba);  in boe_th101mb31ig002_enable()
66 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe1, 0xba, 0xab);  in boe_th101mb31ig002_enable()
67 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1, 0x10, 0x01, 0x47, 0xff);  in boe_th101mb31ig002_enable()
68 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x0c, 0x14, 0x04, 0x50, 0x50, 0x14);  in boe_th101mb31ig002_enable()
69 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x56, 0x53, 0x00);  in boe_th101mb31ig002_enable()
70 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4, 0x33, 0x30, 0x04);  in boe_th101mb31ig002_enable()
71 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0xb0, 0x00, 0x00, 0x10, 0x00, 0x10,  in boe_th101mb31ig002_enable()
73 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb8, 0x05, 0x12, 0x29, 0x49, 0x48, 0x00,  in boe_th101mb31ig002_enable()
75 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x7c, 0x65, 0x55, 0x49, 0x46, 0x36,  in boe_th101mb31ig002_enable()
81 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0xff, 0x87, 0x12, 0x34, 0x44, 0x44,  in boe_th101mb31ig002_enable()
84 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc1, 0x54, 0x94, 0x02, 0x85, 0x9f, 0x00,  in boe_th101mb31ig002_enable()
86 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc2, 0x17, 0x09, 0x08, 0x89, 0x08, 0x11,  in boe_th101mb31ig002_enable()
88 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc3, 0x86, 0x46, 0x05, 0x05, 0x1c, 0x1c,  in boe_th101mb31ig002_enable()
92 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc4, 0x07, 0x07, 0x04, 0x04, 0x1c, 0x1c,  in boe_th101mb31ig002_enable()
96 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc6, 0x2a, 0x2a);  in boe_th101mb31ig002_enable()
97 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc8, 0x21, 0x00, 0x31, 0x42, 0x34, 0x16);  in boe_th101mb31ig002_enable()
98 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xca, 0xcb, 0x43);  in boe_th101mb31ig002_enable()
99 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xcd, 0x0e, 0x4b, 0x4b, 0x20, 0x19, 0x6b,  in boe_th101mb31ig002_enable()
101 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd2, 0xe3, 0x2b, 0x38, 0x00);  in boe_th101mb31ig002_enable()
102 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd4, 0x00, 0x01, 0x00, 0x0e, 0x04, 0x44,  in boe_th101mb31ig002_enable()
104 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe6, 0x80, 0x01, 0xff, 0xff, 0xff, 0xff,  in boe_th101mb31ig002_enable()
106 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x12, 0x03, 0x20, 0x00, 0xff);  in boe_th101mb31ig002_enable()
107 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf3, 0x00);  in boe_th101mb31ig002_enable()
109 	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);  in boe_th101mb31ig002_enable()
111 	mipi_dsi_msleep(&dsi_ctx, 120);  in boe_th101mb31ig002_enable()
113 	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);  in boe_th101mb31ig002_enable()
115 	return dsi_ctx.accum_err;  in boe_th101mb31ig002_enable()
120 	struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };  in starry_er88577_init_cmd()  local
124 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0xab, 0xba);  in starry_er88577_init_cmd()
125 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe1, 0xba, 0xab);  in starry_er88577_init_cmd()
126 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1, 0x10, 0x01, 0x47, 0xff);  in starry_er88577_init_cmd()
127 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x0c, 0x14, 0x04, 0x50, 0x50, 0x14);  in starry_er88577_init_cmd()
128 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x56, 0x53, 0x00);  in starry_er88577_init_cmd()
129 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4, 0x33, 0x30, 0x04);  in starry_er88577_init_cmd()
130 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0xb0, 0x00, 0x00, 0x10, 0x00, 0x10,  in starry_er88577_init_cmd()
132 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb8, 0x05, 0x12, 0x29, 0x49, 0x40);  in starry_er88577_init_cmd()
133 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x7c, 0x61, 0x4f, 0x42, 0x3e, 0x2d,  in starry_er88577_init_cmd()
139 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc0, 0xcc, 0x76, 0x12, 0x34, 0x44, 0x44,  in starry_er88577_init_cmd()
142 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc1, 0x54, 0x94, 0x02, 0x85, 0x9f, 0x00,  in starry_er88577_init_cmd()
144 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc2, 0x17, 0x09, 0x08, 0x89, 0x08, 0x11,  in starry_er88577_init_cmd()
146 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc3, 0x87, 0x47, 0x05, 0x05, 0x1c, 0x1c,  in starry_er88577_init_cmd()
150 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc4, 0x06, 0x06, 0x04, 0x04, 0x1c, 0x1c,  in starry_er88577_init_cmd()
154 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc8, 0x21, 0x00, 0x31, 0x42, 0x34, 0x16);  in starry_er88577_init_cmd()
155 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xca, 0xcb, 0x43);  in starry_er88577_init_cmd()
156 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xcd, 0x0e, 0x4b, 0x4b, 0x20, 0x19, 0x6b,  in starry_er88577_init_cmd()
158 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd1, 0x40, 0x0d, 0xff, 0x0f);  in starry_er88577_init_cmd()
159 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd2, 0xe3, 0x2b, 0x38, 0x08);  in starry_er88577_init_cmd()
160 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd3, 0x00, 0x00, 0x00, 0x00,  in starry_er88577_init_cmd()
162 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd4, 0x00, 0x01, 0x00, 0x0e, 0x04, 0x44,  in starry_er88577_init_cmd()
164 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe6, 0x80, 0x09, 0xff, 0xff, 0xff, 0xff,  in starry_er88577_init_cmd()
166 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x12, 0x03, 0x20, 0x00, 0xff);  in starry_er88577_init_cmd()
167 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf3, 0x00);  in starry_er88577_init_cmd()
169 	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);  in starry_er88577_init_cmd()
171 	mipi_dsi_msleep(&dsi_ctx, 120);  in starry_er88577_init_cmd()
173 	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);  in starry_er88577_init_cmd()
175 	mipi_dsi_msleep(&dsi_ctx, 20);  in starry_er88577_init_cmd()
177 	return dsi_ctx.accum_err;  in starry_er88577_init_cmd()
185 	struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };  in boe_th101mb31ig002_disable()  local
188 		mipi_dsi_msleep(&dsi_ctx, ctx->desc->backlight_off_to_display_off_delay_ms);  in boe_th101mb31ig002_disable()
190 	mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);  in boe_th101mb31ig002_disable()
192 	mipi_dsi_msleep(&dsi_ctx, 120);  in boe_th101mb31ig002_disable()
194 	mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);  in boe_th101mb31ig002_disable()
197 		mipi_dsi_msleep(&dsi_ctx, ctx->desc->enter_sleep_to_reset_down_delay_ms);  in boe_th101mb31ig002_disable()
199 	return dsi_ctx.accum_err;  in boe_th101mb31ig002_disable()