Lines Matching defs:val
23 #define REG00_VBRT_CTRL(val) (val) argument
25 #define REG01_COM_DC(val) (val) argument
27 #define REG02_DA_CONTRAST(val) (val) argument
28 #define REG02_VESA_SEL(val) ((val) << 5) argument
31 #define REG03_VPOSITION(val) (val) argument
36 #define REG04_HPOSITION1(val) (val) argument
41 #define REG05_SLBRCHARGE(val) ((val) << 3) argument
42 #define REG05_PRECHARGE_LEVEL(val) ((val) << 6) argument
49 #define REG06_GAMMA_SEL(val) ((val) << 5) argument
58 #define REG07_AMPTST(val) ((val) << 6) argument
60 #define REG08_SLHRC(val) (val) argument
61 #define REG08_CLOCK_DIV(val) ((val) << 2) argument
62 #define REG08_PANEL(val) ((val) << 5) argument
64 #define REG09_SUB_BRIGHT_R(val) (val) argument
68 #define REG0A_SUB_BRIGHT_B(val) (val) argument
72 #define REG0B_MBK_POSITION(val) (val) argument
75 #define REG0B_YUV2BIN(val) ((val) << 6) argument
77 #define REG0C_CONTRAST_R(val) (val) argument
80 #define REG0D_CONTRAST_G(val) (val) argument
83 #define REG0E_CONTRAST_B(val) (val) argument
87 #define REG0F_OVERSCAN(val) ((val) << 1) argument
88 #define REG0F_FRAMEWIDTH(val) ((val) << 3) argument
90 #define REG10_BRIGHT(val) (val) argument
92 #define REG11_SIG_GAIN(val) (val) argument
96 #define REG12_COLOR(val) (val) argument
97 #define REG12_PWCKSEL(val) ((val) << 6) argument
99 #define REG13_4096LEVEL_CNTL(val) (val) argument
100 #define REG13_SL4096(val) ((val) << 4) argument
103 #define REG14_PANEL_TEST(val) (val) argument