Lines Matching +full:pll +full:- +full:out

1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
6 #define DSS_SUBSYS_NAME "PLL"
28 int dss_pll_register(struct dss_device *dss, struct dss_pll *pll) in dss_pll_register() argument
32 for (i = 0; i < ARRAY_SIZE(dss->plls); ++i) { in dss_pll_register()
33 if (!dss->plls[i]) { in dss_pll_register()
34 dss->plls[i] = pll; in dss_pll_register()
35 pll->dss = dss; in dss_pll_register()
40 return -EBUSY; in dss_pll_register()
43 void dss_pll_unregister(struct dss_pll *pll) in dss_pll_unregister() argument
45 struct dss_device *dss = pll->dss; in dss_pll_unregister()
48 for (i = 0; i < ARRAY_SIZE(dss->plls); ++i) { in dss_pll_unregister()
49 if (dss->plls[i] == pll) { in dss_pll_unregister()
50 dss->plls[i] = NULL; in dss_pll_unregister()
51 pll->dss = NULL; in dss_pll_unregister()
61 for (i = 0; i < ARRAY_SIZE(dss->plls); ++i) { in dss_pll_find()
62 if (dss->plls[i] && strcmp(dss->plls[i]->name, name) == 0) in dss_pll_find()
63 return dss->plls[i]; in dss_pll_find()
72 struct dss_pll *pll; in dss_pll_find_by_src() local
85 pll = dss_pll_find(dss, "dsi0"); in dss_pll_find_by_src()
86 if (!pll) in dss_pll_find_by_src()
87 pll = dss_pll_find(dss, "video0"); in dss_pll_find_by_src()
88 return pll; in dss_pll_find_by_src()
93 pll = dss_pll_find(dss, "dsi1"); in dss_pll_find_by_src()
94 if (!pll) in dss_pll_find_by_src()
95 pll = dss_pll_find(dss, "video1"); in dss_pll_find_by_src()
96 return pll; in dss_pll_find_by_src()
123 int dss_pll_enable(struct dss_pll *pll) in dss_pll_enable() argument
127 r = clk_prepare_enable(pll->clkin); in dss_pll_enable()
131 if (pll->regulator) { in dss_pll_enable()
132 r = regulator_enable(pll->regulator); in dss_pll_enable()
137 r = pll->ops->enable(pll); in dss_pll_enable()
144 if (pll->regulator) in dss_pll_enable()
145 regulator_disable(pll->regulator); in dss_pll_enable()
147 clk_disable_unprepare(pll->clkin); in dss_pll_enable()
151 void dss_pll_disable(struct dss_pll *pll) in dss_pll_disable() argument
153 pll->ops->disable(pll); in dss_pll_disable()
155 if (pll->regulator) in dss_pll_disable()
156 regulator_disable(pll->regulator); in dss_pll_disable()
158 clk_disable_unprepare(pll->clkin); in dss_pll_disable()
160 memset(&pll->cinfo, 0, sizeof(pll->cinfo)); in dss_pll_disable()
163 int dss_pll_set_config(struct dss_pll *pll, const struct dss_pll_clock_info *cinfo) in dss_pll_set_config() argument
167 r = pll->ops->set_config(pll, cinfo); in dss_pll_set_config()
171 pll->cinfo = *cinfo; in dss_pll_set_config()
176 bool dss_pll_hsdiv_calc_a(const struct dss_pll *pll, unsigned long clkdco, in dss_pll_hsdiv_calc_a() argument
180 const struct dss_pll_hw *hw = pll->hw; in dss_pll_hsdiv_calc_a()
182 unsigned long out; in dss_pll_hsdiv_calc_a() local
189 m_stop = min((unsigned)(clkdco / out_min), hw->mX_max); in dss_pll_hsdiv_calc_a()
192 out = clkdco / m; in dss_pll_hsdiv_calc_a()
194 if (func(m, out, data)) in dss_pll_hsdiv_calc_a()
205 bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin, in dss_pll_calc_a() argument
209 const struct dss_pll_hw *hw = pll->hw; in dss_pll_calc_a()
216 pll_hw_max = hw->clkdco_max; in dss_pll_calc_a()
218 fint_hw_min = hw->fint_min; in dss_pll_calc_a()
219 fint_hw_max = hw->fint_max; in dss_pll_calc_a()
222 n_stop = min((unsigned)(clkin / fint_hw_min), hw->n_max); in dss_pll_calc_a()
228 if (hw->errata_i886) { in dss_pll_calc_a()
230 n_inc = -1; in dss_pll_calc_a()
242 hw->m_max); in dss_pll_calc_a()
248 if (hw->errata_i886) { in dss_pll_calc_a()
250 m_inc = -1; in dss_pll_calc_a()
265 * This calculates a PLL config that will provide the target_clkout rate
272 bool dss_pll_calc_b(const struct dss_pll *pll, unsigned long clkin, in dss_pll_calc_b() argument
279 const struct dss_pll_hw *hw = pll->hw; in dss_pll_calc_b()
284 n = DIV_ROUND_UP(clkin, hw->fint_max); in dss_pll_calc_b()
288 min_dco = roundup(hw->clkdco_min, fint); in dss_pll_calc_b()
299 if (WARN_ON(target_clkdco - clkdco > fint)) in dss_pll_calc_b()
302 mf = (u32)div_u64(262144ull * (target_clkdco - clkdco), fint); in dss_pll_calc_b()
309 /* sigma-delta */ in dss_pll_calc_b()
316 cinfo->n = n; in dss_pll_calc_b()
317 cinfo->m = m; in dss_pll_calc_b()
318 cinfo->mf = mf; in dss_pll_calc_b()
319 cinfo->mX[0] = m2; in dss_pll_calc_b()
320 cinfo->sd = sd; in dss_pll_calc_b()
322 cinfo->fint = fint; in dss_pll_calc_b()
323 cinfo->clkdco = clkdco; in dss_pll_calc_b()
324 cinfo->clkout[0] = clkout; in dss_pll_calc_b()
337 while (t-- > 0) { in wait_for_bit_change()
356 int dss_pll_wait_reset_done(struct dss_pll *pll) in dss_pll_wait_reset_done() argument
358 void __iomem *base = pll->base; in dss_pll_wait_reset_done()
361 return -ETIMEDOUT; in dss_pll_wait_reset_done()
366 static int dss_wait_hsdiv_ack(struct dss_pll *pll, u32 hsdiv_ack_mask) in dss_wait_hsdiv_ack() argument
370 while (t-- > 0) { in dss_wait_hsdiv_ack()
371 u32 v = readl_relaxed(pll->base + PLL_STATUS); in dss_wait_hsdiv_ack()
377 return -ETIMEDOUT; in dss_wait_hsdiv_ack()
396 int dss_pll_write_config_type_a(struct dss_pll *pll, in dss_pll_write_config_type_a() argument
399 const struct dss_pll_hw *hw = pll->hw; in dss_pll_write_config_type_a()
400 void __iomem *base = pll->base; in dss_pll_write_config_type_a()
405 if (hw->has_stopmode) in dss_pll_write_config_type_a()
407 l = FLD_MOD(l, cinfo->n - 1, hw->n_msb, hw->n_lsb); /* PLL_REGN */ in dss_pll_write_config_type_a()
408 l = FLD_MOD(l, cinfo->m, hw->m_msb, hw->m_lsb); /* PLL_REGM */ in dss_pll_write_config_type_a()
410 l = FLD_MOD(l, cinfo->mX[0] ? cinfo->mX[0] - 1 : 0, in dss_pll_write_config_type_a()
411 hw->mX_msb[0], hw->mX_lsb[0]); in dss_pll_write_config_type_a()
413 l = FLD_MOD(l, cinfo->mX[1] ? cinfo->mX[1] - 1 : 0, in dss_pll_write_config_type_a()
414 hw->mX_msb[1], hw->mX_lsb[1]); in dss_pll_write_config_type_a()
419 l = FLD_MOD(l, cinfo->mX[2] ? cinfo->mX[2] - 1 : 0, in dss_pll_write_config_type_a()
420 hw->mX_msb[2], hw->mX_lsb[2]); in dss_pll_write_config_type_a()
422 l = FLD_MOD(l, cinfo->mX[3] ? cinfo->mX[3] - 1 : 0, in dss_pll_write_config_type_a()
423 hw->mX_msb[3], hw->mX_lsb[3]); in dss_pll_write_config_type_a()
427 if (hw->has_freqsel) { in dss_pll_write_config_type_a()
428 u32 f = cinfo->fint < 1000000 ? 0x3 : in dss_pll_write_config_type_a()
429 cinfo->fint < 1250000 ? 0x4 : in dss_pll_write_config_type_a()
430 cinfo->fint < 1500000 ? 0x5 : in dss_pll_write_config_type_a()
431 cinfo->fint < 1750000 ? 0x6 : in dss_pll_write_config_type_a()
435 } else if (hw->has_selfreqdco) { in dss_pll_write_config_type_a()
436 u32 f = cinfo->clkdco < hw->clkdco_low ? 0x2 : 0x4; in dss_pll_write_config_type_a()
445 if (hw->has_refsel) in dss_pll_write_config_type_a()
451 if (hw->errata_i932) { in dss_pll_write_config_type_a()
457 * Calculate wait time for PLL LOCK in dss_pll_write_config_type_a()
460 sleep_time = DIV_ROUND_UP(1000*1000*1000, cinfo->fint); in dss_pll_write_config_type_a()
481 DSSERR("cannot lock PLL\n"); in dss_pll_write_config_type_a()
482 r = -EIO; in dss_pll_write_config_type_a()
490 r = -EIO; in dss_pll_write_config_type_a()
496 r = -EIO; in dss_pll_write_config_type_a()
503 l = FLD_MOD(l, cinfo->mX[0] ? 1 : 0, 16, 16); /* M4_CLOCK_EN */ in dss_pll_write_config_type_a()
504 l = FLD_MOD(l, cinfo->mX[1] ? 1 : 0, 18, 18); /* M5_CLOCK_EN */ in dss_pll_write_config_type_a()
506 l = FLD_MOD(l, cinfo->mX[2] ? 1 : 0, 23, 23); /* M6_CLOCK_EN */ in dss_pll_write_config_type_a()
507 l = FLD_MOD(l, cinfo->mX[3] ? 1 : 0, 25, 25); /* M7_CLOCK_EN */ in dss_pll_write_config_type_a()
510 r = dss_wait_hsdiv_ack(pll, in dss_pll_write_config_type_a()
511 (cinfo->mX[0] ? BIT(7) : 0) | in dss_pll_write_config_type_a()
512 (cinfo->mX[1] ? BIT(8) : 0) | in dss_pll_write_config_type_a()
513 (cinfo->mX[2] ? BIT(10) : 0) | in dss_pll_write_config_type_a()
514 (cinfo->mX[3] ? BIT(11) : 0)); in dss_pll_write_config_type_a()
524 int dss_pll_write_config_type_b(struct dss_pll *pll, in dss_pll_write_config_type_b() argument
527 const struct dss_pll_hw *hw = pll->hw; in dss_pll_write_config_type_b()
528 void __iomem *base = pll->base; in dss_pll_write_config_type_b()
532 l = FLD_MOD(l, cinfo->m, 20, 9); /* PLL_REGM */ in dss_pll_write_config_type_b()
533 l = FLD_MOD(l, cinfo->n - 1, 8, 1); /* PLL_REGN */ in dss_pll_write_config_type_b()
540 if (hw->has_refsel) in dss_pll_write_config_type_b()
544 if (cinfo->clkdco > hw->clkdco_low) in dss_pll_write_config_type_b()
551 l = FLD_MOD(l, cinfo->sd, 17, 10); /* PLL_REGSD */ in dss_pll_write_config_type_b()
555 l = FLD_MOD(l, cinfo->mX[0], 24, 18); /* PLL_REGM2 */ in dss_pll_write_config_type_b()
556 l = FLD_MOD(l, cinfo->mf, 17, 0); /* PLL_REGM_F */ in dss_pll_write_config_type_b()
563 return -EIO; in dss_pll_write_config_type_b()
568 return -ETIMEDOUT; in dss_pll_write_config_type_b()