1 // SPDX-License-Identifier: GPL-2.0-only
5  * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
25 #define DUMPPLL(r) seq_printf(s, "%-35s %08x\n", #r,\  in hdmi_pll_dump()
26 		hdmi_read_reg(pll->base, r))  in hdmi_pll_dump()
42 	struct hdmi_wp_data *wp = pll->wp;  in hdmi_pll_enable()  local
45 	r = pm_runtime_get_sync(&pll->pdev->dev);  in hdmi_pll_enable()
50 	r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS);  in hdmi_pll_enable()
60 	struct hdmi_wp_data *wp = pll->wp;  in hdmi_pll_disable()  local
63 	hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF);  in hdmi_pll_disable()
67 	r = pm_runtime_put_sync(&pll->pdev->dev);  in hdmi_pll_disable()
68 	WARN_ON(r < 0 && r != -ENOSYS);  in hdmi_pll_disable()
73 	.disable = hdmi_pll_disable,
132 	struct dss_pll *pll = &hpll->pll;  in hdmi_init_pll_data()
136 	clk = devm_clk_get(&pdev->dev, "sys_clk");  in hdmi_init_pll_data()
142 	pll->name = "hdmi";  in hdmi_init_pll_data()
143 	pll->id = DSS_PLL_HDMI;  in hdmi_init_pll_data()
144 	pll->base = hpll->base;  in hdmi_init_pll_data()
145 	pll->clkin = clk;  in hdmi_init_pll_data()
147 	if (hpll->wp->version == 4)  in hdmi_init_pll_data()
148 		pll->hw = &dss_omap4_hdmi_pll_hw;  in hdmi_init_pll_data()
150 		pll->hw = &dss_omap5_hdmi_pll_hw;  in hdmi_init_pll_data()
152 	pll->ops = &hdmi_pll_ops;  in hdmi_init_pll_data()
162 		  struct hdmi_pll_data *pll, struct hdmi_wp_data *wp)  in hdmi_pll_init()  argument
166 	pll->pdev = pdev;  in hdmi_pll_init()
167 	pll->wp = wp;  in hdmi_pll_init()
169 	pll->base = devm_platform_ioremap_resource_byname(pdev, "pll");  in hdmi_pll_init()
170 	if (IS_ERR(pll->base))  in hdmi_pll_init()
171 		return PTR_ERR(pll->base);  in hdmi_pll_init()
184 	struct dss_pll *pll = &hpll->pll;  in hdmi_pll_uninit()