Lines Matching +full:pll +full:- +full:out
1 // SPDX-License-Identifier: GPL-2.0-only
37 struct dss_pll *pll; member
49 /* -----------------------------------------------------------------------------
50 * Clock Handling and PLL
66 if (dss_pll_find_by_src(dpi->dss, DSS_CLK_SRC_PLL1_1)) in dpi_get_clk_src_dra7xx()
72 if (dss_pll_find_by_src(dpi->dss, DSS_CLK_SRC_PLL1_3)) in dpi_get_clk_src_dra7xx()
74 if (dss_pll_find_by_src(dpi->dss, DSS_CLK_SRC_PLL2_3)) in dpi_get_clk_src_dra7xx()
80 if (dss_pll_find_by_src(dpi->dss, DSS_CLK_SRC_PLL2_1)) in dpi_get_clk_src_dra7xx()
82 if (dss_pll_find_by_src(dpi->dss, DSS_CLK_SRC_PLL1_3)) in dpi_get_clk_src_dra7xx()
95 enum omap_channel channel = dpi->output.dispc_channel; in dpi_get_clk_src()
98 * XXX we can't currently use DSI PLL for DPI with OMAP3, as the DSI PLL in dpi_get_clk_src()
100 * disabled, DISPC clock will be disabled, and TV out will stop. in dpi_get_clk_src()
102 switch (dpi->dss_model) { in dpi_get_clk_src()
161 if (ctx->pck_min >= 100000000) { in dpi_calc_dispc_cb()
169 ctx->dispc_cinfo.lck_div = lckd; in dpi_calc_dispc_cb()
170 ctx->dispc_cinfo.pck_div = pckd; in dpi_calc_dispc_cb()
171 ctx->dispc_cinfo.lck = lck; in dpi_calc_dispc_cb()
172 ctx->dispc_cinfo.pck = pck; in dpi_calc_dispc_cb()
183 ctx->pll_cinfo.mX[ctx->clkout_idx] = m_dispc; in dpi_calc_hsdiv_cb()
184 ctx->pll_cinfo.clkout[ctx->clkout_idx] = dispc; in dpi_calc_hsdiv_cb()
186 return dispc_div_calc(ctx->dpi->dss->dispc, dispc, in dpi_calc_hsdiv_cb()
187 ctx->pck_min, ctx->pck_max, in dpi_calc_hsdiv_cb()
198 ctx->pll_cinfo.n = n; in dpi_calc_pll_cb()
199 ctx->pll_cinfo.m = m; in dpi_calc_pll_cb()
200 ctx->pll_cinfo.fint = fint; in dpi_calc_pll_cb()
201 ctx->pll_cinfo.clkdco = clkdco; in dpi_calc_pll_cb()
203 return dss_pll_hsdiv_calc_a(ctx->dpi->pll, clkdco, in dpi_calc_pll_cb()
204 ctx->pck_min, dss_get_max_fck_rate(ctx->dpi->dss), in dpi_calc_pll_cb()
212 ctx->fck = fck; in dpi_calc_dss_cb()
214 return dispc_div_calc(ctx->dpi->dss->dispc, fck, in dpi_calc_dss_cb()
215 ctx->pck_min, ctx->pck_max, in dpi_calc_dss_cb()
225 ctx->dpi = dpi; in dpi_pll_clk_calc()
226 ctx->clkout_idx = dss_pll_get_clkout_idx_for_src(dpi->clk_src); in dpi_pll_clk_calc()
228 clkin = clk_get_rate(dpi->pll->clkin); in dpi_pll_clk_calc()
230 if (dpi->pll->hw->type == DSS_PLL_TYPE_A) { in dpi_pll_clk_calc()
233 ctx->pck_min = pck - 1000; in dpi_pll_clk_calc()
234 ctx->pck_max = pck + 1000; in dpi_pll_clk_calc()
239 return dss_pll_calc_a(ctx->dpi->pll, clkin, in dpi_pll_clk_calc()
243 dss_pll_calc_b(dpi->pll, clkin, pck, &ctx->pll_cinfo); in dpi_pll_clk_calc()
245 ctx->dispc_cinfo.lck_div = 1; in dpi_pll_clk_calc()
246 ctx->dispc_cinfo.pck_div = 1; in dpi_pll_clk_calc()
247 ctx->dispc_cinfo.lck = ctx->pll_cinfo.clkout[0]; in dpi_pll_clk_calc()
248 ctx->dispc_cinfo.pck = ctx->dispc_cinfo.lck; in dpi_pll_clk_calc()
263 * +/- ~15MHz. in dpi_dss_clk_calc()
270 ctx->dpi = dpi; in dpi_dss_clk_calc()
272 ctx->pck_min = max(pck - 1000 * i * i * i, 0lu); in dpi_dss_clk_calc()
274 ctx->pck_min = 0; in dpi_dss_clk_calc()
275 ctx->pck_max = pck + 1000 * i * i * i; in dpi_dss_clk_calc()
277 ok = dss_div_calc(dpi->dss, pck, ctx->pck_min, in dpi_dss_clk_calc()
296 return -EINVAL; in dpi_set_pll_clk()
298 r = dss_pll_set_config(dpi->pll, &ctx.pll_cinfo); in dpi_set_pll_clk()
302 dss_select_lcd_clk_source(dpi->dss, dpi->output.dispc_channel, in dpi_set_pll_clk()
303 dpi->clk_src); in dpi_set_pll_clk()
305 dpi->mgr_config.clock_info = ctx.dispc_cinfo; in dpi_set_pll_clk()
318 return -EINVAL; in dpi_set_dispc_clk()
320 r = dss_set_fck_rate(dpi->dss, ctx.fck); in dpi_set_dispc_clk()
324 dpi->mgr_config.clock_info = ctx.dispc_cinfo; in dpi_set_dispc_clk()
333 if (dpi->pll) in dpi_set_mode()
334 r = dpi_set_pll_clk(dpi, dpi->pixelclock); in dpi_set_mode()
336 r = dpi_set_dispc_clk(dpi, dpi->pixelclock); in dpi_set_mode()
343 dpi->mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS; in dpi_config_lcd_manager()
345 dpi->mgr_config.stallmode = false; in dpi_config_lcd_manager()
346 dpi->mgr_config.fifohandcheck = false; in dpi_config_lcd_manager()
348 dpi->mgr_config.video_port_width = dpi->data_lines; in dpi_config_lcd_manager()
350 dpi->mgr_config.lcden_sig_polarity = 0; in dpi_config_lcd_manager()
352 dss_mgr_set_lcd_config(&dpi->output, &dpi->mgr_config); in dpi_config_lcd_manager()
361 if (dpi->pll) { in dpi_clock_update()
363 return -EINVAL; in dpi_clock_update()
368 return -EINVAL; in dpi_clock_update()
381 static int dpi_verify_pll(struct dss_pll *pll) in dpi_verify_pll() argument
385 /* do initial setup with the PLL to see if it is operational */ in dpi_verify_pll()
387 r = dss_pll_enable(pll); in dpi_verify_pll()
391 dss_pll_disable(pll); in dpi_verify_pll()
398 struct dss_pll *pll; in dpi_init_pll() local
400 if (dpi->pll) in dpi_init_pll()
403 dpi->clk_src = dpi_get_clk_src(dpi); in dpi_init_pll()
405 pll = dss_pll_find_by_src(dpi->dss, dpi->clk_src); in dpi_init_pll()
406 if (!pll) in dpi_init_pll()
409 if (dpi_verify_pll(pll)) { in dpi_init_pll()
410 DSSWARN("PLL not operational\n"); in dpi_init_pll()
414 dpi->pll = pll; in dpi_init_pll()
417 /* -----------------------------------------------------------------------------
427 return -EINVAL; in dpi_bridge_attach()
431 return drm_bridge_attach(bridge->encoder, dpi->output.next_bridge, in dpi_bridge_attach()
441 unsigned long clock = mode->clock * 1000; in dpi_bridge_mode_valid()
444 if (mode->hdisplay % 8 != 0) in dpi_bridge_mode_valid()
447 if (mode->clock == 0) in dpi_bridge_mode_valid()
462 unsigned long clock = mode->clock * 1000; in dpi_bridge_mode_fixup()
469 adjusted_mode->clock = clock / 1000; in dpi_bridge_mode_fixup()
480 dpi->pixelclock = adjusted_mode->clock * 1000; in dpi_bridge_mode_set()
488 if (dpi->vdds_dsi_reg) { in dpi_bridge_enable()
489 r = regulator_enable(dpi->vdds_dsi_reg); in dpi_bridge_enable()
494 r = dispc_runtime_get(dpi->dss->dispc); in dpi_bridge_enable()
498 r = dss_dpi_select_source(dpi->dss, dpi->id, dpi->output.dispc_channel); in dpi_bridge_enable()
502 if (dpi->pll) { in dpi_bridge_enable()
503 r = dss_pll_enable(dpi->pll); in dpi_bridge_enable()
516 r = dss_mgr_enable(&dpi->output); in dpi_bridge_enable()
524 if (dpi->pll) in dpi_bridge_enable()
525 dss_pll_disable(dpi->pll); in dpi_bridge_enable()
528 dispc_runtime_put(dpi->dss->dispc); in dpi_bridge_enable()
530 if (dpi->vdds_dsi_reg) in dpi_bridge_enable()
531 regulator_disable(dpi->vdds_dsi_reg); in dpi_bridge_enable()
538 dss_mgr_disable(&dpi->output); in dpi_bridge_disable()
540 if (dpi->pll) { in dpi_bridge_disable()
541 dss_select_lcd_clk_source(dpi->dss, dpi->output.dispc_channel, in dpi_bridge_disable()
543 dss_pll_disable(dpi->pll); in dpi_bridge_disable()
546 dispc_runtime_put(dpi->dss->dispc); in dpi_bridge_disable()
548 if (dpi->vdds_dsi_reg) in dpi_bridge_disable()
549 regulator_disable(dpi->vdds_dsi_reg); in dpi_bridge_disable()
563 dpi->bridge.funcs = &dpi_bridge_funcs; in dpi_bridge_init()
564 dpi->bridge.of_node = dpi->pdev->dev.of_node; in dpi_bridge_init()
565 dpi->bridge.type = DRM_MODE_CONNECTOR_DPI; in dpi_bridge_init()
567 drm_bridge_add(&dpi->bridge); in dpi_bridge_init()
572 drm_bridge_remove(&dpi->bridge); in dpi_bridge_cleanup()
575 /* -----------------------------------------------------------------------------
587 switch (dpi->dss_model) { in dpi_get_channel()
593 switch (dpi->id) { in dpi_get_channel()
617 struct omap_dss_device *out = &dpi->output; in dpi_init_output_port() local
624 dpi->id = port_num <= 2 ? port_num : 0; in dpi_init_output_port()
628 out->name = "dpi.2"; in dpi_init_output_port()
631 out->name = "dpi.1"; in dpi_init_output_port()
635 out->name = "dpi.0"; in dpi_init_output_port()
639 out->dev = &dpi->pdev->dev; in dpi_init_output_port()
640 out->id = OMAP_DSS_OUTPUT_DPI; in dpi_init_output_port()
641 out->type = OMAP_DISPLAY_TYPE_DPI; in dpi_init_output_port()
642 out->dispc_channel = dpi_get_channel(dpi); in dpi_init_output_port()
643 out->of_port = port_num; in dpi_init_output_port()
645 r = omapdss_device_init_output(out, &dpi->bridge); in dpi_init_output_port()
651 omapdss_device_register(out); in dpi_init_output_port()
658 struct dpi_data *dpi = port->data; in dpi_uninit_output_port()
659 struct omap_dss_device *out = &dpi->output; in dpi_uninit_output_port() local
661 omapdss_device_unregister(out); in dpi_uninit_output_port()
662 omapdss_device_cleanup_output(out); in dpi_uninit_output_port()
667 /* -----------------------------------------------------------------------------
688 vdds_dsi = devm_regulator_get(&dpi->pdev->dev, "vdds_dsi"); in dpi_init_regulator()
690 if (PTR_ERR(vdds_dsi) != -EPROBE_DEFER) in dpi_init_regulator()
695 dpi->vdds_dsi_reg = vdds_dsi; in dpi_init_regulator()
708 dpi = devm_kzalloc(&pdev->dev, sizeof(*dpi), GFP_KERNEL); in dpi_init_port()
710 return -ENOMEM; in dpi_init_port()
716 r = of_property_read_u32(ep, "data-lines", &datalines); in dpi_init_port()
723 dpi->data_lines = datalines; in dpi_init_port()
725 dpi->pdev = pdev; in dpi_init_port()
726 dpi->dss_model = dss_model; in dpi_init_port()
727 dpi->dss = dss; in dpi_init_port()
728 port->data = dpi; in dpi_init_port()
739 struct dpi_data *dpi = port->data; in dpi_uninit_port()