3269 				      u16 pck_div)  in dispc_mgr_set_lcd_divisor()  argument
3272 	BUG_ON(pck_div < 1);  in dispc_mgr_set_lcd_divisor()
3275 			FLD_VAL(lck_div, 23, 16) | FLD_VAL(pck_div, 7, 0));  in dispc_mgr_set_lcd_divisor()
3284 				      int *pck_div)  in dispc_mgr_get_lcd_divisor()  argument
3289 	*pck_div = FLD_GET(l, 7, 0);  in dispc_mgr_get_lcd_divisor()
3665 	if (cinfo->pck_div < 1 || cinfo->pck_div > 255)  in dispc_calc_clock_rates()
3669 	cinfo->pck = cinfo->lck / cinfo->pck_div;  in dispc_calc_clock_rates()
3739 	DSSDBG("pck = %lu (%u)\n", cinfo->pck, cinfo->pck_div);  in dispc_mgr_set_clock_div()
3742 				  cinfo->pck_div);  in dispc_mgr_set_clock_div()
3754 	cinfo->pck_div = REG_GET(dispc, DISPC_DIVISORo(channel), 7, 0);  in dispc_mgr_get_clock_div()
3757 	cinfo->pck = cinfo->lck / cinfo->pck_div;  in dispc_mgr_get_clock_div()
4622 			.pck_div = 2,