39 	addr  = nvkm_rd32(device, 0x10a4a0);  in gt215_pmu_send()
41 		u32 tmp = nvkm_rd32(device, 0x10a4b0);  in gt215_pmu_send()
61 	} while (nvkm_rd32(device, 0x10a580) != 0x00000001);  in gt215_pmu_send()
94 	u32 addr =  nvkm_rd32(device, 0x10a4cc);  in gt215_pmu_recv()
95 	if (addr == nvkm_rd32(device, 0x10a4c8))  in gt215_pmu_recv()
101 	} while (nvkm_rd32(device, 0x10a580) != 0x00000002);  in gt215_pmu_recv()
106 	process = nvkm_rd32(device, 0x10a1c4);  in gt215_pmu_recv()
107 	message = nvkm_rd32(device, 0x10a1c4);  in gt215_pmu_recv()
108 	data0   = nvkm_rd32(device, 0x10a1c4);  in gt215_pmu_recv()
109 	data1   = nvkm_rd32(device, 0x10a1c4);  in gt215_pmu_recv()
143 	u32 disp = nvkm_rd32(device, 0x10a01c);  in gt215_pmu_intr()
144 	u32 intr = nvkm_rd32(device, 0x10a008) & disp & ~(disp >> 16);  in gt215_pmu_intr()
147 		u32 stat = nvkm_rd32(device, 0x10a16c);  in gt215_pmu_intr()
151 				   nvkm_rd32(device, 0x10a168));  in gt215_pmu_intr()
165 			  nvkm_rd32(device, 0x10a7a0),  in gt215_pmu_intr()
166 			  nvkm_rd32(device, 0x10a7a4));  in gt215_pmu_intr()
191 	nvkm_rd32(device, 0x022210);  in gt215_pmu_reset()
197 	return nvkm_rd32(pmu->subdev.device, 0x022210) & 0x00000001;  in gt215_pmu_enabled()
210 			if (!nvkm_rd32(device, 0x10a04c))  in gt215_pmu_init()
219 		if (!(nvkm_rd32(device, 0x10a10c) & 0x00000006))  in gt215_pmu_init()
243 		if (nvkm_rd32(device, 0x10a4d0))  in gt215_pmu_init()
247 	pmu->send.base = nvkm_rd32(device, 0x10a4d0) & 0x0000ffff;  in gt215_pmu_init()
248 	pmu->send.size = nvkm_rd32(device, 0x10a4d0) >> 16;  in gt215_pmu_init()
252 		if (nvkm_rd32(device, 0x10a4dc))  in gt215_pmu_init()
256 	pmu->recv.base = nvkm_rd32(device, 0x10a4dc) & 0x0000ffff;  in gt215_pmu_init()
257 	pmu->recv.size = nvkm_rd32(device, 0x10a4dc) >> 16;  in gt215_pmu_init()