Lines Matching refs:r6
87 imm32($r6, 0xfffffffc)
88 and $r7 $r6
89 mov $r6 0x2
90 or $r7 $r6
93 mov $r6 0x001620
95 nv_rd32($r8, $r6)
97 nv_wr32($r6, $r8)
100 nv_rd32($r8, $r6)
102 nv_wr32($r6, $r8)
104 mov $r6 0x0026f0
105 nv_rd32($r8, $r6)
107 nv_wr32($r6, $r8)
110 mov $r6 NV_PPWR_OUTPUT_SET_FB_PAUSE
111 nv_iowr(NV_PPWR_OUTPUT_SET, $r6)
113 nv_iord($r6, NV_PPWR_OUTPUT)
114 and $r6 NV_PPWR_OUTPUT_FB_PAUSE
117 nv_iord($r6, NV_PPWR_TIMER_LOW)
118 st b32 D[$r0 + #memx_ts_start] $r6
128 nv_iord($r6, NV_PPWR_TIMER_LOW)
129 st b32 D[$r0 + #memx_ts_end] $r6
131 mov $r6 NV_PPWR_OUTPUT_CLR_FB_PAUSE
132 nv_iowr(NV_PPWR_OUTPUT_CLR, $r6)
134 nv_iord($r6, NV_PPWR_OUTPUT)
135 and $r6 NV_PPWR_OUTPUT_FB_PAUSE
141 imm32($r6, 0xffffffcc)
142 and $r7 $r6
145 mov $r6 0x0026f0
147 nv_rd32($r8, $r6)
149 nv_wr32($r6, $r8)
151 mov $r6 0x001620
152 nv_rd32($r8, $r6)
154 nv_wr32($r6, $r8)
157 nv_rd32($r8, $r6)
159 nv_wr32($r6, $r8)
172 ld b32 $r6 D[$r1 + 0x00]
173 cmp b32 $r6 0x0
175 cmp b32 $r6 0x1
187 nv_iord($r6, NV_PPWR_INPUT)
188 and $r6 $r7
192 nv_iord($r6, NV_PPWR_INPUT)
193 and $r6 $r7
224 ld b32 $r6 D[$r1 + 0x00]
227 nv_wr32($r6, $r5)
274 // $r6 - inner loop counter
292 mov $r6 0x0
295 mulu $r9 $r6 $r8
346 add b32 $r6 1
349 cmp b16 $r6 0x10