Lines Matching +full:0 +full:x00000083
103 u8 median[8], bins[4] = {0, 0, 0, 0}, bin = 0, qty = 0; in gt215_link_train_calc()
105 for (i = 0; i < 8; i++) { in gt215_link_train_calc()
106 for (lo = 0; lo < 0x40; lo++) { in gt215_link_train_calc()
107 if (!(vals[lo] & 0x80000000)) in gt215_link_train_calc()
109 if (vals[lo] & (0x101 << i)) in gt215_link_train_calc()
113 if (lo == 0x40) in gt215_link_train_calc()
116 for (hi = lo + 1; hi < 0x40; hi++) { in gt215_link_train_calc()
117 if (!(vals[lo] & 0x80000000)) in gt215_link_train_calc()
119 if (!(vals[hi] & (0x101 << i))) { in gt215_link_train_calc()
126 bins[(median[i] & 0xf0) >> 4]++; in gt215_link_train_calc()
127 median[i] += 0x30; in gt215_link_train_calc()
130 /* Find the best value for 0x1111e0 */ in gt215_link_train_calc()
131 for (i = 0; i < 4; i++) { in gt215_link_train_calc()
138 train->r_100720 = 0; in gt215_link_train_calc()
139 for (i = 0; i < 8; i++) { in gt215_link_train_calc()
141 median[i] = min(median[i], (u8) ((bin << 4) | 0xf)); in gt215_link_train_calc()
143 train->r_100720 |= ((median[i] & 0x0f) << (i << 2)); in gt215_link_train_calc()
146 train->r_1111e0 = 0x02000000 | (bin * 0x101); in gt215_link_train_calc()
147 train->r_111400 = 0x0; in gt215_link_train_calc()
164 struct nvbios_M0205T M0205T = { 0 }; in gt215_link_train()
182 if (M0205T.freq == 0) { in gt215_link_train()
199 nvkm_wr32(device, 0x111400, 0x00000000); in gt215_link_train()
201 nvkm_mask(device, 0x100674, 0x0000ffff, 0x00000000); in gt215_link_train()
202 nvkm_mask(device, 0x1005e4, 0x0000ffff, 0x00000000); in gt215_link_train()
203 nvkm_mask(device, 0x100b0c, 0x000000ff, 0x00000000); in gt215_link_train()
204 nvkm_wr32(device, 0x100c04, 0x00000400); in gt215_link_train()
207 r1700 = ram_rd32(fuc, 0x001700); in gt215_link_train()
209 ram_mask(fuc, 0x100200, 0x00000800, 0x00000000); in gt215_link_train()
210 ram_wr32(fuc, 0x611200, 0x3300); in gt215_link_train()
212 ram_wait(fuc, 0x611200, 0x00000003, 0x00000000, 500000); in gt215_link_train()
213 ram_mask(fuc, 0x001610, 0x00000083, 0x00000003); in gt215_link_train()
214 ram_mask(fuc, 0x100080, 0x00000020, 0x00000000); in gt215_link_train()
215 ram_mask(fuc, 0x10f804, 0x80000000, 0x00000000); in gt215_link_train()
216 ram_wr32(fuc, 0x001700, 0x00000000); in gt215_link_train()
221 ram_mask(fuc, 0x10f804, 0x80000000, 0x80000000); in gt215_link_train()
222 ram_wr32(fuc, 0x10053c, 0x0); in gt215_link_train()
223 ram_wr32(fuc, 0x100720, train->r_100720); in gt215_link_train()
224 ram_wr32(fuc, 0x1111e0, train->r_1111e0); in gt215_link_train()
225 ram_wr32(fuc, 0x111400, train->r_111400); in gt215_link_train()
226 ram_nuke(fuc, 0x100080); in gt215_link_train()
227 ram_mask(fuc, 0x100080, 0x00000020, 0x00000020); in gt215_link_train()
230 ram_wr32(fuc, 0x001700, r1700); in gt215_link_train()
231 ram_mask(fuc, 0x001610, 0x00000083, 0x00000080); in gt215_link_train()
232 ram_wr32(fuc, 0x611200, 0x3330); in gt215_link_train()
233 ram_mask(fuc, 0x100200, 0x00000800, 0x00000800); in gt215_link_train()
241 nvkm_mask(device, 0x616308, 0x10, 0x10); in gt215_link_train()
242 nvkm_mask(device, 0x616b08, 0x10, 0x10); in gt215_link_train()
247 for (i = 0; i < 64; i++) in gt215_link_train()
275 0xaaaaaaaa, 0xcccccccc, 0xdddddddd, 0xeeeeeeee, in gt215_link_train_init()
276 0x00000000, 0x11111111, 0x44444444, 0xdddddddd, in gt215_link_train_init()
277 0x33333333, 0x55555555, 0x77777777, 0x66666666, in gt215_link_train_init()
278 0x99999999, 0x88888888, 0xeeeeeeee, 0xbbbbbbbb, in gt215_link_train_init()
287 int ret, i = 0; in gt215_link_train_init()
297 return 0; in gt215_link_train_init()
301 ret = nvkm_ram_get(device, NVKM_RAM_MM_NORMAL, 0x01, 16, 0x8000, in gt215_link_train_init()
308 nvkm_wr32(device, 0x100538, 0x10000000 | (addr >> 16)); in gt215_link_train_init()
309 nvkm_wr32(device, 0x1005a8, 0x0000ffff); in gt215_link_train_init()
310 nvkm_mask(device, 0x10f800, 0x00000001, 0x00000001); in gt215_link_train_init()
312 for (i = 0; i < 0x30; i++) { in gt215_link_train_init()
313 nvkm_wr32(device, 0x10f8c0, (i << 8) | i); in gt215_link_train_init()
314 nvkm_wr32(device, 0x10f900, pattern[i % 16]); in gt215_link_train_init()
317 for (i = 0; i < 0x30; i++) { in gt215_link_train_init()
318 nvkm_wr32(device, 0x10f8e0, (i << 8) | i); in gt215_link_train_init()
319 nvkm_wr32(device, 0x10f920, pattern[i % 16]); in gt215_link_train_init()
323 r001700 = nvkm_rd32(device, 0x1700); in gt215_link_train_init()
324 nvkm_wr32(device, 0x1700, addr >> 16); in gt215_link_train_init()
325 for (i = 0; i < 16; i++) in gt215_link_train_init()
326 nvkm_wr32(device, 0x700000 + (i << 2), pattern[i]); in gt215_link_train_init()
327 for (i = 0; i < 16; i++) in gt215_link_train_init()
328 nvkm_wr32(device, 0x700100 + (i << 2), pattern[i]); in gt215_link_train_init()
329 nvkm_wr32(device, 0x1700, r001700); in gt215_link_train_init()
331 train->r_100720 = nvkm_rd32(device, 0x100720); in gt215_link_train_init()
332 train->r_1111e0 = nvkm_rd32(device, 0x1111e0); in gt215_link_train_init()
333 train->r_111400 = nvkm_rd32(device, 0x111400); in gt215_link_train_init()
334 return 0; in gt215_link_train_init()
356 cur2 = nvkm_rd32(device, 0x100228); in gt215_ram_timing_calc()
357 cur3 = nvkm_rd32(device, 0x10022c); in gt215_ram_timing_calc()
358 cur7 = nvkm_rd32(device, 0x10023c); in gt215_ram_timing_calc()
359 cur8 = nvkm_rd32(device, 0x100240); in gt215_ram_timing_calc()
367 T(CWL) = ((cur2 & 0xff000000) >> 24) + 1; in gt215_ram_timing_calc()
371 prevCL = (cur3 & 0x000000ff) + 1; in gt215_ram_timing_calc()
372 tUNK_base = ((cur7 & 0x00ff0000) >> 16) - prevCL; in gt215_ram_timing_calc()
374 timing[0] = (T(RP) << 24 | T(RAS) << 16 | T(RFC) << 8 | T(RC)); in gt215_ram_timing_calc()
383 timing[3] = (cur3 & 0x00ff0000) | in gt215_ram_timing_calc()
384 (0x30 + T(CL)) << 24 | in gt215_ram_timing_calc()
385 (0xb + T(CL)) << 8 | in gt215_ram_timing_calc()
395 timing[6] = (0x5a + T(CL)) << 16 | in gt215_ram_timing_calc()
397 (0x50 + T(CL) - T(CWL)); in gt215_ram_timing_calc()
398 timing[7] = (cur7 & 0xff000000) | in gt215_ram_timing_calc()
400 0x202; in gt215_ram_timing_calc()
401 timing[8] = cur8 & 0xffffff00; in gt215_ram_timing_calc()
406 tUNK_40_0 = prevCL - (cur8 & 0xff); in gt215_ram_timing_calc()
407 if (tUNK_40_0 > 0) in gt215_ram_timing_calc()
415 timing[0], timing[1], timing[2], timing[3]); in gt215_ram_timing_calc()
419 return 0; in gt215_ram_timing_calc()
426 ram_mask(fuc, mr[0], 0x100, 0x100); in nvkm_sddr2_dll_reset()
428 ram_mask(fuc, mr[0], 0x100, 0x000); in nvkm_sddr2_dll_reset()
437 if (!(mr1_old & 0x1)) { in nvkm_sddr3_dll_disable()
438 ram_wr32(fuc, 0x1002d4, 0x00000001); in nvkm_sddr3_dll_disable()
449 if (!(mr1_old & 0x40)) { in nvkm_gddr3_dll_disable()
458 ram_wr32(fuc, 0x004004, mclk->pll); in gt215_ram_lock_pll()
459 ram_mask(fuc, 0x004000, 0x00000001, 0x00000001); in gt215_ram_lock_pll()
460 ram_mask(fuc, 0x004000, 0x00000010, 0x00000000); in gt215_ram_lock_pll()
461 ram_wait(fuc, 0x004000, 0x00020000, 0x00020000, 64000); in gt215_ram_lock_pll()
462 ram_mask(fuc, 0x004000, 0x00000010, 0x00000010); in gt215_ram_lock_pll()
473 if (nvkm_gpio_get(gpio, 0, tag, DCB_GPIO_UNUSED) != val) { in gt215_ram_gpio()
474 ret = nvkm_gpio_find(gpio, 0, tag, DCB_GPIO_UNUSED, &func); in gt215_ram_gpio()
479 sh = (func.line & 0x7) << 2; in gt215_ram_gpio()
486 ram_mask(fuc, gpio[reg], (0x3 << sh), ((val | 0x2) << sh)); in gt215_ram_gpio()
521 if (!data || ver != 0x10 || hdr < 0x05) { in gt215_ram_calc()
535 if (!data || ver != 0x10 || hdr < 0x09) { in gt215_ram_calc()
541 if (next->bios.ramcfg_timing != 0xff) { in gt215_ram_calc()
545 if (!data || ver != 0x10 || hdr < 0x17) { in gt215_ram_calc()
551 ret = gt215_pll_info(device->clk, 0x12, 0x4000, freq, &mclk); in gt215_ram_calc()
552 if (ret < 0) { in gt215_ram_calc()
564 ram->base.mr[0] = ram_rd32(fuc, mr[0]); in gt215_ram_calc()
588 r004018 = 0x10000000; in gt215_ram_calc()
589 r100760 = 0x22222222; in gt215_ram_calc()
590 r100da0 = 0x00000010; in gt215_ram_calc()
592 r004018 = 0x00000000; in gt215_ram_calc()
593 r100760 = 0x00000000; in gt215_ram_calc()
594 r100da0 = 0x00000000; in gt215_ram_calc()
598 r004018 |= 0x00004000; in gt215_ram_calc()
601 ctrl = ram_rd32(fuc, 0x004000); in gt215_ram_calc()
602 pll2pll = (!(ctrl & 0x00000008)) && mclk.pll; in gt215_ram_calc()
606 ram_mask(fuc, 0x111104, 0x00000600, 0x00000000); in gt215_ram_calc()
608 ram_mask(fuc, 0x111100, 0x40000000, 0x40000000); in gt215_ram_calc()
609 ram_mask(fuc, 0x111104, 0x00000180, 0x00000000); in gt215_ram_calc()
612 ram_mask(fuc, 0x100200, 0x00000800, 0x00000000); in gt215_ram_calc()
616 ram_mask(fuc, 0x004128, 0x003f3141, mclk.clk | 0x00000101); in gt215_ram_calc()
622 ram_wr32(fuc, 0x611200, 0x3300); in gt215_ram_calc()
623 ram_mask(fuc, 0x002504, 0x1, 0x1); in gt215_ram_calc()
625 ram_wait(fuc, 0x002504, 0x10, 0x10, 20000); /* XXX: or longer? */ in gt215_ram_calc()
631 ram_mask(fuc, 0x111100, 0x04020000, 0x00020000); in gt215_ram_calc()
633 ram_mask(fuc, 0x111100, 0x04020000, 0x04020000); in gt215_ram_calc()
647 gt215_ram_gpio(fuc, 0x2e, 1); in gt215_ram_calc()
650 ram_wr32(fuc, 0x1002d4, 0x00000001); in gt215_ram_calc()
651 ram_wr32(fuc, 0x1002d0, 0x00000001); in gt215_ram_calc()
652 ram_wr32(fuc, 0x1002d0, 0x00000001); in gt215_ram_calc()
653 ram_wr32(fuc, 0x100210, 0x00000000); in gt215_ram_calc()
654 ram_wr32(fuc, 0x1002dc, 0x00000001); in gt215_ram_calc()
657 if (device->chipset == 0xa3 && freq <= 500000) in gt215_ram_calc()
658 ram_mask(fuc, 0x100700, 0x00000006, 0x00000006); in gt215_ram_calc()
662 if (nvkm_gpio_get(gpio, 0, 0x18, DCB_GPIO_UNUSED) == in gt215_ram_calc()
664 data = ram_rd32(fuc, 0x004000) & 0x9; in gt215_ram_calc()
666 if (data == 0x1) in gt215_ram_calc()
667 ram_mask(fuc, 0x004000, 0x8, 0x8); in gt215_ram_calc()
668 if (data & 0x1) in gt215_ram_calc()
669 ram_mask(fuc, 0x004000, 0x1, 0x0); in gt215_ram_calc()
671 gt215_ram_gpio(fuc, 0x18, !next->bios.ramcfg_FBVDDQ); in gt215_ram_calc()
673 if (data & 0x1) in gt215_ram_calc()
674 ram_mask(fuc, 0x004000, 0x1, 0x1); in gt215_ram_calc()
686 ram_mask(fuc, 0x004000, 0x00000004, 0x00000004); in gt215_ram_calc()
687 ram_mask(fuc, 0x004168, 0x003f3141, 0x00083101); in gt215_ram_calc()
688 ram_mask(fuc, 0x004000, 0x00000008, 0x00000008); in gt215_ram_calc()
689 ram_mask(fuc, 0x1110e0, 0x00088000, 0x00088000); in gt215_ram_calc()
690 ram_wr32(fuc, 0x004018, 0x00001000); in gt215_ram_calc()
695 ram_mask(fuc, 0x004000, 0x00000105, 0x00000105); in gt215_ram_calc()
696 ram_wr32(fuc, 0x004018, 0x00001000 | r004018); in gt215_ram_calc()
697 ram_wr32(fuc, 0x100da0, r100da0); in gt215_ram_calc()
699 ram_mask(fuc, 0x004168, 0x003f3141, mclk.clk | 0x00000101); in gt215_ram_calc()
700 ram_mask(fuc, 0x004000, 0x00000108, 0x00000008); in gt215_ram_calc()
701 ram_mask(fuc, 0x1110e0, 0x00088000, 0x00088000); in gt215_ram_calc()
702 ram_wr32(fuc, 0x004018, 0x00009000 | r004018); in gt215_ram_calc()
703 ram_wr32(fuc, 0x100da0, r100da0); in gt215_ram_calc()
708 ram_wr32(fuc, 0x1005a0, next->bios.ramcfg_10_06 << 16 | in gt215_ram_calc()
711 ram_wr32(fuc, 0x1005a4, next->bios.ramcfg_10_08 << 8 | in gt215_ram_calc()
713 ram_wr32(fuc, 0x10f804, next->bios.ramcfg_10_09_f0 << 20 | in gt215_ram_calc()
716 0x80000000); in gt215_ram_calc()
717 ram_mask(fuc, 0x10053c, 0x00001000, 0x00000000); in gt215_ram_calc()
720 ram_wr32(fuc, 0x100080, 0x1020); in gt215_ram_calc()
721 ram_mask(fuc, 0x111400, 0xffffffff, train->r_111400); in gt215_ram_calc()
722 ram_mask(fuc, 0x1111e0, 0xffffffff, train->r_1111e0); in gt215_ram_calc()
723 ram_mask(fuc, 0x100720, 0xffffffff, train->r_100720); in gt215_ram_calc()
725 ram_mask(fuc, 0x10053c, 0x00001000, 0x00001000); in gt215_ram_calc()
726 ram_mask(fuc, 0x10f804, 0x80000000, 0x00000000); in gt215_ram_calc()
727 ram_mask(fuc, 0x100760, 0x22222222, r100760); in gt215_ram_calc()
728 ram_mask(fuc, 0x1007a0, 0x22222222, r100760); in gt215_ram_calc()
729 ram_mask(fuc, 0x1007e0, 0x22222222, r100760); in gt215_ram_calc()
732 if (device->chipset == 0xa3 && freq > 500000) { in gt215_ram_calc()
733 ram_mask(fuc, 0x100700, 0x00000006, 0x00000000); in gt215_ram_calc()
738 ram_mask(fuc, 0x1110e0, 0x00088000, 0x00011000); in gt215_ram_calc()
739 ram_mask(fuc, 0x004000, 0x00000008, 0x00000000); in gt215_ram_calc()
742 ram_wr32(fuc, 0x1002dc, 0x00000000); in gt215_ram_calc()
743 ram_wr32(fuc, 0x1002d4, 0x00000001); in gt215_ram_calc()
744 ram_wr32(fuc, 0x100210, 0x80000000); in gt215_ram_calc()
748 for (i = 2; i >= 0; i--) { in gt215_ram_calc()
755 ram_wr32(fuc, 0x100220[3], timing[3]); in gt215_ram_calc()
756 ram_wr32(fuc, 0x100220[1], timing[1]); in gt215_ram_calc()
757 ram_wr32(fuc, 0x100220[6], timing[6]); in gt215_ram_calc()
758 ram_wr32(fuc, 0x100220[7], timing[7]); in gt215_ram_calc()
759 ram_wr32(fuc, 0x100220[2], timing[2]); in gt215_ram_calc()
760 ram_wr32(fuc, 0x100220[4], timing[4]); in gt215_ram_calc()
761 ram_wr32(fuc, 0x100220[5], timing[5]); in gt215_ram_calc()
762 ram_wr32(fuc, 0x100220[0], timing[0]); in gt215_ram_calc()
763 ram_wr32(fuc, 0x100220[8], timing[8]); in gt215_ram_calc()
766 ram_mask(fuc, 0x100200, 0x00001000, !next->bios.ramcfg_10_02_08 << 12); in gt215_ram_calc()
769 unk714 = ram_rd32(fuc, 0x100714) & ~0xf0000130; in gt215_ram_calc()
770 unk718 = ram_rd32(fuc, 0x100718) & ~0x00000100; in gt215_ram_calc()
771 unk71c = ram_rd32(fuc, 0x10071c) & ~0x00000100; in gt215_ram_calc()
772 r111100 = ram_rd32(fuc, 0x111100) & ~0x3a800000; in gt215_ram_calc()
775 if (device->chipset == 0xa8) { in gt215_ram_calc()
776 r111100 |= 0x08000000; in gt215_ram_calc()
778 unk714 |= 0x00000010; in gt215_ram_calc()
784 r111100 &= ~0x00000020; in gt215_ram_calc()
786 r111100 |= 0x08000004; in gt215_ram_calc()
788 r111100 |= 0x00000024; in gt215_ram_calc()
797 r111100 &= ~0x00000024; in gt215_ram_calc()
798 r111100 |= 0x12800000; in gt215_ram_calc()
801 r111100 |= 0x08000000; in gt215_ram_calc()
802 unk714 |= 0x00000010; in gt215_ram_calc()
805 r111100 |= 0x30000000; in gt215_ram_calc()
806 unk714 |= 0x00000020; in gt215_ram_calc()
817 unk714 |= 0xf0000000; in gt215_ram_calc()
819 unk718 |= 0x00000100; in gt215_ram_calc()
821 unk71c |= 0x00000100; in gt215_ram_calc()
822 if (next->bios.timing_10_24 != 0xff) { in gt215_ram_calc()
823 unk718 &= ~0xf0000000; in gt215_ram_calc()
827 r111100 &= ~0x04020000; in gt215_ram_calc()
829 ram_mask(fuc, 0x100714, 0xffffffff, unk714); in gt215_ram_calc()
830 ram_mask(fuc, 0x10071c, 0xffffffff, unk71c); in gt215_ram_calc()
831 ram_mask(fuc, 0x100718, 0xffffffff, unk718); in gt215_ram_calc()
832 ram_mask(fuc, 0x111100, 0xffffffff, r111100); in gt215_ram_calc()
835 gt215_ram_gpio(fuc, 0x2e, 0); in gt215_ram_calc()
848 ram_wr32(fuc, 0x100264, 0x1); in gt215_ram_calc()
852 ram_nuke(fuc, 0x100700); in gt215_ram_calc()
853 ram_mask(fuc, 0x100700, 0x01000000, 0x01000000); in gt215_ram_calc()
854 ram_mask(fuc, 0x100700, 0x01000000, 0x00000000); in gt215_ram_calc()
858 ram_wr32(fuc, 0x611200, 0x3330); in gt215_ram_calc()
862 ram_mask(fuc, 0x100200, 0x00000800, 0x00000800); in gt215_ram_calc()
864 ram_mask(fuc, 0x111104, 0x00000180, 0x00000180); in gt215_ram_calc()
865 ram_mask(fuc, 0x111100, 0x40000000, 0x00000000); in gt215_ram_calc()
867 ram_mask(fuc, 0x111104, 0x00000600, 0x00000600); in gt215_ram_calc()
871 ram_mask(fuc, 0x004168, 0x00000001, 0x00000000); in gt215_ram_calc()
872 ram_mask(fuc, 0x004168, 0x00000100, 0x00000000); in gt215_ram_calc()
874 ram_mask(fuc, 0x004000, 0x00000001, 0x00000000); in gt215_ram_calc()
875 ram_mask(fuc, 0x004128, 0x00000001, 0x00000000); in gt215_ram_calc()
876 ram_mask(fuc, 0x004128, 0x00000100, 0x00000000); in gt215_ram_calc()
879 return 0; in gt215_ram_calc()
891 nvkm_mask(device, 0x001534, 0x2, 0x2); in gt215_ram_prog()
896 nvkm_mask(device, 0x002504, 0x1, 0x0); in gt215_ram_prog()
897 nvkm_mask(device, 0x001534, 0x2, 0x0); in gt215_ram_prog()
899 nvkm_mask(device, 0x616308, 0x10, 0x10); in gt215_ram_prog()
900 nvkm_mask(device, 0x616b08, 0x10, 0x10); in gt215_ram_prog()
904 return 0; in gt215_ram_prog()
919 return 0; in gt215_ram_init()
953 ram->fuc.r_0x001610 = ramfuc_reg(0x001610); in gt215_ram_new()
954 ram->fuc.r_0x001700 = ramfuc_reg(0x001700); in gt215_ram_new()
955 ram->fuc.r_0x002504 = ramfuc_reg(0x002504); in gt215_ram_new()
956 ram->fuc.r_0x004000 = ramfuc_reg(0x004000); in gt215_ram_new()
957 ram->fuc.r_0x004004 = ramfuc_reg(0x004004); in gt215_ram_new()
958 ram->fuc.r_0x004018 = ramfuc_reg(0x004018); in gt215_ram_new()
959 ram->fuc.r_0x004128 = ramfuc_reg(0x004128); in gt215_ram_new()
960 ram->fuc.r_0x004168 = ramfuc_reg(0x004168); in gt215_ram_new()
961 ram->fuc.r_0x100080 = ramfuc_reg(0x100080); in gt215_ram_new()
962 ram->fuc.r_0x100200 = ramfuc_reg(0x100200); in gt215_ram_new()
963 ram->fuc.r_0x100210 = ramfuc_reg(0x100210); in gt215_ram_new()
964 for (i = 0; i < 9; i++) in gt215_ram_new()
965 ram->fuc.r_0x100220[i] = ramfuc_reg(0x100220 + (i * 4)); in gt215_ram_new()
966 ram->fuc.r_0x100264 = ramfuc_reg(0x100264); in gt215_ram_new()
967 ram->fuc.r_0x1002d0 = ramfuc_reg(0x1002d0); in gt215_ram_new()
968 ram->fuc.r_0x1002d4 = ramfuc_reg(0x1002d4); in gt215_ram_new()
969 ram->fuc.r_0x1002dc = ramfuc_reg(0x1002dc); in gt215_ram_new()
970 ram->fuc.r_0x10053c = ramfuc_reg(0x10053c); in gt215_ram_new()
971 ram->fuc.r_0x1005a0 = ramfuc_reg(0x1005a0); in gt215_ram_new()
972 ram->fuc.r_0x1005a4 = ramfuc_reg(0x1005a4); in gt215_ram_new()
973 ram->fuc.r_0x100700 = ramfuc_reg(0x100700); in gt215_ram_new()
974 ram->fuc.r_0x100714 = ramfuc_reg(0x100714); in gt215_ram_new()
975 ram->fuc.r_0x100718 = ramfuc_reg(0x100718); in gt215_ram_new()
976 ram->fuc.r_0x10071c = ramfuc_reg(0x10071c); in gt215_ram_new()
977 ram->fuc.r_0x100720 = ramfuc_reg(0x100720); in gt215_ram_new()
978 ram->fuc.r_0x100760 = ramfuc_stride(0x100760, 4, ram->base.part_mask); in gt215_ram_new()
979 ram->fuc.r_0x1007a0 = ramfuc_stride(0x1007a0, 4, ram->base.part_mask); in gt215_ram_new()
980 ram->fuc.r_0x1007e0 = ramfuc_stride(0x1007e0, 4, ram->base.part_mask); in gt215_ram_new()
981 ram->fuc.r_0x100da0 = ramfuc_stride(0x100da0, 4, ram->base.part_mask); in gt215_ram_new()
982 ram->fuc.r_0x10f804 = ramfuc_reg(0x10f804); in gt215_ram_new()
983 ram->fuc.r_0x1110e0 = ramfuc_stride(0x1110e0, 4, ram->base.part_mask); in gt215_ram_new()
984 ram->fuc.r_0x111100 = ramfuc_reg(0x111100); in gt215_ram_new()
985 ram->fuc.r_0x111104 = ramfuc_reg(0x111104); in gt215_ram_new()
986 ram->fuc.r_0x1111e0 = ramfuc_reg(0x1111e0); in gt215_ram_new()
987 ram->fuc.r_0x111400 = ramfuc_reg(0x111400); in gt215_ram_new()
988 ram->fuc.r_0x611200 = ramfuc_reg(0x611200); in gt215_ram_new()
991 ram->fuc.r_mr[0] = ramfuc_reg2(0x1002c0, 0x1002c8); in gt215_ram_new()
992 ram->fuc.r_mr[1] = ramfuc_reg2(0x1002c4, 0x1002cc); in gt215_ram_new()
993 ram->fuc.r_mr[2] = ramfuc_reg2(0x1002e0, 0x1002e8); in gt215_ram_new()
994 ram->fuc.r_mr[3] = ramfuc_reg2(0x1002e4, 0x1002ec); in gt215_ram_new()
996 ram->fuc.r_mr[0] = ramfuc_reg(0x1002c0); in gt215_ram_new()
997 ram->fuc.r_mr[1] = ramfuc_reg(0x1002c4); in gt215_ram_new()
998 ram->fuc.r_mr[2] = ramfuc_reg(0x1002e0); in gt215_ram_new()
999 ram->fuc.r_mr[3] = ramfuc_reg(0x1002e4); in gt215_ram_new()
1001 ram->fuc.r_gpio[0] = ramfuc_reg(0x00e104); in gt215_ram_new()
1002 ram->fuc.r_gpio[1] = ramfuc_reg(0x00e108); in gt215_ram_new()
1003 ram->fuc.r_gpio[2] = ramfuc_reg(0x00e120); in gt215_ram_new()
1004 ram->fuc.r_gpio[3] = ramfuc_reg(0x00e124); in gt215_ram_new()
1006 return 0; in gt215_ram_new()