Lines Matching +full:offset +full:- +full:x
42 nvkm_printk(init->subdev, lvl, info, "0x%08x[%c]: "fmt, \
43 init->offset, init_exec(init) ? \
44 '0' + (init->nested - 1) : ' ', ##args); \
47 if (init->subdev->debug >= NV_DBG_TRACE) \
61 return (init->execute == 1) || ((init->execute & 5) == 5); in init_exec()
67 if (exec) init->execute &= 0xfd; in init_exec_set()
68 else init->execute |= 0x02; in init_exec_set()
74 init->execute ^= 0x02; in init_exec_inv()
80 if (exec) init->execute |= 0x04; in init_exec_force()
81 else init->execute &= 0xfb; in init_exec_force()
92 if (init->or >= 0) in init_or()
93 return init->or; in init_or()
103 if (init->link) in init_link()
104 return init->link == 2; in init_link()
114 if (init->head >= 0) in init_head()
115 return init->head; in init_head()
124 struct nvkm_bios *bios = init->subdev->device->bios; in init_conn()
130 if (init->outp) { in init_conn()
131 conn = init->outp->connector; in init_conn()
146 struct nvkm_devinit *devinit = init->subdev->device->devinit; in init_nvreg()
159 if (init->subdev->device->card_type >= NV_50) { in init_nvreg()
176 warn("unknown bits in register 0x%08x\n", reg); in init_nvreg()
184 struct nvkm_device *device = init->subdev->device; in init_rd32()
194 struct nvkm_device *device = init->subdev->device; in init_wr32()
203 struct nvkm_device *device = init->subdev->device; in init_mask()
217 return nvkm_rdport(init->subdev->device, init->head, port); in init_rdport()
225 nvkm_wrport(init->subdev->device, init->head, port, value); in init_wrport()
231 struct nvkm_subdev *subdev = init->subdev; in init_rdvgai()
233 int head = init->head < 0 ? 0 : init->head; in init_rdvgai()
234 return nvkm_rdvgai(subdev->device, head, port, index); in init_rdvgai()
242 struct nvkm_device *device = init->subdev->device; in init_wrvgai()
245 if (device->card_type < NV_50) { in init_wrvgai()
247 init->head = 0; in init_wrvgai()
251 int head = init->head < 0 ? 0 : init->head; in init_wrvgai()
256 if (device->card_type < NV_50) { in init_wrvgai()
258 init->head = 1; in init_wrvgai()
265 struct nvkm_i2c *i2c = init->subdev->device->i2c; in init_i2c()
270 if (init->outp && init->outp->i2c_upper_default) in init_i2c()
281 return bus ? &bus->i2c : NULL; in init_i2c()
290 return -ENODEV; in init_rdi2cr()
299 return -ENODEV; in init_wri2cr()
305 struct nvkm_i2c *i2c = init->subdev->device->i2c; in init_aux()
306 if (!init->outp) { in init_aux()
311 return nvkm_i2c_aux_find(i2c, init->outp->i2c_index); in init_aux()
340 return -ENODEV; in init_wrauxr()
346 struct nvkm_devinit *devinit = init->subdev->device->devinit; in init_prog_pll()
350 warn("failed to prog pll 0x%08x to %dkHz\n", id, freq); in init_prog_pll()
365 return bit_I.offset; in init_table()
370 return bios->bmp_offset + 75; in init_table()
377 init_table_(struct nvbios_init *init, u16 offset, const char *name) in init_table_() argument
379 struct nvkm_bios *bios = init->subdev->device->bios; in init_table_()
382 if (len >= offset + 2) { in init_table_()
383 data = nvbios_rd16(bios, data + offset); in init_table_()
411 struct nvbios_init init = { .subdev = &bios->subdev }; in init_script()
418 data = bios->bmp_offset + (bmp_ver < 0x0200 ? 14 : 18); in init_script()
441 return nvbios_ramcfg_count(init->subdev->device->bios); in init_ram_restrict_group_count()
452 * Preserving the non-caching behaviour on earlier chipsets just in init_ram_restrict()
453 * in case *not* re-reading the strap causes similar breakage. in init_ram_restrict()
455 if (!init->ramcfg || init->subdev->device->bios->version.major < 0x70) in init_ram_restrict()
456 init->ramcfg = 0x80000000 | nvbios_ramcfg_index(init->subdev); in init_ram_restrict()
457 return (init->ramcfg & 0x7fffffff); in init_ram_restrict()
461 init_xlat_(struct nvbios_init *init, u8 index, u8 offset) in init_xlat_() argument
463 struct nvkm_bios *bios = init->subdev->device->bios; in init_xlat_()
468 return nvbios_rd08(bios, data + offset); in init_xlat_()
481 struct nvkm_bios *bios = init->subdev->device->bios; in init_condition_met()
487 trace("\t[0x%02x] (R[0x%06x] & 0x%08x) == 0x%08x\n", in init_condition_met()
497 struct nvkm_bios *bios = init->subdev->device->bios; in init_io_condition_met()
504 trace("\t[0x%02x] (0x%04x[0x%02x] & 0x%02x) == 0x%02x\n", in init_io_condition_met()
514 struct nvkm_bios *bios = init->subdev->device->bios; in init_io_flag_condition_met()
535 return data << (0x100 - shift); in init_shift()
547 * 0x6808b0 address, and then flip the offset by 8. in init_tmds_reg()
555 if (init->outp) { in init_tmds_reg()
556 u32 dacoffset = pramdac_offset[init->outp->or]; in init_tmds_reg()
568 error("tmds selector 0x%02x unknown\n", tmds); in init_tmds_reg()
579 * init_reserved - stub for various unknown/unused single-byte opcodes
585 struct nvkm_bios *bios = init->subdev->device->bios; in init_reserved()
586 u8 opcode = nvbios_rd08(bios, init->offset); in init_reserved()
598 trace("RESERVED 0x%02x\t", opcode); in init_reserved()
600 cont(" 0x%02x", nvbios_rd08(bios, init->offset + i)); in init_reserved()
602 init->offset += length; in init_reserved()
606 * INIT_DONE - opcode 0x71
613 init->offset = 0x0000; in init_done()
617 * INIT_IO_RESTRICT_PROG - opcode 0x32
623 struct nvkm_bios *bios = init->subdev->device->bios; in init_io_restrict_prog()
624 u16 port = nvbios_rd16(bios, init->offset + 1); in init_io_restrict_prog()
625 u8 index = nvbios_rd08(bios, init->offset + 3); in init_io_restrict_prog()
626 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_io_restrict_prog()
627 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_io_restrict_prog()
628 u8 count = nvbios_rd08(bios, init->offset + 6); in init_io_restrict_prog()
629 u32 reg = nvbios_rd32(bios, init->offset + 7); in init_io_restrict_prog()
632 trace("IO_RESTRICT_PROG\tR[0x%06x] = " in init_io_restrict_prog()
633 "((0x%04x[0x%02x] & 0x%02x) >> %d) [{\n", in init_io_restrict_prog()
635 init->offset += 11; in init_io_restrict_prog()
639 u32 data = nvbios_rd32(bios, init->offset); in init_io_restrict_prog()
642 trace("\t0x%08x *\n", data); in init_io_restrict_prog()
645 trace("\t0x%08x\n", data); in init_io_restrict_prog()
648 init->offset += 4; in init_io_restrict_prog()
654 * INIT_REPEAT - opcode 0x33
660 struct nvkm_bios *bios = init->subdev->device->bios; in init_repeat()
661 u8 count = nvbios_rd08(bios, init->offset + 1); in init_repeat()
662 u16 repeat = init->repeat; in init_repeat()
664 trace("REPEAT\t0x%02x\n", count); in init_repeat()
665 init->offset += 2; in init_repeat()
667 init->repeat = init->offset; in init_repeat()
668 init->repend = init->offset; in init_repeat()
669 while (count--) { in init_repeat()
670 init->offset = init->repeat; in init_repeat()
673 trace("REPEAT\t0x%02x\n", count); in init_repeat()
675 init->offset = init->repend; in init_repeat()
676 init->repeat = repeat; in init_repeat()
680 * INIT_IO_RESTRICT_PLL - opcode 0x34
686 struct nvkm_bios *bios = init->subdev->device->bios; in init_io_restrict_pll()
687 u16 port = nvbios_rd16(bios, init->offset + 1); in init_io_restrict_pll()
688 u8 index = nvbios_rd08(bios, init->offset + 3); in init_io_restrict_pll()
689 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_io_restrict_pll()
690 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_io_restrict_pll()
691 s8 iofc = nvbios_rd08(bios, init->offset + 6); in init_io_restrict_pll()
692 u8 count = nvbios_rd08(bios, init->offset + 7); in init_io_restrict_pll()
693 u32 reg = nvbios_rd32(bios, init->offset + 8); in init_io_restrict_pll()
696 trace("IO_RESTRICT_PLL\tR[0x%06x] =PLL= " in init_io_restrict_pll()
697 "((0x%04x[0x%02x] & 0x%02x) >> 0x%02x) IOFCOND 0x%02x [{\n", in init_io_restrict_pll()
699 init->offset += 12; in init_io_restrict_pll()
703 u32 freq = nvbios_rd16(bios, init->offset) * 10; in init_io_restrict_pll()
714 init->offset += 2; in init_io_restrict_pll()
720 * INIT_END_REPEAT - opcode 0x36
727 init->offset += 1; in init_end_repeat()
729 if (init->repeat) { in init_end_repeat()
730 init->repend = init->offset; in init_end_repeat()
731 init->offset = 0; in init_end_repeat()
736 * INIT_COPY - opcode 0x37
742 struct nvkm_bios *bios = init->subdev->device->bios; in init_copy()
743 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_copy()
744 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_copy()
745 u8 smask = nvbios_rd08(bios, init->offset + 6); in init_copy()
746 u16 port = nvbios_rd16(bios, init->offset + 7); in init_copy()
747 u8 index = nvbios_rd08(bios, init->offset + 9); in init_copy()
748 u8 mask = nvbios_rd08(bios, init->offset + 10); in init_copy()
751 trace("COPY\t0x%04x[0x%02x] &= 0x%02x |= " in init_copy()
752 "((R[0x%06x] %s 0x%02x) & 0x%02x)\n", in init_copy()
754 (shift & 0x80) ? (0x100 - shift) : shift, smask); in init_copy()
755 init->offset += 11; in init_copy()
763 * INIT_NOT - opcode 0x38
770 init->offset += 1; in init_not()
775 * INIT_IO_FLAG_CONDITION - opcode 0x39
781 struct nvkm_bios *bios = init->subdev->device->bios; in init_io_flag_condition()
782 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_io_flag_condition()
784 trace("IO_FLAG_CONDITION\t0x%02x\n", cond); in init_io_flag_condition()
785 init->offset += 2; in init_io_flag_condition()
792 * INIT_GENERIC_CONDITION - opcode 0x3a
798 struct nvkm_bios *bios = init->subdev->device->bios; in init_generic_condition()
800 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_generic_condition()
801 u8 size = nvbios_rd08(bios, init->offset + 2); in init_generic_condition()
805 trace("GENERIC_CONDITION\t0x%02x 0x%02x\n", cond, size); in init_generic_condition()
806 init->offset += 3; in init_generic_condition()
815 if ( init->outp && in init_generic_condition()
817 (init->outp->or << 0) | in init_generic_condition()
818 (init->outp->sorconf.link << 6), in init_generic_condition()
837 warn("INIT_GENERIC_CONDITION: unknown 0x%02x\n", cond); in init_generic_condition()
838 init->offset += size; in init_generic_condition()
844 * INIT_IO_MASK_OR - opcode 0x3b
850 struct nvkm_bios *bios = init->subdev->device->bios; in init_io_mask_or()
851 u8 index = nvbios_rd08(bios, init->offset + 1); in init_io_mask_or()
855 trace("IO_MASK_OR\t0x03d4[0x%02x] &= ~(1 << 0x%02x)\n", index, or); in init_io_mask_or()
856 init->offset += 2; in init_io_mask_or()
863 * INIT_IO_OR - opcode 0x3c
869 struct nvkm_bios *bios = init->subdev->device->bios; in init_io_or()
870 u8 index = nvbios_rd08(bios, init->offset + 1); in init_io_or()
874 trace("IO_OR\t0x03d4[0x%02x] |= (1 << 0x%02x)\n", index, or); in init_io_or()
875 init->offset += 2; in init_io_or()
882 * INIT_ANDN_REG - opcode 0x47
888 struct nvkm_bios *bios = init->subdev->device->bios; in init_andn_reg()
889 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_andn_reg()
890 u32 mask = nvbios_rd32(bios, init->offset + 5); in init_andn_reg()
892 trace("ANDN_REG\tR[0x%06x] &= ~0x%08x\n", reg, mask); in init_andn_reg()
893 init->offset += 9; in init_andn_reg()
899 * INIT_OR_REG - opcode 0x48
905 struct nvkm_bios *bios = init->subdev->device->bios; in init_or_reg()
906 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_or_reg()
907 u32 mask = nvbios_rd32(bios, init->offset + 5); in init_or_reg()
909 trace("OR_REG\tR[0x%06x] |= 0x%08x\n", reg, mask); in init_or_reg()
910 init->offset += 9; in init_or_reg()
916 * INIT_INDEX_ADDRESS_LATCHED - opcode 0x49
922 struct nvkm_bios *bios = init->subdev->device->bios; in init_idx_addr_latched()
923 u32 creg = nvbios_rd32(bios, init->offset + 1); in init_idx_addr_latched()
924 u32 dreg = nvbios_rd32(bios, init->offset + 5); in init_idx_addr_latched()
925 u32 mask = nvbios_rd32(bios, init->offset + 9); in init_idx_addr_latched()
926 u32 data = nvbios_rd32(bios, init->offset + 13); in init_idx_addr_latched()
927 u8 count = nvbios_rd08(bios, init->offset + 17); in init_idx_addr_latched()
929 trace("INDEX_ADDRESS_LATCHED\tR[0x%06x] : R[0x%06x]\n", creg, dreg); in init_idx_addr_latched()
930 trace("\tCTRL &= 0x%08x |= 0x%08x\n", mask, data); in init_idx_addr_latched()
931 init->offset += 18; in init_idx_addr_latched()
933 while (count--) { in init_idx_addr_latched()
934 u8 iaddr = nvbios_rd08(bios, init->offset + 0); in init_idx_addr_latched()
935 u8 idata = nvbios_rd08(bios, init->offset + 1); in init_idx_addr_latched()
937 trace("\t[0x%02x] = 0x%02x\n", iaddr, idata); in init_idx_addr_latched()
938 init->offset += 2; in init_idx_addr_latched()
946 * INIT_IO_RESTRICT_PLL2 - opcode 0x4a
952 struct nvkm_bios *bios = init->subdev->device->bios; in init_io_restrict_pll2()
953 u16 port = nvbios_rd16(bios, init->offset + 1); in init_io_restrict_pll2()
954 u8 index = nvbios_rd08(bios, init->offset + 3); in init_io_restrict_pll2()
955 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_io_restrict_pll2()
956 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_io_restrict_pll2()
957 u8 count = nvbios_rd08(bios, init->offset + 6); in init_io_restrict_pll2()
958 u32 reg = nvbios_rd32(bios, init->offset + 7); in init_io_restrict_pll2()
962 "R[0x%06x] =PLL= ((0x%04x[0x%02x] & 0x%02x) >> 0x%02x) [{\n", in init_io_restrict_pll2()
964 init->offset += 11; in init_io_restrict_pll2()
968 u32 freq = nvbios_rd32(bios, init->offset); in init_io_restrict_pll2()
975 init->offset += 4; in init_io_restrict_pll2()
981 * INIT_PLL2 - opcode 0x4b
987 struct nvkm_bios *bios = init->subdev->device->bios; in init_pll2()
988 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_pll2()
989 u32 freq = nvbios_rd32(bios, init->offset + 5); in init_pll2()
991 trace("PLL2\tR[0x%06x] =PLL= %dkHz\n", reg, freq); in init_pll2()
992 init->offset += 9; in init_pll2()
998 * INIT_I2C_BYTE - opcode 0x4c
1004 struct nvkm_bios *bios = init->subdev->device->bios; in init_i2c_byte()
1005 u8 index = nvbios_rd08(bios, init->offset + 1); in init_i2c_byte()
1006 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; in init_i2c_byte()
1007 u8 count = nvbios_rd08(bios, init->offset + 3); in init_i2c_byte()
1009 trace("I2C_BYTE\tI2C[0x%02x][0x%02x]\n", index, addr); in init_i2c_byte()
1010 init->offset += 4; in init_i2c_byte()
1012 while (count--) { in init_i2c_byte()
1013 u8 reg = nvbios_rd08(bios, init->offset + 0); in init_i2c_byte()
1014 u8 mask = nvbios_rd08(bios, init->offset + 1); in init_i2c_byte()
1015 u8 data = nvbios_rd08(bios, init->offset + 2); in init_i2c_byte()
1018 trace("\t[0x%02x] &= 0x%02x |= 0x%02x\n", reg, mask, data); in init_i2c_byte()
1019 init->offset += 3; in init_i2c_byte()
1029 * INIT_ZM_I2C_BYTE - opcode 0x4d
1035 struct nvkm_bios *bios = init->subdev->device->bios; in init_zm_i2c_byte()
1036 u8 index = nvbios_rd08(bios, init->offset + 1); in init_zm_i2c_byte()
1037 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; in init_zm_i2c_byte()
1038 u8 count = nvbios_rd08(bios, init->offset + 3); in init_zm_i2c_byte()
1040 trace("ZM_I2C_BYTE\tI2C[0x%02x][0x%02x]\n", index, addr); in init_zm_i2c_byte()
1041 init->offset += 4; in init_zm_i2c_byte()
1043 while (count--) { in init_zm_i2c_byte()
1044 u8 reg = nvbios_rd08(bios, init->offset + 0); in init_zm_i2c_byte()
1045 u8 data = nvbios_rd08(bios, init->offset + 1); in init_zm_i2c_byte()
1047 trace("\t[0x%02x] = 0x%02x\n", reg, data); in init_zm_i2c_byte()
1048 init->offset += 2; in init_zm_i2c_byte()
1055 * INIT_ZM_I2C - opcode 0x4e
1061 struct nvkm_bios *bios = init->subdev->device->bios; in init_zm_i2c()
1062 u8 index = nvbios_rd08(bios, init->offset + 1); in init_zm_i2c()
1063 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; in init_zm_i2c()
1064 u8 count = nvbios_rd08(bios, init->offset + 3); in init_zm_i2c()
1067 trace("ZM_I2C\tI2C[0x%02x][0x%02x]\n", index, addr); in init_zm_i2c()
1068 init->offset += 4; in init_zm_i2c()
1071 data[i] = nvbios_rd08(bios, init->offset); in init_zm_i2c()
1072 trace("\t0x%02x\n", data[i]); in init_zm_i2c()
1073 init->offset++; in init_zm_i2c()
1089 * INIT_TMDS - opcode 0x4f
1095 struct nvkm_bios *bios = init->subdev->device->bios; in init_tmds()
1096 u8 tmds = nvbios_rd08(bios, init->offset + 1); in init_tmds()
1097 u8 addr = nvbios_rd08(bios, init->offset + 2); in init_tmds()
1098 u8 mask = nvbios_rd08(bios, init->offset + 3); in init_tmds()
1099 u8 data = nvbios_rd08(bios, init->offset + 4); in init_tmds()
1102 trace("TMDS\tT[0x%02x][0x%02x] &= 0x%02x |= 0x%02x\n", in init_tmds()
1104 init->offset += 5; in init_tmds()
1115 * INIT_ZM_TMDS_GROUP - opcode 0x50
1121 struct nvkm_bios *bios = init->subdev->device->bios; in init_zm_tmds_group()
1122 u8 tmds = nvbios_rd08(bios, init->offset + 1); in init_zm_tmds_group()
1123 u8 count = nvbios_rd08(bios, init->offset + 2); in init_zm_tmds_group()
1126 trace("TMDS_ZM_GROUP\tT[0x%02x]\n", tmds); in init_zm_tmds_group()
1127 init->offset += 3; in init_zm_tmds_group()
1129 while (count--) { in init_zm_tmds_group()
1130 u8 addr = nvbios_rd08(bios, init->offset + 0); in init_zm_tmds_group()
1131 u8 data = nvbios_rd08(bios, init->offset + 1); in init_zm_tmds_group()
1133 trace("\t[0x%02x] = 0x%02x\n", addr, data); in init_zm_tmds_group()
1134 init->offset += 2; in init_zm_tmds_group()
1142 * INIT_CR_INDEX_ADDRESS_LATCHED - opcode 0x51
1148 struct nvkm_bios *bios = init->subdev->device->bios; in init_cr_idx_adr_latch()
1149 u8 addr0 = nvbios_rd08(bios, init->offset + 1); in init_cr_idx_adr_latch()
1150 u8 addr1 = nvbios_rd08(bios, init->offset + 2); in init_cr_idx_adr_latch()
1151 u8 base = nvbios_rd08(bios, init->offset + 3); in init_cr_idx_adr_latch()
1152 u8 count = nvbios_rd08(bios, init->offset + 4); in init_cr_idx_adr_latch()
1155 trace("CR_INDEX_ADDR C[%02x] C[%02x]\n", addr0, addr1); in init_cr_idx_adr_latch()
1156 init->offset += 5; in init_cr_idx_adr_latch()
1159 while (count--) { in init_cr_idx_adr_latch()
1160 u8 data = nvbios_rd08(bios, init->offset); in init_cr_idx_adr_latch()
1162 trace("\t\t[0x%02x] = 0x%02x\n", base, data); in init_cr_idx_adr_latch()
1163 init->offset += 1; in init_cr_idx_adr_latch()
1172 * INIT_CR - opcode 0x52
1178 struct nvkm_bios *bios = init->subdev->device->bios; in init_cr()
1179 u8 addr = nvbios_rd08(bios, init->offset + 1); in init_cr()
1180 u8 mask = nvbios_rd08(bios, init->offset + 2); in init_cr()
1181 u8 data = nvbios_rd08(bios, init->offset + 3); in init_cr()
1184 trace("CR\t\tC[0x%02x] &= 0x%02x |= 0x%02x\n", addr, mask, data); in init_cr()
1185 init->offset += 4; in init_cr()
1192 * INIT_ZM_CR - opcode 0x53
1198 struct nvkm_bios *bios = init->subdev->device->bios; in init_zm_cr()
1199 u8 addr = nvbios_rd08(bios, init->offset + 1); in init_zm_cr()
1200 u8 data = nvbios_rd08(bios, init->offset + 2); in init_zm_cr()
1202 trace("ZM_CR\tC[0x%02x] = 0x%02x\n", addr, data); in init_zm_cr()
1203 init->offset += 3; in init_zm_cr()
1209 * INIT_ZM_CR_GROUP - opcode 0x54
1215 struct nvkm_bios *bios = init->subdev->device->bios; in init_zm_cr_group()
1216 u8 count = nvbios_rd08(bios, init->offset + 1); in init_zm_cr_group()
1219 init->offset += 2; in init_zm_cr_group()
1221 while (count--) { in init_zm_cr_group()
1222 u8 addr = nvbios_rd08(bios, init->offset + 0); in init_zm_cr_group()
1223 u8 data = nvbios_rd08(bios, init->offset + 1); in init_zm_cr_group()
1225 trace("\t\tC[0x%02x] = 0x%02x\n", addr, data); in init_zm_cr_group()
1226 init->offset += 2; in init_zm_cr_group()
1233 * INIT_CONDITION_TIME - opcode 0x56
1239 struct nvkm_bios *bios = init->subdev->device->bios; in init_condition_time()
1240 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_condition_time()
1241 u8 retry = nvbios_rd08(bios, init->offset + 2); in init_condition_time()
1244 trace("CONDITION_TIME\t0x%02x 0x%02x\n", cond, retry); in init_condition_time()
1245 init->offset += 3; in init_condition_time()
1250 while (wait--) { in init_condition_time()
1260 * INIT_LTIME - opcode 0x57
1266 struct nvkm_bios *bios = init->subdev->device->bios; in init_ltime()
1267 u16 msec = nvbios_rd16(bios, init->offset + 1); in init_ltime()
1269 trace("LTIME\t0x%04x\n", msec); in init_ltime()
1270 init->offset += 3; in init_ltime()
1277 * INIT_ZM_REG_SEQUENCE - opcode 0x58
1283 struct nvkm_bios *bios = init->subdev->device->bios; in init_zm_reg_sequence()
1284 u32 base = nvbios_rd32(bios, init->offset + 1); in init_zm_reg_sequence()
1285 u8 count = nvbios_rd08(bios, init->offset + 5); in init_zm_reg_sequence()
1287 trace("ZM_REG_SEQUENCE\t0x%02x\n", count); in init_zm_reg_sequence()
1288 init->offset += 6; in init_zm_reg_sequence()
1290 while (count--) { in init_zm_reg_sequence()
1291 u32 data = nvbios_rd32(bios, init->offset); in init_zm_reg_sequence()
1293 trace("\t\tR[0x%06x] = 0x%08x\n", base, data); in init_zm_reg_sequence()
1294 init->offset += 4; in init_zm_reg_sequence()
1302 * INIT_PLL_INDIRECT - opcode 0x59
1308 struct nvkm_bios *bios = init->subdev->device->bios; in init_pll_indirect()
1309 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_pll_indirect()
1310 u16 addr = nvbios_rd16(bios, init->offset + 5); in init_pll_indirect()
1313 trace("PLL_INDIRECT\tR[0x%06x] =PLL= VBIOS[%04x] = %dkHz\n", in init_pll_indirect()
1315 init->offset += 7; in init_pll_indirect()
1321 * INIT_ZM_REG_INDIRECT - opcode 0x5a
1327 struct nvkm_bios *bios = init->subdev->device->bios; in init_zm_reg_indirect()
1328 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_zm_reg_indirect()
1329 u16 addr = nvbios_rd16(bios, init->offset + 5); in init_zm_reg_indirect()
1332 trace("ZM_REG_INDIRECT\tR[0x%06x] = VBIOS[0x%04x] = 0x%08x\n", in init_zm_reg_indirect()
1334 init->offset += 7; in init_zm_reg_indirect()
1340 * INIT_SUB_DIRECT - opcode 0x5b
1346 struct nvkm_bios *bios = init->subdev->device->bios; in init_sub_direct()
1347 u16 addr = nvbios_rd16(bios, init->offset + 1); in init_sub_direct()
1350 trace("SUB_DIRECT\t0x%04x\n", addr); in init_sub_direct()
1353 save = init->offset; in init_sub_direct()
1354 init->offset = addr; in init_sub_direct()
1356 error("error parsing sub-table\n"); in init_sub_direct()
1359 init->offset = save; in init_sub_direct()
1362 init->offset += 3; in init_sub_direct()
1366 * INIT_JUMP - opcode 0x5c
1372 struct nvkm_bios *bios = init->subdev->device->bios; in init_jump()
1373 u16 offset = nvbios_rd16(bios, init->offset + 1); in init_jump() local
1375 trace("JUMP\t0x%04x\n", offset); in init_jump()
1378 init->offset = offset; in init_jump()
1380 init->offset += 3; in init_jump()
1384 * INIT_I2C_IF - opcode 0x5e
1390 struct nvkm_bios *bios = init->subdev->device->bios; in init_i2c_if()
1391 u8 index = nvbios_rd08(bios, init->offset + 1); in init_i2c_if()
1392 u8 addr = nvbios_rd08(bios, init->offset + 2); in init_i2c_if()
1393 u8 reg = nvbios_rd08(bios, init->offset + 3); in init_i2c_if()
1394 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_i2c_if()
1395 u8 data = nvbios_rd08(bios, init->offset + 5); in init_i2c_if()
1398 trace("I2C_IF\tI2C[0x%02x][0x%02x][0x%02x] & 0x%02x == 0x%02x\n", in init_i2c_if()
1400 init->offset += 6; in init_i2c_if()
1411 * INIT_COPY_NV_REG - opcode 0x5f
1417 struct nvkm_bios *bios = init->subdev->device->bios; in init_copy_nv_reg()
1418 u32 sreg = nvbios_rd32(bios, init->offset + 1); in init_copy_nv_reg()
1419 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_copy_nv_reg()
1420 u32 smask = nvbios_rd32(bios, init->offset + 6); in init_copy_nv_reg()
1421 u32 sxor = nvbios_rd32(bios, init->offset + 10); in init_copy_nv_reg()
1422 u32 dreg = nvbios_rd32(bios, init->offset + 14); in init_copy_nv_reg()
1423 u32 dmask = nvbios_rd32(bios, init->offset + 18); in init_copy_nv_reg()
1426 trace("COPY_NV_REG\tR[0x%06x] &= 0x%08x |= " in init_copy_nv_reg()
1427 "((R[0x%06x] %s 0x%02x) & 0x%08x ^ 0x%08x)\n", in init_copy_nv_reg()
1429 (shift & 0x80) ? (0x100 - shift) : shift, smask, sxor); in init_copy_nv_reg()
1430 init->offset += 22; in init_copy_nv_reg()
1437 * INIT_ZM_INDEX_IO - opcode 0x62
1443 struct nvkm_bios *bios = init->subdev->device->bios; in init_zm_index_io()
1444 u16 port = nvbios_rd16(bios, init->offset + 1); in init_zm_index_io()
1445 u8 index = nvbios_rd08(bios, init->offset + 3); in init_zm_index_io()
1446 u8 data = nvbios_rd08(bios, init->offset + 4); in init_zm_index_io()
1448 trace("ZM_INDEX_IO\tI[0x%04x][0x%02x] = 0x%02x\n", port, index, data); in init_zm_index_io()
1449 init->offset += 5; in init_zm_index_io()
1455 * INIT_COMPUTE_MEM - opcode 0x63
1461 struct nvkm_devinit *devinit = init->subdev->device->devinit; in init_compute_mem()
1464 init->offset += 1; in init_compute_mem()
1473 * INIT_RESET - opcode 0x65
1479 struct nvkm_bios *bios = init->subdev->device->bios; in init_reset()
1480 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_reset()
1481 u32 data1 = nvbios_rd32(bios, init->offset + 5); in init_reset()
1482 u32 data2 = nvbios_rd32(bios, init->offset + 9); in init_reset()
1485 trace("RESET\tR[0x%08x] = 0x%08x, 0x%08x", reg, data1, data2); in init_reset()
1486 init->offset += 13; in init_reset()
1500 * INIT_CONFIGURE_MEM - opcode 0x66
1506 u16 mdata = bmp_mem_init_table(init->subdev->device->bios); in init_configure_mem_clk()
1515 struct nvkm_bios *bios = init->subdev->device->bios; in init_configure_mem()
1520 init->offset += 1; in init_configure_mem()
1522 if (bios->version.major > 2) { in init_configure_mem()
1559 * INIT_CONFIGURE_CLK - opcode 0x67
1565 struct nvkm_bios *bios = init->subdev->device->bios; in init_configure_clk()
1569 init->offset += 1; in init_configure_clk()
1571 if (bios->version.major > 2) { in init_configure_clk()
1593 * INIT_CONFIGURE_PREINIT - opcode 0x68
1599 struct nvkm_bios *bios = init->subdev->device->bios; in init_configure_preinit()
1603 init->offset += 1; in init_configure_preinit()
1605 if (bios->version.major > 2) { in init_configure_preinit()
1619 * INIT_IO - opcode 0x69
1625 struct nvkm_bios *bios = init->subdev->device->bios; in init_io()
1626 u16 port = nvbios_rd16(bios, init->offset + 1); in init_io()
1627 u8 mask = nvbios_rd16(bios, init->offset + 3); in init_io()
1628 u8 data = nvbios_rd16(bios, init->offset + 4); in init_io()
1631 trace("IO\t\tI[0x%04x] &= 0x%02x |= 0x%02x\n", port, mask, data); in init_io()
1632 init->offset += 5; in init_io()
1638 if (bios->subdev.device->card_type >= NV_50 && in init_io()
1659 * INIT_SUB - opcode 0x6b
1665 struct nvkm_bios *bios = init->subdev->device->bios; in init_sub()
1666 u8 index = nvbios_rd08(bios, init->offset + 1); in init_sub()
1669 trace("SUB\t0x%02x\n", index); in init_sub()
1673 save = init->offset; in init_sub()
1674 init->offset = addr; in init_sub()
1676 error("error parsing sub-table\n"); in init_sub()
1679 init->offset = save; in init_sub()
1682 init->offset += 2; in init_sub()
1686 * INIT_RAM_CONDITION - opcode 0x6d
1692 struct nvkm_bios *bios = init->subdev->device->bios; in init_ram_condition()
1693 u8 mask = nvbios_rd08(bios, init->offset + 1); in init_ram_condition()
1694 u8 value = nvbios_rd08(bios, init->offset + 2); in init_ram_condition()
1697 "(R[0x100000] & 0x%02x) == 0x%02x\n", mask, value); in init_ram_condition()
1698 init->offset += 3; in init_ram_condition()
1705 * INIT_NV_REG - opcode 0x6e
1711 struct nvkm_bios *bios = init->subdev->device->bios; in init_nv_reg()
1712 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_nv_reg()
1713 u32 mask = nvbios_rd32(bios, init->offset + 5); in init_nv_reg()
1714 u32 data = nvbios_rd32(bios, init->offset + 9); in init_nv_reg()
1716 trace("NV_REG\tR[0x%06x] &= 0x%08x |= 0x%08x\n", reg, mask, data); in init_nv_reg()
1717 init->offset += 13; in init_nv_reg()
1723 * INIT_MACRO - opcode 0x6f
1729 struct nvkm_bios *bios = init->subdev->device->bios; in init_macro()
1730 u8 macro = nvbios_rd08(bios, init->offset + 1); in init_macro()
1733 trace("MACRO\t0x%02x\n", macro); in init_macro()
1739 trace("\t\tR[0x%06x] = 0x%08x\n", addr, data); in init_macro()
1743 init->offset += 2; in init_macro()
1747 * INIT_RESUME - opcode 0x72
1754 init->offset += 1; in init_resume()
1759 * INIT_STRAP_CONDITION - opcode 0x73
1765 struct nvkm_bios *bios = init->subdev->device->bios; in init_strap_condition()
1766 u32 mask = nvbios_rd32(bios, init->offset + 1); in init_strap_condition()
1767 u32 value = nvbios_rd32(bios, init->offset + 5); in init_strap_condition()
1769 trace("STRAP_CONDITION\t(R[0x101000] & 0x%08x) == 0x%08x\n", mask, value); in init_strap_condition()
1770 init->offset += 9; in init_strap_condition()
1777 * INIT_TIME - opcode 0x74
1783 struct nvkm_bios *bios = init->subdev->device->bios; in init_time()
1784 u16 usec = nvbios_rd16(bios, init->offset + 1); in init_time()
1786 trace("TIME\t0x%04x\n", usec); in init_time()
1787 init->offset += 3; in init_time()
1798 * INIT_CONDITION - opcode 0x75
1804 struct nvkm_bios *bios = init->subdev->device->bios; in init_condition()
1805 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_condition()
1807 trace("CONDITION\t0x%02x\n", cond); in init_condition()
1808 init->offset += 2; in init_condition()
1815 * INIT_IO_CONDITION - opcode 0x76
1821 struct nvkm_bios *bios = init->subdev->device->bios; in init_io_condition()
1822 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_io_condition()
1824 trace("IO_CONDITION\t0x%02x\n", cond); in init_io_condition()
1825 init->offset += 2; in init_io_condition()
1832 * INIT_ZM_REG16 - opcode 0x77
1838 struct nvkm_bios *bios = init->subdev->device->bios; in init_zm_reg16()
1839 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_reg16()
1840 u16 data = nvbios_rd16(bios, init->offset + 5); in init_zm_reg16()
1842 trace("ZM_REG\tR[0x%06x] = 0x%04x\n", addr, data); in init_zm_reg16()
1843 init->offset += 7; in init_zm_reg16()
1849 * INIT_INDEX_IO - opcode 0x78
1855 struct nvkm_bios *bios = init->subdev->device->bios; in init_index_io()
1856 u16 port = nvbios_rd16(bios, init->offset + 1); in init_index_io()
1857 u8 index = nvbios_rd16(bios, init->offset + 3); in init_index_io()
1858 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_index_io()
1859 u8 data = nvbios_rd08(bios, init->offset + 5); in init_index_io()
1862 trace("INDEX_IO\tI[0x%04x][0x%02x] &= 0x%02x |= 0x%02x\n", in init_index_io()
1864 init->offset += 6; in init_index_io()
1871 * INIT_PLL - opcode 0x79
1877 struct nvkm_bios *bios = init->subdev->device->bios; in init_pll()
1878 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_pll()
1879 u32 freq = nvbios_rd16(bios, init->offset + 5) * 10; in init_pll()
1881 trace("PLL\tR[0x%06x] =PLL= %dkHz\n", reg, freq); in init_pll()
1882 init->offset += 7; in init_pll()
1888 * INIT_ZM_REG - opcode 0x7a
1894 struct nvkm_bios *bios = init->subdev->device->bios; in init_zm_reg()
1895 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_reg()
1896 u32 data = nvbios_rd32(bios, init->offset + 5); in init_zm_reg()
1898 trace("ZM_REG\tR[0x%06x] = 0x%08x\n", addr, data); in init_zm_reg()
1899 init->offset += 9; in init_zm_reg()
1908 * INIT_RAM_RESTRICT_PLL - opcde 0x87
1914 struct nvkm_bios *bios = init->subdev->device->bios; in init_ram_restrict_pll()
1915 u8 type = nvbios_rd08(bios, init->offset + 1); in init_ram_restrict_pll()
1920 trace("RAM_RESTRICT_PLL\t0x%02x\n", type); in init_ram_restrict_pll()
1921 init->offset += 2; in init_ram_restrict_pll()
1924 u32 freq = nvbios_rd32(bios, init->offset); in init_ram_restrict_pll()
1933 init->offset += 4; in init_ram_restrict_pll()
1938 * INIT_RESET_BEGUN - opcode 0x8c
1945 init->offset += 1; in init_reset_begun()
1949 * INIT_RESET_END - opcode 0x8d
1956 init->offset += 1; in init_reset_end()
1960 * INIT_GPIO - opcode 0x8e
1966 struct nvkm_gpio *gpio = init->subdev->device->gpio; in init_gpio()
1969 init->offset += 1; in init_gpio()
1976 * INIT_RAM_RESTRICT_ZM_GROUP - opcode 0x8f
1982 struct nvkm_bios *bios = init->subdev->device->bios; in init_ram_restrict_zm_reg_group()
1983 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_ram_restrict_zm_reg_group()
1984 u8 incr = nvbios_rd08(bios, init->offset + 5); in init_ram_restrict_zm_reg_group()
1985 u8 num = nvbios_rd08(bios, init->offset + 6); in init_ram_restrict_zm_reg_group()
1991 "R[0x%08x] 0x%02x 0x%02x\n", addr, incr, num); in init_ram_restrict_zm_reg_group()
1992 init->offset += 7; in init_ram_restrict_zm_reg_group()
1995 trace("\tR[0x%06x] = {\n", addr); in init_ram_restrict_zm_reg_group()
1997 u32 data = nvbios_rd32(bios, init->offset); in init_ram_restrict_zm_reg_group()
2000 trace("\t\t0x%08x *\n", data); in init_ram_restrict_zm_reg_group()
2003 trace("\t\t0x%08x\n", data); in init_ram_restrict_zm_reg_group()
2006 init->offset += 4; in init_ram_restrict_zm_reg_group()
2014 * INIT_COPY_ZM_REG - opcode 0x90
2020 struct nvkm_bios *bios = init->subdev->device->bios; in init_copy_zm_reg()
2021 u32 sreg = nvbios_rd32(bios, init->offset + 1); in init_copy_zm_reg()
2022 u32 dreg = nvbios_rd32(bios, init->offset + 5); in init_copy_zm_reg()
2024 trace("COPY_ZM_REG\tR[0x%06x] = R[0x%06x]\n", dreg, sreg); in init_copy_zm_reg()
2025 init->offset += 9; in init_copy_zm_reg()
2031 * INIT_ZM_REG_GROUP - opcode 0x91
2037 struct nvkm_bios *bios = init->subdev->device->bios; in init_zm_reg_group()
2038 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_reg_group()
2039 u8 count = nvbios_rd08(bios, init->offset + 5); in init_zm_reg_group()
2041 trace("ZM_REG_GROUP\tR[0x%06x] =\n", addr); in init_zm_reg_group()
2042 init->offset += 6; in init_zm_reg_group()
2044 while (count--) { in init_zm_reg_group()
2045 u32 data = nvbios_rd32(bios, init->offset); in init_zm_reg_group()
2046 trace("\t0x%08x\n", data); in init_zm_reg_group()
2048 init->offset += 4; in init_zm_reg_group()
2053 * INIT_XLAT - opcode 0x96
2059 struct nvkm_bios *bios = init->subdev->device->bios; in init_xlat()
2060 u32 saddr = nvbios_rd32(bios, init->offset + 1); in init_xlat()
2061 u8 sshift = nvbios_rd08(bios, init->offset + 5); in init_xlat()
2062 u8 smask = nvbios_rd08(bios, init->offset + 6); in init_xlat()
2063 u8 index = nvbios_rd08(bios, init->offset + 7); in init_xlat()
2064 u32 daddr = nvbios_rd32(bios, init->offset + 8); in init_xlat()
2065 u32 dmask = nvbios_rd32(bios, init->offset + 12); in init_xlat()
2066 u8 shift = nvbios_rd08(bios, init->offset + 16); in init_xlat()
2069 trace("INIT_XLAT\tR[0x%06x] &= 0x%08x |= " in init_xlat()
2070 "(X%02x((R[0x%06x] %s 0x%02x) & 0x%02x) << 0x%02x)\n", in init_xlat()
2072 (sshift & 0x80) ? (0x100 - sshift) : sshift, smask, shift); in init_xlat()
2073 init->offset += 17; in init_xlat()
2081 * INIT_ZM_MASK_ADD - opcode 0x97
2087 struct nvkm_bios *bios = init->subdev->device->bios; in init_zm_mask_add()
2088 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_mask_add()
2089 u32 mask = nvbios_rd32(bios, init->offset + 5); in init_zm_mask_add()
2090 u32 add = nvbios_rd32(bios, init->offset + 9); in init_zm_mask_add()
2093 trace("ZM_MASK_ADD\tR[0x%06x] &= 0x%08x += 0x%08x\n", addr, mask, add); in init_zm_mask_add()
2094 init->offset += 13; in init_zm_mask_add()
2102 * INIT_AUXCH - opcode 0x98
2108 struct nvkm_bios *bios = init->subdev->device->bios; in init_auxch()
2109 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_auxch()
2110 u8 count = nvbios_rd08(bios, init->offset + 5); in init_auxch()
2112 trace("AUXCH\tAUX[0x%08x] 0x%02x\n", addr, count); in init_auxch()
2113 init->offset += 6; in init_auxch()
2115 while (count--) { in init_auxch()
2116 u8 mask = nvbios_rd08(bios, init->offset + 0); in init_auxch()
2117 u8 data = nvbios_rd08(bios, init->offset + 1); in init_auxch()
2118 trace("\tAUX[0x%08x] &= 0x%02x |= 0x%02x\n", addr, mask, data); in init_auxch()
2121 init->offset += 2; in init_auxch()
2126 * INIT_AUXCH - opcode 0x99
2132 struct nvkm_bios *bios = init->subdev->device->bios; in init_zm_auxch()
2133 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_auxch()
2134 u8 count = nvbios_rd08(bios, init->offset + 5); in init_zm_auxch()
2136 trace("ZM_AUXCH\tAUX[0x%08x] 0x%02x\n", addr, count); in init_zm_auxch()
2137 init->offset += 6; in init_zm_auxch()
2139 while (count--) { in init_zm_auxch()
2140 u8 data = nvbios_rd08(bios, init->offset + 0); in init_zm_auxch()
2141 trace("\tAUX[0x%08x] = 0x%02x\n", addr, data); in init_zm_auxch()
2143 init->offset += 1; in init_zm_auxch()
2148 * INIT_I2C_LONG_IF - opcode 0x9a
2154 struct nvkm_bios *bios = init->subdev->device->bios; in init_i2c_long_if()
2155 u8 index = nvbios_rd08(bios, init->offset + 1); in init_i2c_long_if()
2156 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; in init_i2c_long_if()
2157 u8 reglo = nvbios_rd08(bios, init->offset + 3); in init_i2c_long_if()
2158 u8 reghi = nvbios_rd08(bios, init->offset + 4); in init_i2c_long_if()
2159 u8 mask = nvbios_rd08(bios, init->offset + 5); in init_i2c_long_if()
2160 u8 data = nvbios_rd08(bios, init->offset + 6); in init_i2c_long_if()
2164 "I2C[0x%02x][0x%02x][0x%02x%02x] & 0x%02x == 0x%02x\n", in init_i2c_long_if()
2166 init->offset += 7; in init_i2c_long_if()
2187 * INIT_GPIO_NE - opcode 0xa9
2193 struct nvkm_bios *bios = init->subdev->device->bios; in init_gpio_ne()
2194 struct nvkm_gpio *gpio = bios->subdev.device->gpio; in init_gpio_ne()
2196 u8 count = nvbios_rd08(bios, init->offset + 1); in init_gpio_ne()
2201 init->offset += 2; in init_gpio_ne()
2203 for (i = init->offset; i < init->offset + count; i++) in init_gpio_ne()
2204 cont("0x%02x ", nvbios_rd08(bios, i)); in init_gpio_ne()
2209 for (i = init->offset; i < init->offset + count; i++) { in init_gpio_ne()
2214 trace("\tFUNC[0x%02x]", func.func); in init_gpio_ne()
2215 if (i == (init->offset + count)) { in init_gpio_ne()
2224 init->offset += count; in init_gpio_ne()
2304 struct nvkm_bios *bios = init->subdev->device->bios; in nvbios_exec()
2306 init->nested++; in nvbios_exec()
2307 while (init->offset) { in nvbios_exec()
2308 u8 opcode = nvbios_rd08(bios, init->offset); in nvbios_exec()
2311 error("unknown opcode 0x%02x\n", opcode); in nvbios_exec()
2312 return -EINVAL; in nvbios_exec()
2317 init->nested--; in nvbios_exec()
2324 struct nvkm_bios *bios = subdev->device->bios; in nvbios_post()
2326 int i = -1; in nvbios_post()