109 	nvkm_wr32(device, NV20_PGRAPH_CHANNEL_CTX_TABLE,  in nv30_gr_init()
112 	nvkm_wr32(device, NV03_PGRAPH_INTR   , 0xFFFFFFFF);  in nv30_gr_init()
113 	nvkm_wr32(device, NV03_PGRAPH_INTR_EN, 0xFFFFFFFF);  in nv30_gr_init()
115 	nvkm_wr32(device, NV04_PGRAPH_DEBUG_0, 0xFFFFFFFF);  in nv30_gr_init()
116 	nvkm_wr32(device, NV04_PGRAPH_DEBUG_0, 0x00000000);  in nv30_gr_init()
117 	nvkm_wr32(device, NV04_PGRAPH_DEBUG_1, 0x401287c0);  in nv30_gr_init()
118 	nvkm_wr32(device, 0x400890, 0x01b463ff);  in nv30_gr_init()
119 	nvkm_wr32(device, NV04_PGRAPH_DEBUG_3, 0xf2de0475);  in nv30_gr_init()
120 	nvkm_wr32(device, NV10_PGRAPH_DEBUG_4, 0x00008000);  in nv30_gr_init()
121 	nvkm_wr32(device, NV04_PGRAPH_LIMIT_VIOL_PIX, 0xf04bdff6);  in nv30_gr_init()
122 	nvkm_wr32(device, 0x400B80, 0x1003d888);  in nv30_gr_init()
123 	nvkm_wr32(device, 0x400B84, 0x0c000000);  in nv30_gr_init()
124 	nvkm_wr32(device, 0x400098, 0x00000000);  in nv30_gr_init()
125 	nvkm_wr32(device, 0x40009C, 0x0005ad00);  in nv30_gr_init()
126 	nvkm_wr32(device, 0x400B88, 0x62ff00ff); /* suspiciously like PGRAPH_DEBUG_2 */  in nv30_gr_init()
127 	nvkm_wr32(device, 0x4000a0, 0x00000000);  in nv30_gr_init()
128 	nvkm_wr32(device, 0x4000a4, 0x00000008);  in nv30_gr_init()
129 	nvkm_wr32(device, 0x4008a8, 0xb784a400);  in nv30_gr_init()
130 	nvkm_wr32(device, 0x400ba0, 0x002f8685);  in nv30_gr_init()
131 	nvkm_wr32(device, 0x400ba4, 0x00231f3f);  in nv30_gr_init()
132 	nvkm_wr32(device, 0x4008a4, 0x40000020);  in nv30_gr_init()
135 		nvkm_wr32(device, NV10_PGRAPH_RDI_INDEX, 0x00EA0004);  in nv30_gr_init()
136 		nvkm_wr32(device, NV10_PGRAPH_RDI_DATA , 0x00200201);  in nv30_gr_init()
137 		nvkm_wr32(device, NV10_PGRAPH_RDI_INDEX, 0x00EA0008);  in nv30_gr_init()
138 		nvkm_wr32(device, NV10_PGRAPH_RDI_DATA , 0x00000008);  in nv30_gr_init()
139 		nvkm_wr32(device, NV10_PGRAPH_RDI_INDEX, 0x00EA0000);  in nv30_gr_init()
140 		nvkm_wr32(device, NV10_PGRAPH_RDI_DATA , 0x00000032);  in nv30_gr_init()
141 		nvkm_wr32(device, NV10_PGRAPH_RDI_INDEX, 0x00E00004);  in nv30_gr_init()
142 		nvkm_wr32(device, NV10_PGRAPH_RDI_DATA , 0x00000002);  in nv30_gr_init()
145 	nvkm_wr32(device, 0x4000c0, 0x00000016);  in nv30_gr_init()
147 	nvkm_wr32(device, NV10_PGRAPH_CTX_CONTROL, 0x10000100);  in nv30_gr_init()
148 	nvkm_wr32(device, NV10_PGRAPH_STATE      , 0xFFFFFFFF);  in nv30_gr_init()
149 	nvkm_wr32(device, 0x0040075c             , 0x00000001);  in nv30_gr_init()
153 	nvkm_wr32(device, 0x4009A4, nvkm_rd32(device, 0x100200));  in nv30_gr_init()
154 	nvkm_wr32(device, 0x4009A8, nvkm_rd32(device, 0x100204));  in nv30_gr_init()
156 		nvkm_wr32(device, 0x400750, 0x00EA0000);  in nv30_gr_init()
157 		nvkm_wr32(device, 0x400754, nvkm_rd32(device, 0x100200));  in nv30_gr_init()
158 		nvkm_wr32(device, 0x400750, 0x00EA0004);  in nv30_gr_init()
159 		nvkm_wr32(device, 0x400754, nvkm_rd32(device, 0x100204));  in nv30_gr_init()