30 gp102_gr_zbc_clear_stencil(struct gf100_gr *gr, int zbc)  in gp102_gr_zbc_clear_stencil()  argument
32 	struct nvkm_device *device = gr->base.engine.subdev.device;  in gp102_gr_zbc_clear_stencil()
36 	if (gr->zbc_stencil[zbc].format)  in gp102_gr_zbc_clear_stencil()
37 		nvkm_wr32(device, 0x41815c + zoff, gr->zbc_stencil[zbc].ds);  in gp102_gr_zbc_clear_stencil()
40 			  gr->zbc_stencil[zbc].format << ((znum % 4) * 7));  in gp102_gr_zbc_clear_stencil()
44 gp102_gr_zbc_stencil_get(struct gf100_gr *gr, int format,  in gp102_gr_zbc_stencil_get()  argument
47 	struct nvkm_ltc *ltc = gr->base.engine.subdev.device->ltc;  in gp102_gr_zbc_stencil_get()
51 		if (gr->zbc_stencil[i].format) {  in gp102_gr_zbc_stencil_get()
52 			if (gr->zbc_stencil[i].format != format)  in gp102_gr_zbc_stencil_get()
54 			if (gr->zbc_stencil[i].ds != ds)  in gp102_gr_zbc_stencil_get()
56 			if (gr->zbc_stencil[i].l2 != l2) {  in gp102_gr_zbc_stencil_get()
69 	gr->zbc_stencil[zbc].format = format;  in gp102_gr_zbc_stencil_get()
70 	gr->zbc_stencil[zbc].ds = ds;  in gp102_gr_zbc_stencil_get()
71 	gr->zbc_stencil[zbc].l2 = l2;  in gp102_gr_zbc_stencil_get()
73 	gr->func->zbc->clear_stencil(gr, zbc);  in gp102_gr_zbc_stencil_get()
86 gp102_gr_init_swdx_pes_mask(struct gf100_gr *gr)  in gp102_gr_init_swdx_pes_mask()  argument
88 	struct nvkm_device *device = gr->base.engine.subdev.device;  in gp102_gr_init_swdx_pes_mask()
91 	for (gpc = 0; gpc < gr->gpc_nr; gpc++) {  in gp102_gr_init_swdx_pes_mask()