156 gk20a_gr_wait_mem_scrubbing(struct gf100_gr *gr)  in gk20a_gr_wait_mem_scrubbing()  argument
158 	struct nvkm_subdev *subdev = &gr->base.engine.subdev;  in gk20a_gr_wait_mem_scrubbing()
181 gk20a_gr_set_hww_esr_report_mask(struct gf100_gr *gr)  in gk20a_gr_set_hww_esr_report_mask()  argument
183 	struct nvkm_device *device = gr->base.engine.subdev.device;  in gk20a_gr_set_hww_esr_report_mask()
189 gk20a_gr_init(struct gf100_gr *gr)  in gk20a_gr_init()  argument
191 	struct nvkm_device *device = gr->base.engine.subdev.device;  in gk20a_gr_init()
197 	gf100_gr_mmio(gr, gr->sw_nonctx);  in gk20a_gr_init()
199 	ret = gk20a_gr_wait_mem_scrubbing(gr);  in gk20a_gr_init()
203 	ret = gf100_gr_wait_idle(gr);  in gk20a_gr_init()
208 	if (gr->func->init_gpc_mmu)  in gk20a_gr_init()
209 		gr->func->init_gpc_mmu(gr);  in gk20a_gr_init()
215 	gr->func->init_zcull(gr);  in gk20a_gr_init()
217 	gr->func->init_rop_active_fbps(gr);  in gk20a_gr_init()
233 	if (gr->func->set_hww_esr_report_mask)  in gk20a_gr_init()
234 		gr->func->set_hww_esr_report_mask(gr);  in gk20a_gr_init()
238 	nvkm_wr32(device, 0x41ac94, (((1 << gr->tpc_total) - 1) & 0xff) << 16);  in gk20a_gr_init()
248 	gf100_gr_zbc_init(gr);  in gk20a_gr_init()
250 	return gf100_gr_init_ctxctl(gr);  in gk20a_gr_init()
277 gk20a_gr_load_net(struct gf100_gr *gr, const char *path, const char *name, int ver,  in gk20a_gr_load_net()  argument
284 	ret = nvkm_firmware_load_blob(&gr->base.engine.subdev, path, name, ver, &blob);  in gk20a_gr_load_net()
294 gk20a_gr_load_sw(struct gf100_gr *gr, const char *path, int ver)  in gk20a_gr_load_sw()  argument
296 	if (gk20a_gr_load_net(gr, path, "sw_nonctx", ver, gk20a_gr_av_to_init, &gr->sw_nonctx) ||  in gk20a_gr_load_sw()
297 	    gk20a_gr_load_net(gr, path, "sw_ctx", ver, gk20a_gr_aiv_to_init, &gr->sw_ctx) ||  in gk20a_gr_load_sw()
298 	    gk20a_gr_load_net(gr, path, "sw_bundle_init", ver, gk20a_gr_av_to_init, &gr->bundle) ||  in gk20a_gr_load_sw()
299 	    gk20a_gr_load_net(gr, path, "sw_method_init", ver, gk20a_gr_av_to_method, &gr->method))  in gk20a_gr_load_sw()
317 gk20a_gr_load(struct gf100_gr *gr, int ver, const struct gf100_gr_fwif *fwif)  in gk20a_gr_load()  argument
319 	struct nvkm_subdev *subdev = &gr->base.engine.subdev;  in gk20a_gr_load()
322 				    &gr->fecs.inst) ||  in gk20a_gr_load()
324 				    &gr->fecs.data) ||  in gk20a_gr_load()
326 				    &gr->gpccs.inst) ||  in gk20a_gr_load()
328 				    &gr->gpccs.data))  in gk20a_gr_load()
331 	gr->firmware = true;  in gk20a_gr_load()
333 	return gk20a_gr_load_sw(gr, "", ver);  in gk20a_gr_load()