Lines Matching refs:gr
49 gf100_gr_zbc_clear_color(struct gf100_gr *gr, int zbc) in gf100_gr_zbc_clear_color() argument
51 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_zbc_clear_color()
52 if (gr->zbc_color[zbc].format) { in gf100_gr_zbc_clear_color()
53 nvkm_wr32(device, 0x405804, gr->zbc_color[zbc].ds[0]); in gf100_gr_zbc_clear_color()
54 nvkm_wr32(device, 0x405808, gr->zbc_color[zbc].ds[1]); in gf100_gr_zbc_clear_color()
55 nvkm_wr32(device, 0x40580c, gr->zbc_color[zbc].ds[2]); in gf100_gr_zbc_clear_color()
56 nvkm_wr32(device, 0x405810, gr->zbc_color[zbc].ds[3]); in gf100_gr_zbc_clear_color()
58 nvkm_wr32(device, 0x405814, gr->zbc_color[zbc].format); in gf100_gr_zbc_clear_color()
64 gf100_gr_zbc_color_get(struct gf100_gr *gr, int format, in gf100_gr_zbc_color_get() argument
67 struct nvkm_ltc *ltc = gr->base.engine.subdev.device->ltc; in gf100_gr_zbc_color_get()
71 if (gr->zbc_color[i].format) { in gf100_gr_zbc_color_get()
72 if (gr->zbc_color[i].format != format) in gf100_gr_zbc_color_get()
74 if (memcmp(gr->zbc_color[i].ds, ds, sizeof( in gf100_gr_zbc_color_get()
75 gr->zbc_color[i].ds))) in gf100_gr_zbc_color_get()
77 if (memcmp(gr->zbc_color[i].l2, l2, sizeof( in gf100_gr_zbc_color_get()
78 gr->zbc_color[i].l2))) { in gf100_gr_zbc_color_get()
91 memcpy(gr->zbc_color[zbc].ds, ds, sizeof(gr->zbc_color[zbc].ds)); in gf100_gr_zbc_color_get()
92 memcpy(gr->zbc_color[zbc].l2, l2, sizeof(gr->zbc_color[zbc].l2)); in gf100_gr_zbc_color_get()
93 gr->zbc_color[zbc].format = format; in gf100_gr_zbc_color_get()
95 gr->func->zbc->clear_color(gr, zbc); in gf100_gr_zbc_color_get()
100 gf100_gr_zbc_clear_depth(struct gf100_gr *gr, int zbc) in gf100_gr_zbc_clear_depth() argument
102 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_zbc_clear_depth()
103 if (gr->zbc_depth[zbc].format) in gf100_gr_zbc_clear_depth()
104 nvkm_wr32(device, 0x405818, gr->zbc_depth[zbc].ds); in gf100_gr_zbc_clear_depth()
105 nvkm_wr32(device, 0x40581c, gr->zbc_depth[zbc].format); in gf100_gr_zbc_clear_depth()
111 gf100_gr_zbc_depth_get(struct gf100_gr *gr, int format, in gf100_gr_zbc_depth_get() argument
114 struct nvkm_ltc *ltc = gr->base.engine.subdev.device->ltc; in gf100_gr_zbc_depth_get()
118 if (gr->zbc_depth[i].format) { in gf100_gr_zbc_depth_get()
119 if (gr->zbc_depth[i].format != format) in gf100_gr_zbc_depth_get()
121 if (gr->zbc_depth[i].ds != ds) in gf100_gr_zbc_depth_get()
123 if (gr->zbc_depth[i].l2 != l2) { in gf100_gr_zbc_depth_get()
136 gr->zbc_depth[zbc].format = format; in gf100_gr_zbc_depth_get()
137 gr->zbc_depth[zbc].ds = ds; in gf100_gr_zbc_depth_get()
138 gr->zbc_depth[zbc].l2 = l2; in gf100_gr_zbc_depth_get()
140 gr->func->zbc->clear_depth(gr, zbc); in gf100_gr_zbc_depth_get()
163 struct gf100_gr *gr = gf100_gr(nvkm_gr(object->engine)); in gf100_fermi_mthd_zbc_color() local
190 ret = gf100_gr_zbc_color_get(gr, args->v0.format, in gf100_fermi_mthd_zbc_color()
209 struct gf100_gr *gr = gf100_gr(nvkm_gr(object->engine)); in gf100_fermi_mthd_zbc_depth() local
218 ret = gf100_gr_zbc_depth_get(gr, args->v0.format, in gf100_fermi_mthd_zbc_depth()
301 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_object_get() local
304 while (gr->func->sclass[c].oclass) { in gf100_gr_object_get()
306 *sclass = gr->func->sclass[index]; in gf100_gr_object_get()
324 struct gf100_gr *gr = chan->gr; in gf100_gr_chan_bind() local
327 ret = nvkm_gpuobj_new(gr->base.engine.subdev.device, gr->size, in gf100_gr_chan_bind()
333 for (i = 0; i < gr->size; i += 4) in gf100_gr_chan_bind()
334 nvkm_wo32(*pgpuobj, i, gr->data[i / 4]); in gf100_gr_chan_bind()
336 if (!gr->firmware) { in gf100_gr_chan_bind()
381 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_chan_new() local
384 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_chan_new()
390 chan->gr = gr; in gf100_gr_chan_new()
395 ret = nvkm_vmm_get(chan->vmm, 12, nvkm_memory_size(gr->pagepool), &chan->pagepool); in gf100_gr_chan_new()
399 ret = nvkm_memory_map(gr->pagepool, 0, chan->vmm, chan->pagepool, &args, sizeof(args)); in gf100_gr_chan_new()
404 ret = nvkm_vmm_get(chan->vmm, 12, nvkm_memory_size(gr->bundle_cb), &chan->bundle_cb); in gf100_gr_chan_new()
408 ret = nvkm_memory_map(gr->bundle_cb, 0, chan->vmm, chan->bundle_cb, &args, sizeof(args)); in gf100_gr_chan_new()
413 ret = nvkm_vmm_get(chan->vmm, 12, nvkm_memory_size(gr->attrib_cb), &chan->attrib_cb); in gf100_gr_chan_new()
418 ret = nvkm_memory_map(gr->attrib_cb, 0, chan->vmm, chan->attrib_cb, NULL, 0); in gf100_gr_chan_new()
422 ret = nvkm_memory_map(gr->attrib_cb, 0, chan->vmm, chan->attrib_cb, in gf100_gr_chan_new()
429 if (gr->func->grctx->unknown_size) { in gf100_gr_chan_new()
430 ret = nvkm_vmm_get(chan->vmm, 12, nvkm_memory_size(gr->unknown), &chan->unknown); in gf100_gr_chan_new()
434 ret = nvkm_memory_map(gr->unknown, 0, chan->vmm, chan->unknown, in gf100_gr_chan_new()
441 mutex_lock(&gr->fecs.mutex); in gf100_gr_chan_new()
442 if (gr->data == NULL) { in gf100_gr_chan_new()
443 ret = gf100_grctx_generate(gr, chan, fifoch->inst); in gf100_gr_chan_new()
449 mutex_unlock(&gr->fecs.mutex); in gf100_gr_chan_new()
471 gr->func->grctx->pagepool(chan, chan->pagepool->addr); in gf100_gr_chan_new()
472 gr->func->grctx->bundle(chan, chan->bundle_cb->addr, gr->func->grctx->bundle_size); in gf100_gr_chan_new()
473 gr->func->grctx->attrib_cb(chan, chan->attrib_cb->addr, gr->func->grctx->attrib_cb_size(gr)); in gf100_gr_chan_new()
474 gr->func->grctx->attrib(chan); in gf100_gr_chan_new()
475 if (gr->func->grctx->patch_ltc) in gf100_gr_chan_new()
476 gr->func->grctx->patch_ltc(chan); in gf100_gr_chan_new()
477 if (gr->func->grctx->unknown_size) in gf100_gr_chan_new()
478 gr->func->grctx->unknown(chan, chan->unknown->addr, gr->func->grctx->unknown_size); in gf100_gr_chan_new()
744 gf100_gr_ctxsw_inst(struct nvkm_gr *gr) in gf100_gr_ctxsw_inst() argument
746 return nvkm_rd32(gr->engine.subdev.device, 0x409b00); in gf100_gr_ctxsw_inst()
750 gf100_gr_fecs_ctrl_ctxsw(struct gf100_gr *gr, u32 mthd) in gf100_gr_fecs_ctrl_ctxsw() argument
752 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_fecs_ctrl_ctxsw()
772 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_fecs_start_ctxsw() local
775 mutex_lock(&gr->fecs.mutex); in gf100_gr_fecs_start_ctxsw()
776 if (!--gr->fecs.disable) { in gf100_gr_fecs_start_ctxsw()
777 if (WARN_ON(ret = gf100_gr_fecs_ctrl_ctxsw(gr, 0x39))) in gf100_gr_fecs_start_ctxsw()
778 gr->fecs.disable++; in gf100_gr_fecs_start_ctxsw()
780 mutex_unlock(&gr->fecs.mutex); in gf100_gr_fecs_start_ctxsw()
787 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_fecs_stop_ctxsw() local
790 mutex_lock(&gr->fecs.mutex); in gf100_gr_fecs_stop_ctxsw()
791 if (!gr->fecs.disable++) { in gf100_gr_fecs_stop_ctxsw()
792 if (WARN_ON(ret = gf100_gr_fecs_ctrl_ctxsw(gr, 0x38))) in gf100_gr_fecs_stop_ctxsw()
793 gr->fecs.disable--; in gf100_gr_fecs_stop_ctxsw()
795 mutex_unlock(&gr->fecs.mutex); in gf100_gr_fecs_stop_ctxsw()
800 gf100_gr_fecs_halt_pipeline(struct gf100_gr *gr) in gf100_gr_fecs_halt_pipeline() argument
804 if (gr->firmware) { in gf100_gr_fecs_halt_pipeline()
805 mutex_lock(&gr->fecs.mutex); in gf100_gr_fecs_halt_pipeline()
806 ret = gf100_gr_fecs_ctrl_ctxsw(gr, 0x04); in gf100_gr_fecs_halt_pipeline()
807 mutex_unlock(&gr->fecs.mutex); in gf100_gr_fecs_halt_pipeline()
814 gf100_gr_fecs_wfi_golden_save(struct gf100_gr *gr, u32 inst) in gf100_gr_fecs_wfi_golden_save() argument
816 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_fecs_wfi_golden_save()
833 gf100_gr_fecs_bind_pointer(struct gf100_gr *gr, u32 inst) in gf100_gr_fecs_bind_pointer() argument
835 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_fecs_bind_pointer()
852 gf100_gr_fecs_set_reglist_virtual_address(struct gf100_gr *gr, u64 addr) in gf100_gr_fecs_set_reglist_virtual_address() argument
854 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_fecs_set_reglist_virtual_address()
869 gf100_gr_fecs_set_reglist_bind_instance(struct gf100_gr *gr, u32 inst) in gf100_gr_fecs_set_reglist_bind_instance() argument
871 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_fecs_set_reglist_bind_instance()
886 gf100_gr_fecs_discover_reglist_image_size(struct gf100_gr *gr, u32 *psize) in gf100_gr_fecs_discover_reglist_image_size() argument
888 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_fecs_discover_reglist_image_size()
902 gf100_gr_fecs_elpg_bind(struct gf100_gr *gr) in gf100_gr_fecs_elpg_bind() argument
907 ret = gf100_gr_fecs_discover_reglist_image_size(gr, &size); in gf100_gr_fecs_elpg_bind()
916 ret = gf100_gr_fecs_set_reglist_bind_instance(gr, 0); in gf100_gr_fecs_elpg_bind()
920 return gf100_gr_fecs_set_reglist_virtual_address(gr, 0); in gf100_gr_fecs_elpg_bind()
924 gf100_gr_fecs_discover_pm_image_size(struct gf100_gr *gr, u32 *psize) in gf100_gr_fecs_discover_pm_image_size() argument
926 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_fecs_discover_pm_image_size()
940 gf100_gr_fecs_discover_zcull_image_size(struct gf100_gr *gr, u32 *psize) in gf100_gr_fecs_discover_zcull_image_size() argument
942 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_fecs_discover_zcull_image_size()
956 gf100_gr_fecs_discover_image_size(struct gf100_gr *gr, u32 *psize) in gf100_gr_fecs_discover_image_size() argument
958 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_fecs_discover_image_size()
972 gf100_gr_fecs_set_watchdog_timeout(struct gf100_gr *gr, u32 timeout) in gf100_gr_fecs_set_watchdog_timeout() argument
974 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_fecs_set_watchdog_timeout()
984 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_chsw_load() local
985 if (!gr->firmware) { in gf100_gr_chsw_load()
986 u32 trace = nvkm_rd32(gr->base.engine.subdev.device, 0x40981c); in gf100_gr_chsw_load()
990 u32 mthd = nvkm_rd32(gr->base.engine.subdev.device, 0x409808); in gf100_gr_chsw_load()
998 gf100_gr_rops(struct gf100_gr *gr) in gf100_gr_rops() argument
1000 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_rops()
1005 gf100_gr_zbc_init(struct gf100_gr *gr) in gf100_gr_zbc_init() argument
1015 struct nvkm_ltc *ltc = gr->base.engine.subdev.device->ltc; in gf100_gr_zbc_init()
1018 if (!gr->zbc_color[0].format) { in gf100_gr_zbc_init()
1019 gf100_gr_zbc_color_get(gr, 1, & zero[0], &zero[4]); c++; in gf100_gr_zbc_init()
1020 gf100_gr_zbc_color_get(gr, 2, & one[0], &one[4]); c++; in gf100_gr_zbc_init()
1021 gf100_gr_zbc_color_get(gr, 4, &f32_0[0], &f32_0[4]); c++; in gf100_gr_zbc_init()
1022 gf100_gr_zbc_color_get(gr, 4, &f32_1[0], &f32_1[4]); c++; in gf100_gr_zbc_init()
1023 gf100_gr_zbc_depth_get(gr, 1, 0x00000000, 0x00000000); d++; in gf100_gr_zbc_init()
1024 gf100_gr_zbc_depth_get(gr, 1, 0x3f800000, 0x3f800000); d++; in gf100_gr_zbc_init()
1025 if (gr->func->zbc->stencil_get) { in gf100_gr_zbc_init()
1026 gr->func->zbc->stencil_get(gr, 1, 0x00, 0x00); s++; in gf100_gr_zbc_init()
1027 gr->func->zbc->stencil_get(gr, 1, 0x01, 0x01); s++; in gf100_gr_zbc_init()
1028 gr->func->zbc->stencil_get(gr, 1, 0xff, 0xff); s++; in gf100_gr_zbc_init()
1033 gr->func->zbc->clear_color(gr, index); in gf100_gr_zbc_init()
1035 gr->func->zbc->clear_depth(gr, index); in gf100_gr_zbc_init()
1037 if (gr->func->zbc->clear_stencil) { in gf100_gr_zbc_init()
1039 gr->func->zbc->clear_stencil(gr, index); in gf100_gr_zbc_init()
1049 gf100_gr_wait_idle(struct gf100_gr *gr) in gf100_gr_wait_idle() argument
1051 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_wait_idle()
1064 ctxsw_active = nvkm_fifo_ctxsw_in_progress(&gr->base.engine); in gf100_gr_wait_idle()
1078 gf100_gr_mmio(struct gf100_gr *gr, const struct gf100_gr_pack *p) in gf100_gr_mmio() argument
1080 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_mmio()
1095 gf100_gr_icmd(struct gf100_gr *gr, const struct gf100_gr_pack *p) in gf100_gr_icmd() argument
1097 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_icmd()
1122 gf100_gr_wait_idle(gr); in gf100_gr_icmd()
1135 gf100_gr_mthd(struct gf100_gr *gr, const struct gf100_gr_pack *p) in gf100_gr_mthd() argument
1137 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_mthd()
1162 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_units() local
1165 cfg = (u32)gr->gpc_nr; in gf100_gr_units()
1166 cfg |= (u32)gr->tpc_total << 8; in gf100_gr_units()
1167 cfg |= (u64)gr->rop_nr << 32; in gf100_gr_units()
1234 gf100_gr_trap_gpc_rop(struct gf100_gr *gr, int gpc) in gf100_gr_trap_gpc_rop() argument
1236 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_trap_gpc_rop()
1295 gf100_gr_trap_mp(struct gf100_gr *gr, int gpc, int tpc) in gf100_gr_trap_mp() argument
1297 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_trap_mp()
1316 gf100_gr_trap_tpc(struct gf100_gr *gr, int gpc, int tpc) in gf100_gr_trap_tpc() argument
1318 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_trap_tpc()
1330 gr->func->trap_mp(gr, gpc, tpc); in gf100_gr_trap_tpc()
1361 gf100_gr_trap_gpc(struct gf100_gr *gr, int gpc) in gf100_gr_trap_gpc() argument
1363 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_trap_gpc()
1369 gf100_gr_trap_gpc_rop(gr, gpc); in gf100_gr_trap_gpc()
1394 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) { in gf100_gr_trap_gpc()
1397 gf100_gr_trap_tpc(gr, gpc, tpc); in gf100_gr_trap_gpc()
1409 gf100_gr_trap_intr(struct gf100_gr *gr) in gf100_gr_trap_intr() argument
1411 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_trap_intr()
1503 for (gpc = 0; stat && gpc < gr->gpc_nr; gpc++) { in gf100_gr_trap_intr()
1506 gf100_gr_trap_gpc(gr, gpc); in gf100_gr_trap_intr()
1516 for (rop = 0; rop < gr->rop_nr; rop++) { in gf100_gr_trap_intr()
1535 gf100_gr_ctxctl_debug_unit(struct gf100_gr *gr, u32 base) in gf100_gr_ctxctl_debug_unit() argument
1537 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_ctxctl_debug_unit()
1554 gf100_gr_ctxctl_debug(struct gf100_gr *gr) in gf100_gr_ctxctl_debug() argument
1556 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_ctxctl_debug()
1560 gf100_gr_ctxctl_debug_unit(gr, 0x409000); in gf100_gr_ctxctl_debug()
1562 gf100_gr_ctxctl_debug_unit(gr, 0x502000 + (gpc * 0x8000)); in gf100_gr_ctxctl_debug()
1566 gf100_gr_ctxctl_isr(struct gf100_gr *gr) in gf100_gr_ctxctl_isr() argument
1568 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_ctxctl_isr()
1572 if (!gr->firmware && (stat & 0x00000001)) { in gf100_gr_ctxctl_isr()
1591 if (!gr->firmware && (stat & 0x00080000)) { in gf100_gr_ctxctl_isr()
1593 gf100_gr_ctxctl_debug(gr); in gf100_gr_ctxctl_isr()
1600 gf100_gr_ctxctl_debug(gr); in gf100_gr_ctxctl_isr()
1608 struct gf100_gr *gr = container_of(inth, typeof(*gr), base.engine.subdev.inth); in gf100_gr_intr() local
1609 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_intr()
1624 chan = nvkm_chan_get_inst(&gr->base.engine, (u64)inst << 12, &flags); in gf100_gr_intr()
1677 gf100_gr_trap_intr(gr); in gf100_gr_intr()
1683 gf100_gr_ctxctl_isr(gr); in gf100_gr_intr()
1707 gf100_gr_init_csdata(struct gf100_gr *gr, in gf100_gr_init_csdata() argument
1711 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_csdata()
1750 gf100_gr_init_ctxctl_ext(struct gf100_gr *gr) in gf100_gr_init_ctxctl_ext() argument
1752 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_init_ctxctl_ext()
1763 gf100_gr_init_fw(&gr->fecs.falcon, &gr->fecs.inst, in gf100_gr_init_ctxctl_ext()
1764 &gr->fecs.data); in gf100_gr_init_ctxctl_ext()
1770 gf100_gr_init_fw(&gr->gpccs.falcon, &gr->gpccs.inst, in gf100_gr_init_ctxctl_ext()
1771 &gr->gpccs.data); in gf100_gr_init_ctxctl_ext()
1789 nvkm_falcon_start(&gr->gpccs.falcon); in gf100_gr_init_ctxctl_ext()
1790 nvkm_falcon_start(&gr->fecs.falcon); in gf100_gr_init_ctxctl_ext()
1798 gf100_gr_fecs_set_watchdog_timeout(gr, 0x7fffffff); in gf100_gr_init_ctxctl_ext()
1801 ret = gf100_gr_fecs_discover_image_size(gr, &gr->size); in gf100_gr_init_ctxctl_ext()
1806 ret = gf100_gr_fecs_discover_zcull_image_size(gr, &gr->size_zcull); in gf100_gr_init_ctxctl_ext()
1811 ret = gf100_gr_fecs_discover_pm_image_size(gr, &gr->size_pm); in gf100_gr_init_ctxctl_ext()
1822 ret = gf100_gr_fecs_elpg_bind(gr); in gf100_gr_init_ctxctl_ext()
1831 gf100_gr_init_ctxctl_int(struct gf100_gr *gr) in gf100_gr_init_ctxctl_int() argument
1833 const struct gf100_grctx_func *grctx = gr->func->grctx; in gf100_gr_init_ctxctl_int()
1834 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_init_ctxctl_int()
1837 if (!gr->func->fecs.ucode) { in gf100_gr_init_ctxctl_int()
1843 nvkm_falcon_load_dmem(&gr->fecs.falcon, in gf100_gr_init_ctxctl_int()
1844 gr->func->fecs.ucode->data.data, 0x0, in gf100_gr_init_ctxctl_int()
1845 gr->func->fecs.ucode->data.size, 0); in gf100_gr_init_ctxctl_int()
1846 nvkm_falcon_load_imem(&gr->fecs.falcon, in gf100_gr_init_ctxctl_int()
1847 gr->func->fecs.ucode->code.data, 0x0, in gf100_gr_init_ctxctl_int()
1848 gr->func->fecs.ucode->code.size, 0, 0, false); in gf100_gr_init_ctxctl_int()
1851 nvkm_falcon_load_dmem(&gr->gpccs.falcon, in gf100_gr_init_ctxctl_int()
1852 gr->func->gpccs.ucode->data.data, 0x0, in gf100_gr_init_ctxctl_int()
1853 gr->func->gpccs.ucode->data.size, 0); in gf100_gr_init_ctxctl_int()
1854 nvkm_falcon_load_imem(&gr->gpccs.falcon, in gf100_gr_init_ctxctl_int()
1855 gr->func->gpccs.ucode->code.data, 0x0, in gf100_gr_init_ctxctl_int()
1856 gr->func->gpccs.ucode->code.size, 0, 0, false); in gf100_gr_init_ctxctl_int()
1860 gf100_gr_init_csdata(gr, grctx->hub, 0x409000, 0x000, 0x000000); in gf100_gr_init_ctxctl_int()
1861 gf100_gr_init_csdata(gr, grctx->gpc_0, 0x41a000, 0x000, 0x418000); in gf100_gr_init_ctxctl_int()
1862 gf100_gr_init_csdata(gr, grctx->gpc_1, 0x41a000, 0x000, 0x418000); in gf100_gr_init_ctxctl_int()
1863 gf100_gr_init_csdata(gr, grctx->tpc, 0x41a000, 0x004, 0x419800); in gf100_gr_init_ctxctl_int()
1864 gf100_gr_init_csdata(gr, grctx->ppc, 0x41a000, 0x008, 0x41be00); in gf100_gr_init_ctxctl_int()
1873 gf100_gr_ctxctl_debug(gr); in gf100_gr_init_ctxctl_int()
1877 gr->size = nvkm_rd32(device, 0x409804); in gf100_gr_init_ctxctl_int()
1882 gf100_gr_init_ctxctl(struct gf100_gr *gr) in gf100_gr_init_ctxctl() argument
1886 if (gr->firmware) in gf100_gr_init_ctxctl()
1887 ret = gf100_gr_init_ctxctl_ext(gr); in gf100_gr_init_ctxctl()
1889 ret = gf100_gr_init_ctxctl_int(gr); in gf100_gr_init_ctxctl()
1895 gf100_gr_oneinit_sm_id(struct gf100_gr *gr) in gf100_gr_oneinit_sm_id() argument
1899 for (tpc = 0; tpc < gr->tpc_max; tpc++) { in gf100_gr_oneinit_sm_id()
1900 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf100_gr_oneinit_sm_id()
1901 if (tpc < gr->tpc_nr[gpc]) { in gf100_gr_oneinit_sm_id()
1902 gr->sm[gr->sm_nr].gpc = gpc; in gf100_gr_oneinit_sm_id()
1903 gr->sm[gr->sm_nr].tpc = tpc; in gf100_gr_oneinit_sm_id()
1904 gr->sm_nr++; in gf100_gr_oneinit_sm_id()
1913 gf100_gr_oneinit_tiles(struct gf100_gr *gr) in gf100_gr_oneinit_tiles() argument
1923 switch (gr->tpc_total) { in gf100_gr_oneinit_tiles()
1924 case 15: gr->screen_tile_row_offset = 0x06; break; in gf100_gr_oneinit_tiles()
1925 case 14: gr->screen_tile_row_offset = 0x05; break; in gf100_gr_oneinit_tiles()
1926 case 13: gr->screen_tile_row_offset = 0x02; break; in gf100_gr_oneinit_tiles()
1927 case 11: gr->screen_tile_row_offset = 0x07; break; in gf100_gr_oneinit_tiles()
1928 case 10: gr->screen_tile_row_offset = 0x06; break; in gf100_gr_oneinit_tiles()
1930 case 5: gr->screen_tile_row_offset = 0x01; break; in gf100_gr_oneinit_tiles()
1931 case 3: gr->screen_tile_row_offset = 0x02; break; in gf100_gr_oneinit_tiles()
1933 case 1: gr->screen_tile_row_offset = 0x01; break; in gf100_gr_oneinit_tiles()
1934 default: gr->screen_tile_row_offset = 0x03; in gf100_gr_oneinit_tiles()
1936 if (gr->tpc_total % primes[i]) { in gf100_gr_oneinit_tiles()
1937 gr->screen_tile_row_offset = primes[i]; in gf100_gr_oneinit_tiles()
1945 for (i = 0; i < gr->gpc_nr; i++) in gf100_gr_oneinit_tiles()
1950 for (sorted = true, i = 0; i < gr->gpc_nr - 1; i++) { in gf100_gr_oneinit_tiles()
1951 if (gr->tpc_nr[gpc_map[i + 1]] > in gf100_gr_oneinit_tiles()
1952 gr->tpc_nr[gpc_map[i + 0]]) { in gf100_gr_oneinit_tiles()
1962 mul_factor = gr->gpc_nr * gr->tpc_max; in gf100_gr_oneinit_tiles()
1968 comm_denom = gr->gpc_nr * gr->tpc_max * mul_factor; in gf100_gr_oneinit_tiles()
1970 for (i = 0; i < gr->gpc_nr; i++) { in gf100_gr_oneinit_tiles()
1971 init_frac[i] = gr->tpc_nr[gpc_map[i]] * gr->gpc_nr * mul_factor; in gf100_gr_oneinit_tiles()
1972 init_err[i] = i * gr->tpc_max * mul_factor - comm_denom/2; in gf100_gr_oneinit_tiles()
1976 for (i = 0; i < gr->tpc_total;) { in gf100_gr_oneinit_tiles()
1977 for (j = 0; j < gr->gpc_nr; j++) { in gf100_gr_oneinit_tiles()
1979 gr->tile[i++] = gpc_map[j]; in gf100_gr_oneinit_tiles()
1991 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_oneinit() local
1992 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_oneinit()
1998 if (gr->func->oneinit_intr) in gf100_gr_oneinit()
1999 intr = gr->func->oneinit_intr(gr, &intr_type); in gf100_gr_oneinit()
2001 ret = nvkm_inth_add(intr, intr_type, NVKM_INTR_PRIO_NORMAL, &gr->base.engine.subdev, in gf100_gr_oneinit()
2002 gf100_gr_intr, &gr->base.engine.subdev.inth); in gf100_gr_oneinit()
2008 gr->rop_nr = gr->func->rops(gr); in gf100_gr_oneinit()
2009 gr->gpc_nr = nvkm_rd32(device, 0x409604) & 0x0000001f; in gf100_gr_oneinit()
2010 for (i = 0; i < gr->gpc_nr; i++) { in gf100_gr_oneinit()
2011 gr->tpc_nr[i] = nvkm_rd32(device, GPC_UNIT(i, 0x2608)); in gf100_gr_oneinit()
2012 gr->tpc_max = max(gr->tpc_max, gr->tpc_nr[i]); in gf100_gr_oneinit()
2013 gr->tpc_total += gr->tpc_nr[i]; in gf100_gr_oneinit()
2014 for (j = 0; j < gr->func->ppc_nr; j++) { in gf100_gr_oneinit()
2015 gr->ppc_tpc_mask[i][j] = in gf100_gr_oneinit()
2017 if (gr->ppc_tpc_mask[i][j] == 0) in gf100_gr_oneinit()
2020 gr->ppc_nr[i]++; in gf100_gr_oneinit()
2022 gr->ppc_mask[i] |= (1 << j); in gf100_gr_oneinit()
2023 gr->ppc_tpc_nr[i][j] = hweight8(gr->ppc_tpc_mask[i][j]); in gf100_gr_oneinit()
2024 if (gr->ppc_tpc_min == 0 || in gf100_gr_oneinit()
2025 gr->ppc_tpc_min > gr->ppc_tpc_nr[i][j]) in gf100_gr_oneinit()
2026 gr->ppc_tpc_min = gr->ppc_tpc_nr[i][j]; in gf100_gr_oneinit()
2027 if (gr->ppc_tpc_max < gr->ppc_tpc_nr[i][j]) in gf100_gr_oneinit()
2028 gr->ppc_tpc_max = gr->ppc_tpc_nr[i][j]; in gf100_gr_oneinit()
2031 gr->ppc_total += gr->ppc_nr[i]; in gf100_gr_oneinit()
2036 gr->func->grctx->pagepool_size, 0x100, false, &gr->pagepool); in gf100_gr_oneinit()
2040 ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST_SR_LOST, gr->func->grctx->bundle_size, in gf100_gr_oneinit()
2041 0x100, false, &gr->bundle_cb); in gf100_gr_oneinit()
2046 gr->func->grctx->attrib_cb_size(gr), 0x1000, false, &gr->attrib_cb); in gf100_gr_oneinit()
2050 if (gr->func->grctx->unknown_size) { in gf100_gr_oneinit()
2051 ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, gr->func->grctx->unknown_size, in gf100_gr_oneinit()
2052 0x100, false, &gr->unknown); in gf100_gr_oneinit()
2057 memset(gr->tile, 0xff, sizeof(gr->tile)); in gf100_gr_oneinit()
2058 gr->func->oneinit_tiles(gr); in gf100_gr_oneinit()
2060 return gr->func->oneinit_sm_id(gr); in gf100_gr_oneinit()
2066 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_init_() local
2096 nvkm_pmu_pgob(gr->base.engine.subdev.device->pmu, false); in gf100_gr_init_()
2098 ret = nvkm_falcon_get(&gr->fecs.falcon, subdev); in gf100_gr_init_()
2102 ret = nvkm_falcon_get(&gr->gpccs.falcon, subdev); in gf100_gr_init_()
2106 ret = gr->func->init(gr); in gf100_gr_init_()
2117 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_fini() local
2118 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_fini()
2122 nvkm_falcon_put(&gr->gpccs.falcon, subdev); in gf100_gr_fini()
2123 nvkm_falcon_put(&gr->fecs.falcon, subdev); in gf100_gr_fini()
2130 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_dtor() local
2132 kfree(gr->data); in gf100_gr_dtor()
2134 nvkm_memory_unref(&gr->unknown); in gf100_gr_dtor()
2135 nvkm_memory_unref(&gr->attrib_cb); in gf100_gr_dtor()
2136 nvkm_memory_unref(&gr->bundle_cb); in gf100_gr_dtor()
2137 nvkm_memory_unref(&gr->pagepool); in gf100_gr_dtor()
2139 nvkm_falcon_dtor(&gr->gpccs.falcon); in gf100_gr_dtor()
2140 nvkm_falcon_dtor(&gr->fecs.falcon); in gf100_gr_dtor()
2142 nvkm_blob_dtor(&gr->fecs.inst); in gf100_gr_dtor()
2143 nvkm_blob_dtor(&gr->fecs.data); in gf100_gr_dtor()
2144 nvkm_blob_dtor(&gr->gpccs.inst); in gf100_gr_dtor()
2145 nvkm_blob_dtor(&gr->gpccs.data); in gf100_gr_dtor()
2147 vfree(gr->bundle64); in gf100_gr_dtor()
2148 vfree(gr->bundle_veid); in gf100_gr_dtor()
2149 vfree(gr->bundle); in gf100_gr_dtor()
2150 vfree(gr->method); in gf100_gr_dtor()
2151 vfree(gr->sw_ctx); in gf100_gr_dtor()
2152 vfree(gr->sw_nonctx); in gf100_gr_dtor()
2153 vfree(gr->sw_nonctx1); in gf100_gr_dtor()
2154 vfree(gr->sw_nonctx2); in gf100_gr_dtor()
2155 vfree(gr->sw_nonctx3); in gf100_gr_dtor()
2156 vfree(gr->sw_nonctx4); in gf100_gr_dtor()
2158 return gr; in gf100_gr_dtor()
2169 gf100_gr_init_num_tpc_per_gpc(struct gf100_gr *gr, bool pd, bool ds) in gf100_gr_init_num_tpc_per_gpc() argument
2171 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_num_tpc_per_gpc()
2176 for (data = 0, j = 0; j < 8 && gpc < gr->gpc_nr; j++, gpc++) in gf100_gr_init_num_tpc_per_gpc()
2177 data |= gr->tpc_nr[gpc] << (j * 4); in gf100_gr_init_num_tpc_per_gpc()
2186 gf100_gr_init_400054(struct gf100_gr *gr) in gf100_gr_init_400054() argument
2188 nvkm_wr32(gr->base.engine.subdev.device, 0x400054, 0x34ce3464); in gf100_gr_init_400054()
2192 gf100_gr_init_exception2(struct gf100_gr *gr) in gf100_gr_init_exception2() argument
2194 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_exception2()
2201 gf100_gr_init_rop_exceptions(struct gf100_gr *gr) in gf100_gr_init_rop_exceptions() argument
2203 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_rop_exceptions()
2206 for (rop = 0; rop < gr->rop_nr; rop++) { in gf100_gr_init_rop_exceptions()
2215 gf100_gr_init_shader_exceptions(struct gf100_gr *gr, int gpc, int tpc) in gf100_gr_init_shader_exceptions() argument
2217 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_shader_exceptions()
2223 gf100_gr_init_tex_hww_esr(struct gf100_gr *gr, int gpc, int tpc) in gf100_gr_init_tex_hww_esr() argument
2225 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_tex_hww_esr()
2230 gf100_gr_init_419eb4(struct gf100_gr *gr) in gf100_gr_init_419eb4() argument
2232 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_419eb4()
2237 gf100_gr_init_419cc0(struct gf100_gr *gr) in gf100_gr_init_419cc0() argument
2239 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_419cc0()
2244 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf100_gr_init_419cc0()
2245 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) in gf100_gr_init_419cc0()
2251 gf100_gr_init_40601c(struct gf100_gr *gr) in gf100_gr_init_40601c() argument
2253 nvkm_wr32(gr->base.engine.subdev.device, 0x40601c, 0xc0000000); in gf100_gr_init_40601c()
2257 gf100_gr_init_fecs_exceptions(struct gf100_gr *gr) in gf100_gr_init_fecs_exceptions() argument
2259 const u32 data = gr->firmware ? 0x000e0000 : 0x000e0001; in gf100_gr_init_fecs_exceptions()
2260 nvkm_wr32(gr->base.engine.subdev.device, 0x409c24, data); in gf100_gr_init_fecs_exceptions()
2264 gf100_gr_init_gpc_mmu(struct gf100_gr *gr) in gf100_gr_init_gpc_mmu() argument
2266 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_gpc_mmu()
2280 gf100_gr_init_num_active_ltcs(struct gf100_gr *gr) in gf100_gr_init_num_active_ltcs() argument
2282 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_num_active_ltcs()
2287 gf100_gr_init_zcull(struct gf100_gr *gr) in gf100_gr_init_zcull() argument
2289 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_zcull()
2290 const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); in gf100_gr_init_zcull()
2291 const u8 tile_nr = ALIGN(gr->tpc_total, 32); in gf100_gr_init_zcull()
2296 for (data = 0, j = 0; j < 8 && i + j < gr->tpc_total; j++) { in gf100_gr_init_zcull()
2297 data |= bank[gr->tile[i + j]] << (j * 4); in gf100_gr_init_zcull()
2298 bank[gr->tile[i + j]]++; in gf100_gr_init_zcull()
2303 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf100_gr_init_zcull()
2305 gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]); in gf100_gr_init_zcull()
2307 gr->tpc_total); in gf100_gr_init_zcull()
2315 gf100_gr_init_vsc_stream_master(struct gf100_gr *gr) in gf100_gr_init_vsc_stream_master() argument
2317 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_vsc_stream_master()
2326 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_reset() local
2330 WARN_ON(gf100_gr_fecs_halt_pipeline(gr)); in gf100_gr_reset()
2334 if (gr->func->gpccs.reset) in gf100_gr_reset()
2335 gr->func->gpccs.reset(gr); in gf100_gr_reset()
2342 gf100_gr_init(struct gf100_gr *gr) in gf100_gr_init() argument
2344 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init()
2349 gr->func->init_gpc_mmu(gr); in gf100_gr_init()
2351 if (gr->sw_nonctx1) { in gf100_gr_init()
2352 gf100_gr_mmio(gr, gr->sw_nonctx1); in gf100_gr_init()
2353 gf100_gr_mmio(gr, gr->sw_nonctx2); in gf100_gr_init()
2354 gf100_gr_mmio(gr, gr->sw_nonctx3); in gf100_gr_init()
2355 gf100_gr_mmio(gr, gr->sw_nonctx4); in gf100_gr_init()
2357 if (gr->sw_nonctx) { in gf100_gr_init()
2358 gf100_gr_mmio(gr, gr->sw_nonctx); in gf100_gr_init()
2360 gf100_gr_mmio(gr, gr->func->mmio); in gf100_gr_init()
2363 gf100_gr_wait_idle(gr); in gf100_gr_init()
2365 if (gr->func->init_r405a14) in gf100_gr_init()
2366 gr->func->init_r405a14(gr); in gf100_gr_init()
2368 if (gr->func->clkgate_pack) in gf100_gr_init()
2369 nvkm_therm_clkgate_init(device->therm, gr->func->clkgate_pack); in gf100_gr_init()
2371 if (gr->func->init_bios) in gf100_gr_init()
2372 gr->func->init_bios(gr); in gf100_gr_init()
2374 gr->func->init_vsc_stream_master(gr); in gf100_gr_init()
2375 gr->func->init_zcull(gr); in gf100_gr_init()
2376 gr->func->init_num_active_ltcs(gr); in gf100_gr_init()
2377 if (gr->func->init_rop_active_fbps) in gf100_gr_init()
2378 gr->func->init_rop_active_fbps(gr); in gf100_gr_init()
2379 if (gr->func->init_bios_2) in gf100_gr_init()
2380 gr->func->init_bios_2(gr); in gf100_gr_init()
2381 if (gr->func->init_swdx_pes_mask) in gf100_gr_init()
2382 gr->func->init_swdx_pes_mask(gr); in gf100_gr_init()
2383 if (gr->func->init_fs) in gf100_gr_init()
2384 gr->func->init_fs(gr); in gf100_gr_init()
2392 gr->func->init_fecs_exceptions(gr); in gf100_gr_init()
2394 if (gr->func->init_40a790) in gf100_gr_init()
2395 gr->func->init_40a790(gr); in gf100_gr_init()
2397 if (gr->func->init_ds_hww_esr_2) in gf100_gr_init()
2398 gr->func->init_ds_hww_esr_2(gr); in gf100_gr_init()
2404 if (gr->func->init_40601c) in gf100_gr_init()
2405 gr->func->init_40601c(gr); in gf100_gr_init()
2410 if (gr->func->init_sked_hww_esr) in gf100_gr_init()
2411 gr->func->init_sked_hww_esr(gr); in gf100_gr_init()
2416 if (gr->func->init_419cc0) in gf100_gr_init()
2417 gr->func->init_419cc0(gr); in gf100_gr_init()
2418 if (gr->func->init_419eb4) in gf100_gr_init()
2419 gr->func->init_419eb4(gr); in gf100_gr_init()
2420 if (gr->func->init_419c9c) in gf100_gr_init()
2421 gr->func->init_419c9c(gr); in gf100_gr_init()
2423 if (gr->func->init_ppc_exceptions) in gf100_gr_init()
2424 gr->func->init_ppc_exceptions(gr); in gf100_gr_init()
2426 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf100_gr_init()
2431 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) { in gf100_gr_init()
2434 if (gr->func->init_tex_hww_esr) in gf100_gr_init()
2435 gr->func->init_tex_hww_esr(gr, gpc, tpc); in gf100_gr_init()
2437 if (gr->func->init_504430) in gf100_gr_init()
2438 gr->func->init_504430(gr, gpc, tpc); in gf100_gr_init()
2439 gr->func->init_shader_exceptions(gr, gpc, tpc); in gf100_gr_init()
2445 gr->func->init_rop_exceptions(gr); in gf100_gr_init()
2451 if (gr->func->init_exception2) in gf100_gr_init()
2452 gr->func->init_exception2(gr); in gf100_gr_init()
2454 if (gr->func->init_400054) in gf100_gr_init()
2455 gr->func->init_400054(gr); in gf100_gr_init()
2457 gf100_gr_zbc_init(gr); in gf100_gr_init()
2459 if (gr->func->init_4188a4) in gf100_gr_init()
2460 gr->func->init_4188a4(gr); in gf100_gr_init()
2462 return gf100_gr_init_ctxctl(gr); in gf100_gr_init()
2466 gf100_gr_fecs_reset(struct gf100_gr *gr) in gf100_gr_fecs_reset() argument
2468 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_fecs_reset()
2500 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_nonstall() local
2502 if (gr->func->nonstall) in gf100_gr_nonstall()
2503 return gr->func->nonstall(gr); in gf100_gr_nonstall()
2561 gf100_gr_nofw(struct gf100_gr *gr, int ver, const struct gf100_gr_fwif *fwif) in gf100_gr_nofw() argument
2563 gr->firmware = false; in gf100_gr_nofw()
2568 gf100_gr_load_fw(struct gf100_gr *gr, const char *name, in gf100_gr_load_fw() argument
2571 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_load_fw()
2595 gf100_gr_load(struct gf100_gr *gr, int ver, const struct gf100_gr_fwif *fwif) in gf100_gr_load() argument
2597 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_load()
2602 if (gf100_gr_load_fw(gr, "fuc409c", &gr->fecs.inst) || in gf100_gr_load()
2603 gf100_gr_load_fw(gr, "fuc409d", &gr->fecs.data) || in gf100_gr_load()
2604 gf100_gr_load_fw(gr, "fuc41ac", &gr->gpccs.inst) || in gf100_gr_load()
2605 gf100_gr_load_fw(gr, "fuc41ad", &gr->gpccs.data)) in gf100_gr_load()
2608 gr->firmware = true; in gf100_gr_load()
2623 struct gf100_gr *gr; in gf100_gr_new_() local
2626 if (!(gr = kzalloc(sizeof(*gr), GFP_KERNEL))) in gf100_gr_new_()
2628 *pgr = &gr->base; in gf100_gr_new_()
2630 ret = nvkm_gr_ctor(&gf100_gr_, device, type, inst, true, &gr->base); in gf100_gr_new_()
2634 fwif = nvkm_firmware_load(&gr->base.engine.subdev, fwif, "Gr", gr); in gf100_gr_new_()
2638 gr->func = fwif->func; in gf100_gr_new_()
2640 ret = nvkm_falcon_ctor(&gf100_gr_flcn, &gr->base.engine.subdev, in gf100_gr_new_()
2641 "fecs", 0x409000, &gr->fecs.falcon); in gf100_gr_new_()
2645 mutex_init(&gr->fecs.mutex); in gf100_gr_new_()
2647 ret = nvkm_falcon_ctor(&gf100_gr_flcn, &gr->base.engine.subdev, in gf100_gr_new_()
2648 "gpccs", 0x41a000, &gr->gpccs.falcon); in gf100_gr_new_()