Lines Matching full:rm

69 	nvkm_gsp_rm_free(&chan->rm.object);  in r535_chan_ramfc_clear()
71 dma_free_coherent(fifo->engine.subdev.device->dev, fifo->rm.mthdbuf_size, in r535_chan_ramfc_clear()
72 chan->rm.mthdbuf.ptr, chan->rm.mthdbuf.addr); in r535_chan_ramfc_clear()
74 nvkm_cgrp_vctx_put(chan->cgrp, &chan->rm.grctx); in r535_chan_ramfc_clear()
105 chan->rm.mthdbuf.ptr = dma_alloc_coherent(fifo->engine.subdev.device->dev, in r535_chan_ramfc_write()
106 fifo->rm.mthdbuf_size, in r535_chan_ramfc_write()
107 &chan->rm.mthdbuf.addr, GFP_KERNEL); in r535_chan_ramfc_write()
108 if (!chan->rm.mthdbuf.ptr) in r535_chan_ramfc_write()
111 args = nvkm_gsp_rm_alloc_get(&chan->vmm->rm.device.object, 0xf1f00000 | chan->id, in r535_chan_ramfc_write()
113 &chan->rm.object); in r535_chan_ramfc_write()
146 args->hVASpace = chan->vmm->rm.object.handle; in r535_chan_ramfc_write()
164 args->mthdbufMem.base = chan->rm.mthdbuf.addr; in r535_chan_ramfc_write()
165 args->mthdbufMem.size = fifo->rm.mthdbuf_size; in r535_chan_ramfc_write()
176 ret = nvkm_gsp_rm_alloc_wr(&chan->rm.object, args); in r535_chan_ramfc_write()
186 ctrl = nvkm_gsp_rm_ctrl_get(&chan->rm.object, in r535_chan_ramfc_write()
193 ret = nvkm_gsp_rm_ctrl_wr(&chan->rm.object, ctrl); in r535_chan_ramfc_write()
198 ctrl = nvkm_gsp_rm_ctrl_get(&chan->rm.object, in r535_chan_ramfc_write()
204 ret = nvkm_gsp_rm_ctrl_wr(&chan->rm.object, ctrl); in r535_chan_ramfc_write()
366 /* RM requires GR context buffers to remain mapped until after the in r535_gr_ctor()
374 chan->rm.grctx = vctx; in r535_gr_ctor()
387 struct nvkm_gsp_client *client = &chan->vmm->rm.client; in r535_flcn_bind()
390 ctrl = nvkm_gsp_rm_ctrl_get(&chan->vmm->rm.device.subdevice, in r535_flcn_bind()
396 ctrl->hObject = chan->rm.object.handle; in r535_flcn_bind()
403 return nvkm_gsp_rm_ctrl_wr(&chan->vmm->rm.device.subdevice, ctrl); in r535_flcn_bind()
411 if (WARN_ON(!engn->rm.size)) in r535_flcn_ctor()
414 ret = nvkm_gpuobj_new(engn->engine->subdev.device, engn->rm.size, 0, true, NULL, in r535_flcn_ctor()
473 r535_fifo_engn_type(RM_ENGINE_TYPE rm, enum nvkm_subdev_type *ptype) in r535_fifo_engn_type() argument
475 switch (rm) { in r535_fifo_engn_type()
481 return rm - RM_ENGINE_TYPE_COPY0; in r535_fifo_engn_type()
484 return rm - RM_ENGINE_TYPE_NVDEC0; in r535_fifo_engn_type()
487 return rm - RM_ENGINE_TYPE_NVENC0; in r535_fifo_engn_type()
496 return rm - RM_ENGINE_TYPE_NVJPEG0; in r535_fifo_engn_type()
522 if (engn->rm.desc == ctrl->constructedFalconsTable[i].engDesc) { in r535_fifo_ectx_size()
523 engn->rm.size = in r535_fifo_ectx_size()
617 engn->rm.desc = ctrl->entries[i].engineData[ENGINE_INFO_TYPE_ENG_DESC]; in r535_fifo_runl_ctor()
631 fifo->rm.mthdbuf_size = ctrl->size; in r535_fifo_runl_ctor()
649 struct nvkm_fifo_func *rm; in r535_fifo_new() local
651 if (!(rm = kzalloc(sizeof(*rm), GFP_KERNEL))) in r535_fifo_new()
654 rm->dtor = r535_fifo_dtor; in r535_fifo_new()
655 rm->runl_ctor = r535_fifo_runl_ctor; in r535_fifo_new()
656 rm->runl = &r535_runl; in r535_fifo_new()
657 rm->cgrp = hw->cgrp; in r535_fifo_new()
658 rm->cgrp.func = &r535_cgrp; in r535_fifo_new()
659 rm->chan = hw->chan; in r535_fifo_new()
660 rm->chan.func = &r535_chan; in r535_fifo_new()
661 rm->nonstall = &ga100_fifo_nonstall; in r535_fifo_new()
662 rm->nonstall_ctor = ga100_fifo_nonstall_ctor; in r535_fifo_new()
664 return nvkm_fifo_new_(rm, device, type, inst, pfifo); in r535_fifo_new()