Lines Matching +full:0 +full:x1f000000
48 nvkm_wo32(memory, offset + 0, chan->id); in gm107_runl_insert_chan()
69 { 0x01, "DISPLAY" },
70 { 0x02, "CAPTURE" },
71 { 0x03, "IFB", NULL, NVKM_ENGINE_IFB },
72 { 0x04, "BAR1", NULL, NVKM_SUBDEV_BAR },
73 { 0x05, "BAR2", NULL, NVKM_SUBDEV_INSTMEM },
74 { 0x06, "SCHED" },
75 { 0x07, "HOST0" },
76 { 0x08, "HOST1" },
77 { 0x09, "HOST2" },
78 { 0x0a, "HOST3" },
79 { 0x0b, "HOST4" },
80 { 0x0c, "HOST5" },
81 { 0x0d, "HOST6" },
82 { 0x0e, "HOST7" },
83 { 0x0f, "HOSTSR" },
84 { 0x13, "PERF" },
85 { 0x17, "PMU" },
86 { 0x18, "PTP" },
104 u32 inst = nvkm_rd32(device, 0x002800 + (unit * 0x10)); in gm107_fifo_intr_mmu_fault_unit()
105 u32 valo = nvkm_rd32(device, 0x002804 + (unit * 0x10)); in gm107_fifo_intr_mmu_fault_unit()
106 u32 vahi = nvkm_rd32(device, 0x002808 + (unit * 0x10)); in gm107_fifo_intr_mmu_fault_unit()
107 u32 type = nvkm_rd32(device, 0x00280c + (unit * 0x10)); in gm107_fifo_intr_mmu_fault_unit()
112 info.time = 0; in gm107_fifo_intr_mmu_fault_unit()
115 info.gpc = (type & 0x1f000000) >> 24; in gm107_fifo_intr_mmu_fault_unit()
116 info.client = (type & 0x00003f00) >> 8; in gm107_fifo_intr_mmu_fault_unit()
117 info.access = (type & 0x00000080) >> 7; in gm107_fifo_intr_mmu_fault_unit()
118 info.hub = (type & 0x00000040) >> 6; in gm107_fifo_intr_mmu_fault_unit()
119 info.reason = (type & 0x0000000f); in gm107_fifo_intr_mmu_fault_unit()
147 .cgrp = {{ 0, 0, KEPLER_CHANNEL_GROUP_A }, &gk110_cgrp },
148 .chan = {{ 0, 0, KEPLER_CHANNEL_GPFIFO_B }, &gm107_chan },