Lines Matching full:sor
193 nv50_sor_clock(struct nvkm_ior *sor) in nv50_sor_clock() argument
195 struct nvkm_device *device = sor->disp->engine.subdev.device; in nv50_sor_clock()
196 const int div = sor->asy.link == 3; in nv50_sor_clock()
197 const u32 soff = nv50_ior_base(sor); in nv50_sor_clock()
212 nv50_sor_power(struct nvkm_ior *sor, bool normal, bool pu, bool data, bool vsync, bool hsync) in nv50_sor_power() argument
214 struct nvkm_device *device = sor->disp->engine.subdev.device; in nv50_sor_power()
215 const u32 soff = nv50_ior_base(sor); in nv50_sor_power()
231 nv50_sor_state(struct nvkm_ior *sor, struct nvkm_ior_state *state) in nv50_sor_state() argument
233 struct nvkm_device *device = sor->disp->engine.subdev.device; in nv50_sor_state()
234 const u32 coff = sor->id * 8 + (state == &sor->arm) * 4; in nv50_sor_state()
262 return nvkm_ior_new_(&nv50_sor, disp, SOR, id, false); in nv50_sor_new()
935 { "SOR", 2, &nv50_disp_core_mthd_sor },
1051 if (ior->type == SOR) { in nv50_disp_super_ied_on()
1286 if (outp && ior->type == SOR && ior->asy.proto == LVDS) { in nv50_disp_super_2_2()
1298 if (ior->type == SOR && ior->asy.proto == DP) in nv50_disp_super_2_2()
1548 /* ... SOR caps */ in nv50_disp_init()
1549 for (i = 0; i < disp->sor.nr; i++) { in nv50_disp_init()
1629 disp->sor.nr = func->sor.cnt(disp, &disp->sor.mask); in nv50_disp_oneinit()
1630 nvkm_debug(subdev, " SOR(s): %d (%02lx)\n", disp->sor.nr, disp->sor.mask); in nv50_disp_oneinit()
1631 for_each_set_bit(i, &disp->sor.mask, disp->sor.nr) { in nv50_disp_oneinit()
1632 ret = func->sor.new(disp, i); in nv50_disp_oneinit()
1751 /* Enforce identity-mapped SOR assignment for panels, which have in nv50_disp_oneinit()
1752 * certain bits (ie. backlight controls) wired to a specific SOR. in nv50_disp_oneinit()
1757 ior = nvkm_ior_find(disp, SOR, ffs(outp->info.or) - 1); in nv50_disp_oneinit()
1777 .sor = { .cnt = nv50_sor_cnt, .new = nv50_sor_new },