Lines Matching +full:mem +full:- +full:base
33 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_display_id()
39 PUSH_NVSQ(push, NVC57D, 0x2020 + (head->base.index * 0x400), display_id); in headc57d_display_id()
46 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_or()
47 const int i = head->base.index; in headc57d_or()
54 switch (asyh->or.depth) { in headc57d_or()
60 depth = asyh->or.depth; in headc57d_or()
69 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, CRC_MODE, asyh->or.crc_raster) | in headc57d_or()
70 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, HSYNC_POLARITY, asyh->or.nhsync) | in headc57d_or()
71 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, VSYNC_POLARITY, asyh->or.nvsync) | in headc57d_or()
81 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_procamp()
82 const int i = head->base.index; in headc57d_procamp()
99 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_olut_clr()
100 const int i = head->base.index; in headc57d_olut_clr()
113 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_olut_set()
114 const int i = head->base.index; in headc57d_olut_set()
121 NVVAL(NVC57D, HEAD_SET_OLUT_CONTROL, INTERPOLATE, asyh->olut.output_mode) | in headc57d_olut_set()
123 NVVAL(NVC57D, HEAD_SET_OLUT_CONTROL, MODE, asyh->olut.mode) | in headc57d_olut_set()
124 NVVAL(NVC57D, HEAD_SET_OLUT_CONTROL, SIZE, asyh->olut.size), in headc57d_olut_set()
127 HEAD_SET_CONTEXT_DMA_OLUT(i), asyh->olut.handle, in headc57d_olut_set()
128 HEAD_SET_OFFSET_OLUT(i), asyh->olut.offset >> 8); in headc57d_olut_set()
133 headc57d_olut_load_8(struct drm_color_lut *in, int size, void __iomem *mem) in headc57d_olut_load_8() argument
135 memset_io(mem, 0x00, 0x20); /* VSS header. */ in headc57d_olut_load_8()
136 mem += 0x20; in headc57d_olut_load_8()
138 while (size--) { in headc57d_olut_load_8()
139 u16 r = drm_color_lut_extract(in-> red + 0, 16); in headc57d_olut_load_8()
140 u16 g = drm_color_lut_extract(in->green + 0, 16); in headc57d_olut_load_8()
141 u16 b = drm_color_lut_extract(in-> blue + 0, 16); in headc57d_olut_load_8()
145 ri = (drm_color_lut_extract(in-> red, 16) - r) / 4; in headc57d_olut_load_8()
146 gi = (drm_color_lut_extract(in->green, 16) - g) / 4; in headc57d_olut_load_8()
147 bi = (drm_color_lut_extract(in-> blue, 16) - b) / 4; in headc57d_olut_load_8()
150 for (i = 0; i < 4; i++, mem += 8) { in headc57d_olut_load_8()
151 writew(r + ri * i, mem + 0); in headc57d_olut_load_8()
152 writew(g + gi * i, mem + 2); in headc57d_olut_load_8()
153 writew(b + bi * i, mem + 4); in headc57d_olut_load_8()
160 writew(readw(mem - 8), mem + 0); in headc57d_olut_load_8()
161 writew(readw(mem - 6), mem + 2); in headc57d_olut_load_8()
162 writew(readw(mem - 4), mem + 4); in headc57d_olut_load_8()
166 headc57d_olut_load(struct drm_color_lut *in, int size, void __iomem *mem) in headc57d_olut_load() argument
168 memset_io(mem, 0x00, 0x20); /* VSS header. */ in headc57d_olut_load()
169 mem += 0x20; in headc57d_olut_load()
171 for (; size--; in++, mem += 0x08) { in headc57d_olut_load()
172 writew(drm_color_lut_extract(in-> red, 16), mem + 0); in headc57d_olut_load()
173 writew(drm_color_lut_extract(in->green, 16), mem + 2); in headc57d_olut_load()
174 writew(drm_color_lut_extract(in-> blue, 16), mem + 4); in headc57d_olut_load()
180 writew(readw(mem - 8), mem + 0); in headc57d_olut_load()
181 writew(readw(mem - 6), mem + 2); in headc57d_olut_load()
182 writew(readw(mem - 4), mem + 4); in headc57d_olut_load()
191 asyh->olut.mode = NVC57D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT10; in headc57d_olut()
192 asyh->olut.size = 4 /* VSS header. */ + 1024 + 1 /* Entries. */; in headc57d_olut()
193 asyh->olut.output_mode = NVC57D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_ENABLE; in headc57d_olut()
195 asyh->olut.load = headc57d_olut_load_8; in headc57d_olut()
197 asyh->olut.load = headc57d_olut_load; in headc57d_olut()
204 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_mode()
205 struct nv50_head_mode *m = &asyh->mode; in headc57d_mode()
206 const int i = head->base.index; in headc57d_mode()
213 NVVAL(NVC57D, HEAD_SET_RASTER_SIZE, WIDTH, m->h.active) | in headc57d_mode()
214 NVVAL(NVC57D, HEAD_SET_RASTER_SIZE, HEIGHT, m->v.active), in headc57d_mode()
217 NVVAL(NVC57D, HEAD_SET_RASTER_SYNC_END, X, m->h.synce) | in headc57d_mode()
218 NVVAL(NVC57D, HEAD_SET_RASTER_SYNC_END, Y, m->v.synce), in headc57d_mode()
221 NVVAL(NVC57D, HEAD_SET_RASTER_BLANK_END, X, m->h.blanke) | in headc57d_mode()
222 NVVAL(NVC57D, HEAD_SET_RASTER_BLANK_END, Y, m->v.blanke), in headc57d_mode()
225 NVVAL(NVC57D, HEAD_SET_RASTER_BLANK_START, X, m->h.blanks) | in headc57d_mode()
226 NVVAL(NVC57D, HEAD_SET_RASTER_BLANK_START, Y, m->v.blanks)); in headc57d_mode()
229 PUSH_NVSQ(push, NVC57D, 0x2074 + (i * 0x400), m->v.blank2e << 16 | m->v.blank2s); in headc57d_mode()
230 PUSH_NVSQ(push, NVC57D, 0x2008 + (i * 0x400), m->interlace); in headc57d_mode()
233 NVVAL(NVC57D, HEAD_SET_PIXEL_CLOCK_FREQUENCY, HERTZ, m->clock * 1000)); in headc57d_mode()
236 NVVAL(NVC57D, HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX, HERTZ, m->clock * 1000)); in headc57d_mode()