Lines Matching +full:g +full:- +full:scaler
44 .mask = asyh->clr.mask & ~(flush ? 0 : asyh->set.mask), in nv50_head_flush_clr()
47 if (clr.olut) head->func->olut_clr(head); in nv50_head_flush_clr()
48 if (clr.core) head->func->core_clr(head); in nv50_head_flush_clr()
49 if (clr.curs) head->func->curs_clr(head); in nv50_head_flush_clr()
55 if (asyh->set.curs ) head->func->curs_set(head, asyh); in nv50_head_flush_set_wndw()
56 if (asyh->set.olut ) { in nv50_head_flush_set_wndw()
57 asyh->olut.offset = nv50_lut_load(&head->olut, in nv50_head_flush_set_wndw()
58 asyh->olut.buffer, in nv50_head_flush_set_wndw()
59 asyh->state.gamma_lut, in nv50_head_flush_set_wndw()
60 asyh->olut.load); in nv50_head_flush_set_wndw()
61 head->func->olut_set(head, asyh); in nv50_head_flush_set_wndw()
68 if (asyh->set.view ) head->func->view (head, asyh); in nv50_head_flush_set()
69 if (asyh->set.mode ) head->func->mode (head, asyh); in nv50_head_flush_set()
70 if (asyh->set.core ) head->func->core_set(head, asyh); in nv50_head_flush_set()
71 if (asyh->set.base ) head->func->base (head, asyh); in nv50_head_flush_set()
72 if (asyh->set.ovly ) head->func->ovly (head, asyh); in nv50_head_flush_set()
73 if (asyh->set.dither ) head->func->dither (head, asyh); in nv50_head_flush_set()
74 if (asyh->set.procamp) head->func->procamp (head, asyh); in nv50_head_flush_set()
75 if (asyh->set.crc ) nv50_crc_atomic_set (head, asyh); in nv50_head_flush_set()
76 if (asyh->set.or ) head->func->or (head, asyh); in nv50_head_flush_set()
84 const int vib = asyc->procamp.color_vibrance - 100; in nv50_head_atomic_check_procamp()
85 const int hue = asyc->procamp.vibrant_hue - 90; in nv50_head_atomic_check_procamp()
87 asyh->procamp.sat.cos = ((vib * 2047 + adj) / 100) & 0xfff; in nv50_head_atomic_check_procamp()
88 asyh->procamp.sat.sin = ((hue * 2047) / 100) & 0xfff; in nv50_head_atomic_check_procamp()
89 asyh->set.procamp = true; in nv50_head_atomic_check_procamp()
99 if (asyc->dither.mode) { in nv50_head_atomic_check_dither()
100 if (asyc->dither.mode == DITHERING_MODE_AUTO) { in nv50_head_atomic_check_dither()
101 if (asyh->base.depth > asyh->or.bpc * 3) in nv50_head_atomic_check_dither()
104 mode = asyc->dither.mode; in nv50_head_atomic_check_dither()
107 if (asyc->dither.depth == DITHERING_DEPTH_AUTO) { in nv50_head_atomic_check_dither()
108 if (asyh->or.bpc >= 8) in nv50_head_atomic_check_dither()
111 mode |= asyc->dither.depth; in nv50_head_atomic_check_dither()
115 asyh->dither.enable = NVVAL_GET(mode, NV507D, HEAD_SET_DITHER_CONTROL, ENABLE); in nv50_head_atomic_check_dither()
116 asyh->dither.bits = NVVAL_GET(mode, NV507D, HEAD_SET_DITHER_CONTROL, BITS); in nv50_head_atomic_check_dither()
117 asyh->dither.mode = NVVAL_GET(mode, NV507D, HEAD_SET_DITHER_CONTROL, MODE); in nv50_head_atomic_check_dither()
118 asyh->set.dither = true; in nv50_head_atomic_check_dither()
126 struct drm_connector *connector = asyc->state.connector; in nv50_head_atomic_check_view()
127 struct drm_display_mode *omode = &asyh->state.adjusted_mode; in nv50_head_atomic_check_view()
128 struct drm_display_mode *umode = &asyh->state.mode; in nv50_head_atomic_check_view()
129 int mode = asyc->scaler.mode; in nv50_head_atomic_check_view()
132 if (!asyc->scaler.full) { in nv50_head_atomic_check_view()
136 /* Non-EDID LVDS/eDP mode. */ in nv50_head_atomic_check_view()
140 /* For the user-specified mode, we must ignore doublescan and in nv50_head_atomic_check_view()
143 umode_vdisplay = umode->vdisplay; in nv50_head_atomic_check_view()
144 if ((umode->flags & DRM_MODE_FLAG_3D_MASK) == DRM_MODE_FLAG_3D_FRAME_PACKING) in nv50_head_atomic_check_view()
145 umode_vdisplay += umode->vtotal; in nv50_head_atomic_check_view()
146 asyh->view.iW = umode->hdisplay; in nv50_head_atomic_check_view()
147 asyh->view.iH = umode_vdisplay; in nv50_head_atomic_check_view()
150 asyh->view.oW = omode_hdisplay; in nv50_head_atomic_check_view()
151 asyh->view.oH = omode_vdisplay; in nv50_head_atomic_check_view()
157 if ((asyc->scaler.underscan.mode == UNDERSCAN_ON || in nv50_head_atomic_check_view()
158 (asyc->scaler.underscan.mode == UNDERSCAN_AUTO && in nv50_head_atomic_check_view()
159 connector->display_info.is_hdmi))) { in nv50_head_atomic_check_view()
160 u32 bX = asyc->scaler.underscan.hborder; in nv50_head_atomic_check_view()
161 u32 bY = asyc->scaler.underscan.vborder; in nv50_head_atomic_check_view()
162 u32 r = (asyh->view.oH << 19) / asyh->view.oW; in nv50_head_atomic_check_view()
165 asyh->view.oW -= (bX * 2); in nv50_head_atomic_check_view()
166 if (bY) asyh->view.oH -= (bY * 2); in nv50_head_atomic_check_view()
167 else asyh->view.oH = ((asyh->view.oW * r) + (r / 2)) >> 19; in nv50_head_atomic_check_view()
169 asyh->view.oW -= (asyh->view.oW >> 4) + 32; in nv50_head_atomic_check_view()
170 if (bY) asyh->view.oH -= (bY * 2); in nv50_head_atomic_check_view()
171 else asyh->view.oH = ((asyh->view.oW * r) + (r / 2)) >> 19; in nv50_head_atomic_check_view()
183 asyh->view.oW = min(asyh->view.iW, asyh->view.oW); in nv50_head_atomic_check_view()
184 asyh->view.oH = min(asyh->view.iH, asyh->view.oH); in nv50_head_atomic_check_view()
194 * E.g. 4:3 (1.333) AR image displayed on a 16:10 (1.6) AR in nv50_head_atomic_check_view()
202 if (asyh->view.oW * asyh->view.iH > asyh->view.iW * asyh->view.oH) { in nv50_head_atomic_check_view()
204 u32 r = (asyh->view.iW << 19) / asyh->view.iH; in nv50_head_atomic_check_view()
205 asyh->view.oW = ((asyh->view.oH * r) + (r / 2)) >> 19; in nv50_head_atomic_check_view()
208 u32 r = (asyh->view.iH << 19) / asyh->view.iW; in nv50_head_atomic_check_view()
209 asyh->view.oH = ((asyh->view.oW * r) + (r / 2)) >> 19; in nv50_head_atomic_check_view()
216 asyh->set.view = true; in nv50_head_atomic_check_view()
223 struct drm_device *dev = head->base.base.dev; in nv50_head_atomic_check_lut()
224 struct drm_crtc *crtc = &head->base.base; in nv50_head_atomic_check_lut()
227 struct drm_property_blob *olut = asyh->state.gamma_lut, in nv50_head_atomic_check_lut()
228 *ilut = asyh->state.degamma_lut; in nv50_head_atomic_check_lut()
234 if (!head->func->ilut_check(size)) { in nv50_head_atomic_check_lut()
236 size, crtc->base.id, crtc->name); in nv50_head_atomic_check_lut()
237 return -EINVAL; in nv50_head_atomic_check_lut()
246 if (asyh->wndw.olut) { in nv50_head_atomic_check_lut()
250 if (asyh->wndw.olut != asyh->wndw.mask) in nv50_head_atomic_check_lut()
251 return -EINVAL; in nv50_head_atomic_check_lut()
257 if (!head->func->olut_identity) { in nv50_head_atomic_check_lut()
258 asyh->olut.handle = 0; in nv50_head_atomic_check_lut()
266 if (!head->func->olut(head, asyh, size)) { in nv50_head_atomic_check_lut()
268 size, crtc->base.id, crtc->name); in nv50_head_atomic_check_lut()
269 return -EINVAL; in nv50_head_atomic_check_lut()
271 asyh->olut.handle = disp->core->chan.vram.handle; in nv50_head_atomic_check_lut()
272 asyh->olut.buffer = !asyh->olut.buffer; in nv50_head_atomic_check_lut()
280 struct drm_display_mode *mode = &asyh->state.adjusted_mode; in nv50_head_atomic_check_mode()
281 struct nv50_head_mode *m = &asyh->mode; in nv50_head_atomic_check_mode()
293 m->h.active = mode->crtc_htotal; in nv50_head_atomic_check_mode()
294 m->h.synce = mode->crtc_hsync_end - mode->crtc_hsync_start - 1; in nv50_head_atomic_check_mode()
295 m->h.blanke = mode->crtc_hblank_end - mode->crtc_hsync_start - 1; in nv50_head_atomic_check_mode()
296 m->h.blanks = m->h.blanke + mode->crtc_hdisplay; in nv50_head_atomic_check_mode()
298 m->v.active = mode->crtc_vtotal; in nv50_head_atomic_check_mode()
299 m->v.synce = mode->crtc_vsync_end - mode->crtc_vsync_start - 1; in nv50_head_atomic_check_mode()
300 m->v.blanke = mode->crtc_vblank_end - mode->crtc_vsync_start - 1; in nv50_head_atomic_check_mode()
301 m->v.blanks = m->v.blanke + mode->crtc_vdisplay; in nv50_head_atomic_check_mode()
304 blankus = (m->v.active - mode->crtc_vdisplay - 2) * m->h.active; in nv50_head_atomic_check_mode()
306 blankus /= mode->crtc_clock; in nv50_head_atomic_check_mode()
307 m->v.blankus = blankus; in nv50_head_atomic_check_mode()
309 if (mode->flags & DRM_MODE_FLAG_INTERLACE) { in nv50_head_atomic_check_mode()
310 m->v.blank2e = m->v.active + m->v.blanke; in nv50_head_atomic_check_mode()
311 m->v.blank2s = m->v.blank2e + mode->crtc_vdisplay; in nv50_head_atomic_check_mode()
312 m->v.active = (m->v.active * 2) + 1; in nv50_head_atomic_check_mode()
313 m->interlace = true; in nv50_head_atomic_check_mode()
315 m->v.blank2e = 0; in nv50_head_atomic_check_mode()
316 m->v.blank2s = 1; in nv50_head_atomic_check_mode()
317 m->interlace = false; in nv50_head_atomic_check_mode()
319 m->clock = mode->crtc_clock; in nv50_head_atomic_check_mode()
321 asyh->or.nhsync = !!(mode->flags & DRM_MODE_FLAG_NHSYNC); in nv50_head_atomic_check_mode()
322 asyh->or.nvsync = !!(mode->flags & DRM_MODE_FLAG_NVSYNC); in nv50_head_atomic_check_mode()
323 asyh->set.or = head->func->or != NULL; in nv50_head_atomic_check_mode()
324 asyh->set.mode = true; in nv50_head_atomic_check_mode()
334 struct nouveau_drm *drm = nouveau_drm(crtc->dev); in nv50_head_atomic_check()
342 bool check_lut = asyh->state.color_mgmt_changed || in nv50_head_atomic_check()
343 memcmp(&armh->wndw, &asyh->wndw, sizeof(asyh->wndw)); in nv50_head_atomic_check()
345 NV_ATOMIC(drm, "%s atomic_check %d\n", crtc->name, asyh->state.active); in nv50_head_atomic_check()
353 if (asyh->state.active) { in nv50_head_atomic_check()
354 for_each_new_connector_in_state(asyh->state.state, conn, conns, i) { in nv50_head_atomic_check()
355 if (conns->crtc == crtc) { in nv50_head_atomic_check()
361 if (armh->state.active) { in nv50_head_atomic_check()
363 if (asyh->state.mode_changed) in nv50_head_atomic_check()
364 asyc->set.scaler = true; in nv50_head_atomic_check()
365 if (armh->base.depth != asyh->base.depth) in nv50_head_atomic_check()
366 asyc->set.dither = true; in nv50_head_atomic_check()
370 asyc->set.mask = ~0; in nv50_head_atomic_check()
371 asyh->set.mask = ~0; in nv50_head_atomic_check()
372 asyh->set.or = head->func->or != NULL; in nv50_head_atomic_check()
375 if (asyh->state.mode_changed || asyh->state.connectors_changed) in nv50_head_atomic_check()
379 asyh->olut.visible = asyh->olut.handle != 0; in nv50_head_atomic_check()
382 if (asyc->set.scaler) in nv50_head_atomic_check()
384 if (asyc->set.dither) in nv50_head_atomic_check()
386 if (asyc->set.procamp) in nv50_head_atomic_check()
390 if (head->func->core_calc) { in nv50_head_atomic_check()
391 head->func->core_calc(head, asyh); in nv50_head_atomic_check()
392 if (!asyh->core.visible) in nv50_head_atomic_check()
393 asyh->olut.visible = false; in nv50_head_atomic_check()
396 asyh->set.base = armh->base.cpp != asyh->base.cpp; in nv50_head_atomic_check()
397 asyh->set.ovly = armh->ovly.cpp != asyh->ovly.cpp; in nv50_head_atomic_check()
399 asyh->olut.visible = false; in nv50_head_atomic_check()
400 asyh->core.visible = false; in nv50_head_atomic_check()
401 asyh->curs.visible = false; in nv50_head_atomic_check()
402 asyh->base.cpp = 0; in nv50_head_atomic_check()
403 asyh->ovly.cpp = 0; in nv50_head_atomic_check()
406 if (!drm_atomic_crtc_needs_modeset(&asyh->state)) { in nv50_head_atomic_check()
407 if (asyh->core.visible) { in nv50_head_atomic_check()
408 if (memcmp(&armh->core, &asyh->core, sizeof(asyh->core))) in nv50_head_atomic_check()
409 asyh->set.core = true; in nv50_head_atomic_check()
411 if (armh->core.visible) { in nv50_head_atomic_check()
412 asyh->clr.core = true; in nv50_head_atomic_check()
415 if (asyh->curs.visible) { in nv50_head_atomic_check()
416 if (memcmp(&armh->curs, &asyh->curs, sizeof(asyh->curs))) in nv50_head_atomic_check()
417 asyh->set.curs = true; in nv50_head_atomic_check()
419 if (armh->curs.visible) { in nv50_head_atomic_check()
420 asyh->clr.curs = true; in nv50_head_atomic_check()
423 if (asyh->olut.visible) { in nv50_head_atomic_check()
424 if (memcmp(&armh->olut, &asyh->olut, sizeof(asyh->olut))) in nv50_head_atomic_check()
425 asyh->set.olut = true; in nv50_head_atomic_check()
427 if (armh->olut.visible) { in nv50_head_atomic_check()
428 asyh->clr.olut = true; in nv50_head_atomic_check()
431 asyh->clr.olut = armh->olut.visible; in nv50_head_atomic_check()
432 asyh->clr.core = armh->core.visible; in nv50_head_atomic_check()
433 asyh->clr.curs = armh->curs.visible; in nv50_head_atomic_check()
434 asyh->set.olut = asyh->olut.visible; in nv50_head_atomic_check()
435 asyh->set.core = asyh->core.visible; in nv50_head_atomic_check()
436 asyh->set.curs = asyh->curs.visible; in nv50_head_atomic_check()
443 if (asyh->clr.mask || asyh->set.mask) in nv50_head_atomic_check()
444 nv50_atom(asyh->state.state)->lock_core = true; in nv50_head_atomic_check()
459 __drm_atomic_helper_crtc_destroy_state(&asyh->state); in nv50_head_atomic_destroy_state()
466 struct nv50_head_atom *armh = nv50_head_atom(crtc->state); in nv50_head_atomic_duplicate_state()
470 __drm_atomic_helper_crtc_duplicate_state(crtc, &asyh->state); in nv50_head_atomic_duplicate_state()
471 asyh->wndw = armh->wndw; in nv50_head_atomic_duplicate_state()
472 asyh->view = armh->view; in nv50_head_atomic_duplicate_state()
473 asyh->mode = armh->mode; in nv50_head_atomic_duplicate_state()
474 asyh->olut = armh->olut; in nv50_head_atomic_duplicate_state()
475 asyh->core = armh->core; in nv50_head_atomic_duplicate_state()
476 asyh->curs = armh->curs; in nv50_head_atomic_duplicate_state()
477 asyh->base = armh->base; in nv50_head_atomic_duplicate_state()
478 asyh->ovly = armh->ovly; in nv50_head_atomic_duplicate_state()
479 asyh->dither = armh->dither; in nv50_head_atomic_duplicate_state()
480 asyh->procamp = armh->procamp; in nv50_head_atomic_duplicate_state()
481 asyh->crc = armh->crc; in nv50_head_atomic_duplicate_state()
482 asyh->or = armh->or; in nv50_head_atomic_duplicate_state()
483 asyh->dp = armh->dp; in nv50_head_atomic_duplicate_state()
484 asyh->clr.mask = 0; in nv50_head_atomic_duplicate_state()
485 asyh->set.mask = 0; in nv50_head_atomic_duplicate_state()
486 return &asyh->state; in nv50_head_atomic_duplicate_state()
497 if (crtc->state) in nv50_head_reset()
498 nv50_head_atomic_destroy_state(crtc, crtc->state); in nv50_head_reset()
500 __drm_atomic_helper_crtc_reset(crtc, &asyh->state); in nv50_head_reset()
514 nvif_event_dtor(&head->base.vblank); in nv50_head_destroy()
515 nvif_head_dtor(&head->base.head); in nv50_head_destroy()
516 nv50_lut_fini(&head->olut); in nv50_head_destroy()
557 if (drm_crtc_handle_vblank(&nv_crtc->base)) in nv50_head_vblank_handler()
558 nv50_crc_handle_vblank(nv50_head(&nv_crtc->base)); in nv50_head_vblank_handler()
577 return ERR_PTR(-ENOMEM); in nv50_head_create()
579 head->func = disp->core->func->head; in nv50_head_create()
580 head->base.index = index; in nv50_head_create()
582 if (disp->disp->object.oclass < GF110_DISP) in nv50_head_create()
587 if (disp->disp->object.oclass < GV100_DISP) { in nv50_head_create()
588 ret = nv50_base_new(drm, head->base.index, &base); in nv50_head_create()
589 ret = nv50_ovly_new(drm, head->base.index, &ovly); in nv50_head_create()
592 head->base.index * 2 + 0, &base); in nv50_head_create()
594 head->base.index * 2 + 1, &ovly); in nv50_head_create()
597 ret = nv50_curs_new(drm, head->base.index, &curs); in nv50_head_create()
603 nv_crtc = &head->base; in nv50_head_create()
604 crtc = &nv_crtc->base; in nv50_head_create()
605 drm_crtc_init_with_planes(dev, crtc, &base->plane, &curs->plane, in nv50_head_create()
606 funcs, "head-%d", head->base.index); in nv50_head_create()
610 drm_crtc_enable_color_mgmt(crtc, base->func->ilut_size, in nv50_head_create()
611 disp->disp->object.oclass >= GF110_DISP, in nv50_head_create()
612 head->func->olut_size); in nv50_head_create()
614 if (head->func->olut_set) { in nv50_head_create()
615 ret = nv50_lut_init(disp, &drm->client.mmu, &head->olut); in nv50_head_create()
622 ret = nvif_head_ctor(disp->disp, head->base.base.name, head->base.index, &head->base.head); in nv50_head_create()
626 ret = nvif_head_vblank_event_ctor(&head->base.head, "kmsVbl", nv50_head_vblank_handler, in nv50_head_create()
627 false, &nv_crtc->vblank); in nv50_head_create()