123 nv50_dmac_destroy(struct nv50_dmac *dmac)  in nv50_dmac_destroy()  argument
125 	nvif_object_dtor(&dmac->vram);  in nv50_dmac_destroy()
126 	nvif_object_dtor(&dmac->sync);  in nv50_dmac_destroy()
128 	nv50_chan_destroy(&dmac->base);  in nv50_dmac_destroy()
130 	nvif_mem_dtor(&dmac->push.mem);  in nv50_dmac_destroy()
136 	struct nv50_dmac *dmac = container_of(push, typeof(*dmac), push);  in nv50_dmac_kick()  local
138 	dmac->cur = push->cur - (u32 __iomem *)dmac->push.mem.object.map.ptr;  in nv50_dmac_kick()
139 	if (dmac->put != dmac->cur) {  in nv50_dmac_kick()
143 		if (dmac->push.mem.type & NVIF_MEM_VRAM) {  in nv50_dmac_kick()
144 			struct nvif_device *device = dmac->base.device;  in nv50_dmac_kick()
152 		NVIF_WV32(&dmac->base.user, NV507C, PUT, PTR, dmac->cur);  in nv50_dmac_kick()
153 		dmac->put = dmac->cur;  in nv50_dmac_kick()
160 nv50_dmac_free(struct nv50_dmac *dmac)  in nv50_dmac_free()  argument
162 	u32 get = NVIF_RV32(&dmac->base.user, NV507C, GET, PTR);  in nv50_dmac_free()
163 	if (get > dmac->cur) /* NVIDIA stay 5 away from GET, do the same. */  in nv50_dmac_free()
164 		return get - dmac->cur - 5;  in nv50_dmac_free()
165 	return dmac->max - dmac->cur;  in nv50_dmac_free()
169 nv50_dmac_wind(struct nv50_dmac *dmac)  in nv50_dmac_wind()  argument
174 	u32 get = NVIF_RV32(&dmac->base.user, NV507C, GET, PTR);  in nv50_dmac_wind()
177 		if (dmac->put == 0)  in nv50_dmac_wind()
178 			nv50_dmac_kick(&dmac->push);  in nv50_dmac_wind()
180 		if (nvif_msec(dmac->base.device, 2000,  in nv50_dmac_wind()
181 			if (NVIF_TV32(&dmac->base.user, NV507C, GET, PTR, >, 0))  in nv50_dmac_wind()
187 	PUSH_RSVD(&dmac->push, PUSH_JUMP(&dmac->push, 0));  in nv50_dmac_wind()
188 	dmac->cur = 0;  in nv50_dmac_wind()
195 	struct nv50_dmac *dmac = container_of(push, typeof(*dmac), push);  in nv50_dmac_wait()  local
198 	if (WARN_ON(size > dmac->max))  in nv50_dmac_wait()
201 	dmac->cur = push->cur - (u32 __iomem *)dmac->push.mem.object.map.ptr;  in nv50_dmac_wait()
202 	if (dmac->cur + size >= dmac->max) {  in nv50_dmac_wait()
203 		int ret = nv50_dmac_wind(dmac);  in nv50_dmac_wait()
207 		push->cur = dmac->push.mem.object.map.ptr;  in nv50_dmac_wait()
208 		push->cur = push->cur + dmac->cur;  in nv50_dmac_wait()
212 	if (nvif_msec(dmac->base.device, 2000,  in nv50_dmac_wait()
213 		if ((free = nv50_dmac_free(dmac)) >= size)  in nv50_dmac_wait()
220 	push->bgn = dmac->push.mem.object.map.ptr;  in nv50_dmac_wait()
221 	push->bgn = push->bgn + dmac->cur;  in nv50_dmac_wait()
234 		 struct nv50_dmac *dmac)  in nv50_dmac_create()  argument
255 	ret = nvif_mem_ctor_map(&drm->mmu, "kmsChanPush", type, 0x1000, &dmac->push.mem);  in nv50_dmac_create()
259 	dmac->push.wait = nv50_dmac_wait;  in nv50_dmac_create()
260 	dmac->push.kick = nv50_dmac_kick;  in nv50_dmac_create()
261 	dmac->push.bgn = dmac->push.mem.object.map.ptr;  in nv50_dmac_create()
262 	dmac->push.cur = dmac->push.bgn;  in nv50_dmac_create()
263 	dmac->push.end = dmac->push.bgn;  in nv50_dmac_create()
264 	dmac->max = 0x1000/4 - 1;  in nv50_dmac_create()
270 		dmac->max -= 12;  in nv50_dmac_create()
272 	args->pushbuf = nvif_handle(&dmac->push.mem.object);  in nv50_dmac_create()
275 			       &dmac->base);  in nv50_dmac_create()
282 	ret = nvif_object_ctor(&dmac->base.user, "kmsSyncCtxDma", NV50_DISP_HANDLE_SYNCBUF,  in nv50_dmac_create()
290 			       &dmac->sync);  in nv50_dmac_create()
294 	ret = nvif_object_ctor(&dmac->base.user, "kmsVramCtxDma", NV50_DISP_HANDLE_VRAM,  in nv50_dmac_create()
302 			       &dmac->vram);  in nv50_dmac_create()