Lines Matching +full:high +full:- +full:to +full:- +full:low
1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
32 <value value="0x37" name="RB5_R10G10B10A2_UNORM"/> <!-- GL_RGB10_A2 -->
33 <value value="0x3a" name="RB5_R10G10B10A2_UINT"/> <!-- GL_RGB10_A2UI -->
34 <value value="0x42" name="RB5_R11G11B10_FLOAT"/> <!-- GL_R11F_G11F_B10F -->
251 <value value="8" name="BLIT_ZS"/> <!-- depth or combined depth+stencil -->
252 <value value="9" name="BLIT_S"/> <!-- separate stencil -->
255 <!-- see comment in a4xx.xml about script to extract countables from test-perf output -->
851 <!-- CP Interrupt bits -->
861 <!-- CP registers -->
943 <!-- RBBM registers -->
948 <!--
953 -->
1336 <bitfield high="31" low="31" name="GPU_BUSY_IGN_AHB" />
1337 <bitfield high="30" low="30" name="GPU_BUSY_IGN_AHB_CP" />
1338 <bitfield high="29" low="29" name="HLSQ_BUSY" />
1339 <bitfield high="28" low="28" name="VSC_BUSY" />
1340 <bitfield high="27" low="27" name="TPL1_BUSY" />
1341 <bitfield high="26" low="26" name="SP_BUSY" />
1342 <bitfield high="25" low="25" name="UCHE_BUSY" />
1343 <bitfield high="24" low="24" name="VPC_BUSY" />
1344 <bitfield high="23" low="23" name="VFDP_BUSY" />
1345 <bitfield high="22" low="22" name="VFD_BUSY" />
1346 <bitfield high="21" low="21" name="TESS_BUSY" />
1347 <bitfield high="20" low="20" name="PC_VSD_BUSY" />
1348 <bitfield high="19" low="19" name="PC_DCALL_BUSY" />
1349 <bitfield high="18" low="18" name="GPMU_SLAVE_BUSY" />
1350 <bitfield high="17" low="17" name="DCOM_BUSY" />
1351 <bitfield high="16" low="16" name="COM_BUSY" />
1352 <bitfield high="15" low="15" name="LRZ_BUZY" />
1353 <bitfield high="14" low="14" name="A2D_DSP_BUSY" />
1354 <bitfield high="13" low="13" name="CCUFCHE_BUSY" />
1355 <bitfield high="12" low="12" name="RB_BUSY" />
1356 <bitfield high="11" low="11" name="RAS_BUSY" />
1357 <bitfield high="10" low="10" name="TSE_BUSY" />
1358 <bitfield high="9" low="9" name="VBIF_BUSY" />
1359 <bitfield high="8" low="8" name="GPU_BUSY_IGN_AHB_HYST" />
1360 <bitfield high="7" low="7" name="CP_BUSY_IGN_HYST" />
1361 <bitfield high="6" low="6" name="CP_BUSY" />
1362 <bitfield high="5" low="5" name="GPMU_MASTER_BUSY" />
1363 <bitfield high="4" low="4" name="CP_CRASH_BUSY" />
1364 <bitfield high="3" low="3" name="CP_ETS_BUSY" />
1365 <bitfield high="2" low="2" name="CP_PFP_BUSY" />
1366 <bitfield high="1" low="1" name="CP_ME_BUSY" />
1367 <bitfield high="0" low="0" name="HI_BUSY" />
1415 <!-- VSC registers -->
1417 <bitfield name="WIDTH" low="0" high="7" shr="5" type="uint"/>
1418 <bitfield name="HEIGHT" low="9" high="16" shr="5" type="uint"/>
1419 <!-- b17 maybe BYPASS like RB_CNTL, but reg not written for bypass -->
1423 <reg32 offset="0x0bc5" name="UNKNOWN_0BC5"/> <!-- always 00000000? -->
1424 <reg32 offset="0x0bc6" name="UNKNOWN_0BC6"/> <!-- always 00000000? -->
1432 of bins assigned to this VSC_PIPE in the horiz/vert
1435 <bitfield name="X" low="0" high="9" type="uint"/>
1436 <bitfield name="Y" low="10" high="19" type="uint"/>
1437 <bitfield name="W" low="20" high="23" type="uint"/>
1438 <bitfield name="H" low="24" high="27" type="uint"/>
1451 <!-- used for some blits?? -->
1454 <!-- GRAS registers -->
1469 <reg32 offset="0x0cc4" name="RB_DBG_ECO_CNTL"/> <!-- always 00100000? -->
1471 <reg32 offset="0x0cc6" name="RB_MODE_CNTL"/> <!-- always 00000044? -->
1472 <reg32 offset="0x0cc7" name="RB_CCU_CNTL"/> <!-- always b0056080 or 10000000? -->
1500 <reg32 offset="0x0d02" name="PC_MODE_CNTL"/> <!-- always 0000001f? -->
1520 <reg32 offset="0x0e06" name="HLSQ_MODE_CNTL"/> <!-- always 00000001? -->
1534 <reg32 offset="0x0e42" name="VFD_MODE_CNTL"/> <!-- always 00000000? -->
1591 <reg32 offset="0x0ec2" name="SP_MODE_CNTL"/> <!-- always 0000001e? -->
1610 <reg32 offset="0x0f02" name="TPL1_MODE_CNTL"/> <!-- always 00000544? -->
1626 <!--
1629 -->
1637 <!--
1640 -->
1643 <!--
1646 -->
1649 <!--
1652 -->
1655 <!--
1658 -->
1693 <!--
1701 -->
1820 <bitfield name="CLIP_MASK" low="0" high="7"/>
1821 <bitfield name="CULL_MASK" low="8" high="15"/>
1824 <reg32 offset="0xe004" name="UNKNOWN_E004"/> <!-- always 00000000? -->
1826 <!-- see also RB_RENDER_CONTROL0 -->
1833 <bitfield name="COORD_MASK" low="6" high="9" type="hex"/>
1836 <bitfield name="HORZ" low="0" high="9" type="uint"/>
1837 <bitfield name="VERT" low="10" high="19" type="uint"/>
1849 <bitfield name="LINEHALFWIDTH" low="3" high="10" radix="2" type="fixed"/>
1852 <!-- probably LINEHALFWIDTH is the same as a4xx.. -->
1855 <bitfield name="MIN" low="0" high="15" type="ufixed" radix="4"/>
1856 <bitfield name="MAX" low="16" high="31" type="ufixed" radix="4"/>
1867 <!-- duplicates RB_DEPTH_INFO0: -->
1869 <bitfield name="DEPTH_FORMAT" low="0" high="2" type="a5xx_depth_format"/>
1871 <reg32 offset="0xe099" name="GRAS_SU_CONSERVATIVE_RAS_CNTL"/> <!-- always 00000000? -->
1872 <!--
1875 -->
1880 <!-- note, 0x4 for binning pass when frag writes z?? -->
1881 <reg32 offset="0xe0a1" name="GRAS_SC_BIN_CNTL"/> <!-- always 00000000? -->
1883 <bitfield name="SAMPLES" low="0" high="1" type="a3xx_msaa_samples"/>
1886 <bitfield name="SAMPLES" low="0" high="1" type="a3xx_msaa_samples"/>
1889 <reg32 offset="0xe0a4" name="GRAS_SC_SCREEN_SCISSOR_CNTL"/> <!-- always 00000000? -->
1898 LRZ: (Low Resolution Z ??)
1899 ----
1903 a depth-prepass, used during the GMEM draws to discard primitives that
1904 would not be visible due to later draws.
1906 The LRZ buffer always seems to be z16 format, regardless of actual
1910 since the occluded primitive can still contribute to final color value
1921 <!--
1924 -->
1928 <!--
1929 lzr pitch is depth pitch (in pixels) / 8 (aligned to 32)..
1930 -->
1932 Pitch is depth width (in pixels) / 8 (aligned to 32). Height
1940 <bitfield name="WIDTH" low="0" high="7" shr="5" type="uint"/>
1941 <bitfield name="HEIGHT" low="9" high="16" shr="5" type="uint"/>
1945 <!--
1949 see mrt-fbo-* zs=2)
1950 -->
1954 <!-- why everything twice?? maybe read vs write? -->
1955 <!-- UBWC flag buffer enabled for depth/stencil: -->
1958 <!-- bitmask of MRTs using UBWC flag buffer: -->
1959 <bitfield name="FLAG_MRTS" low="16" high="23"/>
1960 <bitfield name="FLAG_MRTS2" low="24" high="31"/>
1963 <bitfield name="SAMPLES" low="0" high="1" type="a3xx_msaa_samples"/>
1966 <bitfield name="SAMPLES" low="0" high="1" type="a3xx_msaa_samples"/>
1969 <!--
1972 -->
1974 <!-- see also GRAS_CNTL -->
1981 <bitfield name="COORD_MASK" low="6" high="9" type="hex"/>
1989 <!-- bit0 set except for binning pass.. -->
1990 <bitfield name="MRT" low="0" high="3" type="uint"/>
1994 <bitfield name="RT0" low="0" high="3"/>
1995 <bitfield name="RT1" low="4" high="7"/>
1996 <bitfield name="RT2" low="8" high="11"/>
1997 <bitfield name="RT3" low="12" high="15"/>
1998 <bitfield name="RT4" low="16" high="19"/>
1999 <bitfield name="RT5" low="20" high="23"/>
2000 <bitfield name="RT6" low="24" high="27"/>
2001 <bitfield name="RT7" low="28" high="31"/>
2008 <bitfield name="ROP_CODE" low="3" high="6" type="a3xx_rop_code"/>
2009 <bitfield name="COMPONENT_ENABLE" low="7" high="10" type="hex"/>
2012 <bitfield name="RGB_SRC_FACTOR" low="0" high="4" type="adreno_rb_blend_factor"/>
2013 <bitfield name="RGB_BLEND_OPCODE" low="5" high="7" type="a3xx_rb_blend_opcode"/>
2014 <bitfield name="RGB_DEST_FACTOR" low="8" high="12" type="adreno_rb_blend_factor"/>
2015 <bitfield name="ALPHA_SRC_FACTOR" low="16" high="20" type="adreno_rb_blend_factor"/>
2016 <bitfield name="ALPHA_BLEND_OPCODE" low="21" high="23" type="a3xx_rb_blend_opcode"/>
2017 <bitfield name="ALPHA_DEST_FACTOR" low="24" high="28" type="adreno_rb_blend_factor"/>
2020 <!--
2022 or if it is inherent in the format. Will have to play with bits
2024 field, it doesn't seem to have the same encoding as a3xx/a4xx.
2025 -->
2026 <bitfield name="COLOR_FORMAT" low="0" high="7" type="a5xx_color_fmt"/>
2027 <bitfield name="COLOR_TILE_MODE" low="8" high="9" type="a5xx_tile_mode"/>
2028 <bitfield name="DITHER_MODE" low="11" high="12" type="adreno_rb_dither_mode"/>
2029 <bitfield name="COLOR_SWAP" low="13" high="14" type="a3xx_color_swap"/>
2032 <!--
2033 at least in gmem, things seem to be aligned to pitch of 64..
2035 -->
2042 <bitfield name="UINT" low="0" high="7" type="hex"/>
2043 <bitfield name="SINT" low="8" high="15" type="hex"/>
2044 <bitfield name="FLOAT" low="16" high="31" type="float"/>
2048 <bitfield name="UINT" low="0" high="7" type="hex"/>
2049 <bitfield name="SINT" low="8" high="15" type="hex"/>
2050 <bitfield name="FLOAT" low="16" high="31" type="float"/>
2054 <bitfield name="UINT" low="0" high="7" type="hex"/>
2055 <bitfield name="SINT" low="8" high="15" type="hex"/>
2056 <bitfield name="FLOAT" low="16" high="31" type="float"/>
2060 <bitfield name="UINT" low="0" high="7" type="hex"/>
2061 <bitfield name="SINT" low="8" high="15" type="hex"/>
2062 <bitfield name="FLOAT" low="16" high="31" type="float"/>
2066 <bitfield name="ALPHA_REF" low="0" high="7" type="hex"/>
2068 <bitfield name="ALPHA_TEST_FUNC" low="9" high="11" type="adreno_compare_func"/>
2071 <!-- per-mrt enable bit -->
2072 <bitfield name="ENABLE_BLEND" low="0" high="7"/>
2075 <!-- a guess? -->
2076 <bitfield name="SAMPLE_MASK" low="16" high="31"/>
2085 <bitfield name="ZFUNC" low="2" high="4" type="adreno_compare_func"/>
2090 <bitfield name="DEPTH_FORMAT" low="0" high="2" type="a5xx_depth_format"/>
2103 <!--
2106 not require read).. so guessing this is analogous to
2108 -->
2110 <bitfield name="FUNC" low="8" high="10" type="adreno_compare_func"/>
2111 <bitfield name="FAIL" low="11" high="13" type="adreno_stencil_op"/>
2112 <bitfield name="ZPASS" low="14" high="16" type="adreno_stencil_op"/>
2113 <bitfield name="ZFAIL" low="17" high="19" type="adreno_stencil_op"/>
2114 <bitfield name="FUNC_BF" low="20" high="22" type="adreno_compare_func"/>
2115 <bitfield name="FAIL_BF" low="23" high="25" type="adreno_stencil_op"/>
2116 <bitfield name="ZPASS_BF" low="26" high="28" type="adreno_stencil_op"/>
2117 <bitfield name="ZFAIL_BF" low="29" high="31" type="adreno_stencil_op"/>
2135 ------
2137 Blits are triggered by CP_EVENT_WRITE:BLIT, compared to previous
2141 For gmem->mem blob uses RB_BLIT_CNTL.BUF to specify src of
2145 For mem->gmem blob uses just MRT0 or ZS and RB_BLIT_DST_LO/HI
2147 (I suppose this is just to avoid trashing RB_MRT[1..7]??)
2150 <bitfield name="BUF" low="0" high="3" type="a5xx_blit_buf"/>
2155 <!-- if b0 set, output is in TILE5_3 format -->
2157 <!--
2159 0x0 mem->gmem
2160 0xf gmem->mem with flag buffer (color)
2161 0x4 gmem->mem without flag buffer (color)
2163 also for gmem->mem preserving tiling
2164 -->
2169 <!-- array-pitch is size of layer -->
2180 1 - depth
2181 2 - stencil
2182 3 - depth+stencil
2186 <bitfield name="MASK" low="4" high="7"/>
2191 -------------------------------
2193 Blob seems to stick some metadata at the front of the buffer,
2197 UBWC seems to stand for "universal bandwidth compression".
2200 if metadata is used) presumably to resolve metadata.
2203 …https://android.googlesource.com/platform/hardware/qcom/display/+/android-6.0.1_r40/msm8994/libgra…
2212 0 c073a000 c0732000 - level 0 flags is address
2225 so 0xc08c3000 - 0xc0732000 = 0x00191000 (1642496); each level
2232 { ARRAY_PITCH = 1642496 | 0x18800000 } - NOTE c2dc always has 0x18800000 but
2246 <!-- array-pitch is size of layer -->
2252 <!-- array-pitch is size of layer -->
2261 plus # of transform-feedback (streamout) varyings if using the
2264 <bitfield name="STRIDE_IN_VPC" low="0" high="6" type="uint"/>
2276 <!-- one bit per varying component: -->
2281 <bitfield name="CLIP_MASK" low="0" high="7" type="uint"/>
2282 <!-- there can be up to 8 total clip/cull distance outputs,
2284 more than 4 outputs a second location needs to be programmed
2285 -->
2286 <bitfield name="CLIP_DIST_03_LOC" low="8" high="15" type="uint"/>
2287 <bitfield name="CLIP_DIST_47_LOC" low="16" high="23" type="uint"/>
2291 <bitfield name="NUMNONPOSVAR" low="0" high="7" type="uint"/>
2292 <!--
2293 This seems to be the OUTLOC for the psize output. It could possibly
2294 be the max-OUTLOC position, but it is only set when VS writes psize
2296 -->
2297 <bitfield name="PSIZELOC" low="8" high="15" type="uint"/>
2302 Stream-Out:
2303 -----------
2306 number of components to write to each.
2310 packet, not sure if that matters), each write can handle up to two
2311 components of stream-out output. Order matches up to OUTLOC,
2330 to write into at the specified offset.
2332 The VPC_SO[n].FLUSH_BASE_LO/HI is used for hw to write back next
2348 <!-- always 0x10000 when SO enabled.. -->
2352 <bitfield name="A_BUF" low="0" high="1" type="uint"/>
2353 <bitfield name="A_OFF" low="2" high="10" shr="2" type="uint"/>
2355 <bitfield name="B_BUF" low="12" high="13" type="uint"/>
2356 <bitfield name="B_OFF" low="14" high="22" shr="2" type="uint"/>
2363 <reg32 offset="3" name="NCOMP"/> <!-- component count -->
2370 <!-- # of varyings plus four for gl_Position (plus one if gl_PointSize) -->
2371 <bitfield name="STRIDE_IN_VPC" low="0" high="6" type="uint"/>
2373 …ield name="COUNT_PRIMITIVES" pos="9" type="boolean"/><!-- enabled when gl_PrimitiveIDIn is used -->
2380 <bitfield name="POLYMODE_FRONT_PTYPE" low="0" high="2" type="adreno_pa_su_sc_draw"/>
2381 <bitfield name="POLYMODE_BACK_PTYPE" low="3" high="5" type="adreno_pa_su_sc_draw"/>
2385 <bitfield name="CLIP_MASK" low="0" high="7"/>
2390 <bitfield name="MAX_VERTICES" low="0" high="9" type="uint"/><!-- vertices - 1 -->
2391 <bitfield name="INVOCATIONS" low="11" high="15" type="uint"/><!-- invoc - 1 -->
2392 <bitfield name="PRIMTYPE" low="23" high="24" type="adreno_pa_su_sc_draw"/>
2395 <bitfield name="VERTICES_OUT" low="0" high="5" type="uint"/>
2396 <bitfield name="SPACING" low="21" high="22" type="a4xx_tess_spacing"/>
2403 <bitfield name="VTXCNT" low="0" high="5" type="uint"/>
2406 <bitfield name="REGID4VTX" low="0" high="7" type="a3xx_regid"/>
2407 <bitfield name="REGID4INST" low="8" high="15" type="a3xx_regid"/>
2408 <bitfield name="REGID4PRIMID" low="16" high="23" type="a3xx_regid"/>
2411 …<bitfield name="REGID_PATCHID" low="0" high="7" type="a3xx_regid"/><!-- same as VFD_CONTROL_3.REGI…
2414 <bitfield name="REGID_PATCHID" low="8" high="15" type="a3xx_regid"/>
2415 <bitfield name="REGID_TESSX" low="16" high="23" type="a3xx_regid"/>
2416 <bitfield name="REGID_TESSY" low="24" high="31" type="a3xx_regid"/>
2421 <!-- b0 set if gl_PrimitiveID used in fs ?? -->
2433 <!-- IDX appears to index into VFD_FETCH[] -->
2434 <bitfield name="IDX" low="0" high="4" type="uint"/>
2436 <bitfield name="FORMAT" low="20" high="27" type="a5xx_vtx_fmt"/>
2437 <bitfield name="SWAP" low="28" high="29" type="a3xx_color_swap"/>
2441 <reg32 offset="0x1" name="STEP_RATE"/> <!-- ??? -->
2445 <bitfield name="WRITEMASK" low="0" high="3" type="hex"/>
2446 <bitfield name="REGID" low="4" high="11" type="a3xx_regid"/>
2451 <!-- 0x0 for compute, 0x10 for 3d? -->
2456 <bitfield name="CONSTOBJECTOFFSET" low="1" high="7" type="uint"/>
2457 <bitfield name="SHADEROBJOFFSET" low="8" high="14" type="uint"/>
2461 <!--
2462 no idea high bit.. could be this is amount of on-chip memory used
2464 -->
2465 <bitfield name="INSTRLEN" low="1" high="31" type="uint"/>
2468 <!-- bit1 almost always set -->
2469 <!-- set for "buffer mode" (ie. shader small enough to fit internally) -->
2471 <!-- 24 or more (full size) GPRS and blob uses TWO_QUADS instead of FOUR_QUADS -->
2473 <bitfield name="HALFREGFOOTPRINT" low="4" high="9" type="uint"/>
2474 <bitfield name="FULLREGFOOTPRINT" low="10" high="15" type="uint"/>
2477 <!-- seems to be nesting level for flow control:.. -->
2478 <bitfield name="BRANCHSTACK" low="25" high="31" type="uint"/>
2480 <!-- assuming things appear in same relative order as a4xx: -->
2481 <!-- duplicated exactly w/ corresponding HLSQ_ regs starting at 0xe78b.. -->
2492 <!-- # of VS outputs including pos/psize -->
2493 <bitfield name="VSOUT" low="0" high="4" type="uint"/>
2497 <bitfield name="A_REGID" low="0" high="7" type="a3xx_regid"/>
2498 <bitfield name="A_COMPMASK" low="8" high="11" type="hex"/>
2499 <bitfield name="B_REGID" low="16" high="23" type="a3xx_regid"/>
2500 <bitfield name="B_COMPMASK" low="24" high="27" type="hex"/>
2503 <!--
2509 -->
2512 <bitfield name="OUTLOC0" low="0" high="7" type="uint"/>
2513 <bitfield name="OUTLOC1" low="8" high="15" type="uint"/>
2514 <bitfield name="OUTLOC2" low="16" high="23" type="uint"/>
2515 <bitfield name="OUTLOC3" low="24" high="31" type="uint"/>
2523 <bitfield name="MEMSIZEPERITEM" low="0" high="7" shr="9">
2526 <bitfield name="HWSTACKOFFSET" low="8" high="23" shr="11" type="uint"/>
2527 <bitfield name="HWSTACKSIZEPERTHREAD" low="24" high="31">
2533 <bitfield name="TOTALPVTMEMSIZE" low="0" high="17" shr="12"/>
2547 <!-- per-mrt enable bit -->
2548 <bitfield name="ENABLE_BLEND" low="0" high="7"/>
2553 <bitfield name="MRT" low="0" high="3" type="uint"/>
2554 <bitfield name="DEPTH_REGID" low="5" high="12" type="a3xx_regid"/>
2555 <bitfield name="SAMPLEMASK_REGID" low="13" high="20" type="a3xx_regid"/>
2560 <bitfield name="REGID" low="0" high="7" type="a3xx_regid"/>
2566 <bitfield name="COLOR_FORMAT" low="0" high="7" type="a5xx_color_fmt"/>
2572 <!--
2573 e5db/e5dc seems to look related to some optimization to do sample from
2576 -->
2586 <!-- e5f9 something compute related.. seems to change when HLSQ_CS_CNTL_1 changes -->
2611 <bitfield name="SAMPLES" low="0" high="1" type="a3xx_msaa_samples"/>
2614 <bitfield name="SAMPLES" low="0" high="1" type="a3xx_msaa_samples"/>
2617 <!-- either blob is doing it wrong, or this is not per-stage anymore: -->
2621 <!--
2625 -->
2664 <!-- 24 or more (full size) GPRS and blob uses TWO_QUADS instead of FOUR_QUADS -->
2669 <!-- I guess.. not set exactly same as a4xx, but similar: -->
2670 <bitfield name="PRIMALLOCTHRESHOLD" low="0" high="5" type="uint"/>
2673 <bitfield name="FACEREGID" low="0" high="7" type="a3xx_regid"/>
2674 <!-- SAMPLEID is loaded into a half-precision register: -->
2675 <bitfield name="SAMPLEID" low="8" high="15" type="a3xx_regid"/>
2676 <bitfield name="SAMPLEMASK" low="16" high="23" type="a3xx_regid"/>
2677 <bitfield name="CENTERRHW" low="24" high="31" type="a3xx_regid"/>
2680 <!-- register loaded with position (bary.f) -->
2681 <bitfield name="IJ_PERSP_PIXEL" low="0" high="7" type="a3xx_regid"/>
2682 <bitfield name="IJ_LINEAR_PIXEL" low="8" high="15" type="a3xx_regid"/>
2683 <bitfield name="IJ_PERSP_CENTROID" low="16" high="23" type="a3xx_regid"/>
2684 <bitfield name="IJ_LINEAR_CENTROID" low="24" high="31" type="a3xx_regid"/>
2687 <bitfield name="IJ_PERSP_SAMPLE" low="0" high="7" type="a3xx_regid"/>
2688 <bitfield name="IJ_LINEAR_SAMPLE" low="8" high="15" type="a3xx_regid"/>
2689 <bitfield name="XYCOORDREGID" low="16" high="23" type="a3xx_regid"/>
2690 <bitfield name="ZWCOORDREGID" low="24" high="31" type="a3xx_regid"/>
2692 <!--
2695 what breaks to figure out which is what:
2696 -->
2714 <bitfield name="KERNELDIM" low="0" high="1" type="uint"/>
2715 <!-- localsize is value minus one: -->
2716 <bitfield name="LOCALSIZEX" low="2" high="11" type="uint"/>
2717 <bitfield name="LOCALSIZEY" low="12" high="21" type="uint"/>
2718 <bitfield name="LOCALSIZEZ" low="22" high="31" type="uint"/>
2721 <bitfield name="GLOBALSIZE_X" low="0" high="31" type="uint"/>
2724 <bitfield name="GLOBALOFF_X" low="0" high="31" type="uint"/>
2727 <bitfield name="GLOBALSIZE_Y" low="0" high="31" type="uint"/>
2730 <bitfield name="GLOBALOFF_Y" low="0" high="31" type="uint"/>
2733 <bitfield name="GLOBALSIZE_Z" low="0" high="31" type="uint"/>
2736 <bitfield name="GLOBALOFF_Z" low="0" high="31" type="uint"/>
2739 <bitfield name="WGIDCONSTID" low="0" high="7" type="a3xx_regid"/>
2740 <!-- possibly one of these is KERNELDIMCONSTID? -->
2741 <!--
2742 UNK0 appears to be NUMWGCONSTID.. but only works in certain
2743 cases? Blob doesn't appear to use it, but instead emits
2746 enough to use as EXT_SRC_ADDR in CP_LOAD_STATE
2747 -->
2748 <bitfield name="UNK0" low="8" high="15" type="a3xx_regid"/>
2749 <bitfield name="UNK1" low="16" high="23" type="a3xx_regid"/>
2750 <bitfield name="LOCALIDREGID" low="24" high="31" type="a3xx_regid"/>
2772 <!--
2773 Separate blit/2d or dma engine? Seems to get used sometimes for
2775 in render-mode 0x5..
2777 Note seems mostly to be used for small blits, large blits seem
2778 to use the CP_EVENT_WRITE:BLIT style of doing things. See
2779 cubemap-0003 (40x40) vs cubemap-0004 (256x256).
2781 see cube-0000, cubemap-(1..3 but not 4+), quad-textured-10..17
2785 to work it out.
2787 Separate this into a different domain?? Would that help to
2790 regs 0x2000 to 0x2004 (plus all-zero regs 0x2005-0x2009) look
2793 src via sampler, to enable scaling??) 0x2040 also used in this
2795 -->
2796 <reg32 offset="0x2100" name="RB_2D_BLIT_CNTL"/> <!-- same as 0x2180 -->
2803 <bitfield name="COLOR_FORMAT" low="0" high="7" type="a5xx_color_fmt"/>
2804 <bitfield name="TILE_MODE" low="8" high="9" type="a5xx_tile_mode"/>
2805 <bitfield name="COLOR_SWAP" low="10" high="11" type="a3xx_color_swap"/>
2806 <!-- b12 seems to be set when UBWC "FLAGS" buffer enabled -->
2815 <bitfield name="PITCH" low="0" high="15" shr="6" type="uint"/>
2816 <bitfield name="ARRAY_PITCH" low="16" high="31" shr="6" type="uint"/>
2823 <bitfield name="PITCH" low="0" high="15" shr="6" type="uint"/>
2824 <bitfield name="ARRAY_PITCH" low="16" high="31" shr="6" type="uint"/>
2832 <reg32 offset="0x2180" name="GRAS_2D_BLIT_CNTL"/> <!-- same as 0x2100 -->
2833 <!-- looks same as 0x2107: -->
2835 <!-- looks same as 0x2110: -->
2837 <!--
2842 -->
2848 <enum name="a5xx_tex_filter"> <!-- same as a4xx? -->
2853 <enum name="a5xx_tex_clamp"> <!-- same as a4xx? -->
2860 <enum name="a5xx_tex_aniso"> <!-- same as a4xx? -->
2869 <bitfield name="XY_MAG" low="1" high="2" type="a5xx_tex_filter"/>
2870 <bitfield name="XY_MIN" low="3" high="4" type="a5xx_tex_filter"/>
2871 <bitfield name="WRAP_S" low="5" high="7" type="a5xx_tex_clamp"/>
2872 <bitfield name="WRAP_T" low="8" high="10" type="a5xx_tex_clamp"/>
2873 <bitfield name="WRAP_R" low="11" high="13" type="a5xx_tex_clamp"/>
2874 <bitfield name="ANISO" low="14" high="16" type="a5xx_tex_aniso"/>
2875 …<bitfield name="LOD_BIAS" low="19" high="31" type="fixed" radix="8"/><!-- no idea how many bits fo…
2878 <bitfield name="COMPARE_FUNC" low="1" high="3" type="adreno_compare_func"/>
2882 <bitfield name="MAX_LOD" low="8" high="19" type="ufixed" radix="8"/>
2883 <bitfield name="MIN_LOD" low="20" high="31" type="ufixed" radix="8"/>
2886 <!--
2887 offset into border-color buffer? Blob always uses 0x80 for FS state
2888 if both VS and FS have border-color.
2890 and 0x80 in TEX_SAMP.2 .. blob doesn't seem to be able to cope w/ multiple
2891 different border-color states per texture.. Looks something like:
2900 -->
2901 <bitfield name="BCOLOR_OFFSET" low="7" high="31"/>
2908 <enum name="a5xx_tex_swiz"> <!-- same as a4xx? -->
2916 <enum name="a5xx_tex_type"> <!-- same as a4xx? -->
2924 <bitfield name="TILE_MODE" low="0" high="1" type="a5xx_tile_mode"/>
2926 <bitfield name="SWIZ_X" low="4" high="6" type="a5xx_tex_swiz"/>
2927 <bitfield name="SWIZ_Y" low="7" high="9" type="a5xx_tex_swiz"/>
2928 <bitfield name="SWIZ_Z" low="10" high="12" type="a5xx_tex_swiz"/>
2929 <bitfield name="SWIZ_W" low="13" high="15" type="a5xx_tex_swiz"/>
2930 <bitfield name="MIPLVLS" low="16" high="19" type="uint"/>
2931 <bitfield name="SAMPLES" low="20" high="21" type="a3xx_msaa_samples"/>
2932 <bitfield name="FMT" low="22" high="29" type="a5xx_tex_fmt"/>
2933 <bitfield name="SWAP" low="30" high="31" type="a3xx_color_swap"/>
2936 <bitfield name="WIDTH" low="0" high="14" type="uint"/>
2937 <bitfield name="HEIGHT" low="15" high="29" type="uint"/>
2940 <!--
2941 b4 and b31 set for buffer/ssbo case, in which case low 15 bits
2942 of size encoded in WIDTH, and high 15 bits encoded in HEIGHT
2945 …behavior of texture in dEQP-GLES31.functional.texture.texture_buffer.render.as_fragment_texture.bu…
2946 -->
2948 <!-- minimum pitch (for mipmap levels): log2(pitchalign / 64) -->
2949 <bitfield name="PITCHALIGN" low="0" high="3" type="uint"/>
2951 <bitfield name="PITCH" low="7" high="28" type="uint"/>
2952 <bitfield name="TYPE" low="29" high="31" type="a5xx_tex_type"/>
2955 <!--
2958 layer size at the point that it stops being reduced moving to
2960 -->
2961 <bitfield name="ARRAY_PITCH" low="0" high="13" shr="12" type="uint"/>
2962 <bitfield name="MIN_LAYERSZ" low="23" high="26" shr="12"/>
2963 <!--
2967 -->
2972 <bitfield name="BASE_LO" low="5" high="31" shr="5"/>
2975 <bitfield name="BASE_HI" low="0" high="16"/>
2976 <bitfield name="DEPTH" low="17" high="29" type="uint"/>
2986 <!--
2990 -->
2993 <bitfield name="BASE_LO" low="5" high="31" shr="5"/>
2996 <!-- no BASE_HI here? Maybe this is only used for 32b mode? -->
2998 <bitfield name="PITCH" low="0" high="21" type="uint"/>
3001 <bitfield name="ARRAY_PITCH" low="12" high="25" shr="12" type="uint"/>
3004 <!-- bytes per pixel: -->
3005 <bitfield name="CPP" low="0" high="5" type="uint"/>
3011 <bitfield name="FMT" low="8" high="15" type="a5xx_tex_fmt"/>
3012 <bitfield name="WIDTH" low="16" high="31" type="uint"/>
3015 <bitfield name="HEIGHT" low="0" high="15" type="uint"/>
3016 <bitfield name="DEPTH" low="16" high="31" type="uint"/>
3022 <bitfield name="BASE_LO" low="0" high="31"/>
3025 <bitfield name="BASE_HI" low="0" high="31"/>
3031 <bitfield name="BASE_LO" low="0" high="31"/>
3034 <bitfield name="BASE_HI" low="0" high="16"/>
3035 <!-- size probably in high bits -->